Changes to build successfully with GCC 3.02


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1503 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAlloc/IGNode.cpp b/lib/CodeGen/RegAlloc/IGNode.cpp
index 4e66d9a..a225742 100644
--- a/lib/CodeGen/RegAlloc/IGNode.cpp
+++ b/lib/CodeGen/RegAlloc/IGNode.cpp
@@ -1,12 +1,13 @@
 #include "llvm/CodeGen/IGNode.h"
-
+#include <algorithm>
+#include <iostream>
+using std::cerr;
 
 //-----------------------------------------------------------------------------
 // Constructor
 //-----------------------------------------------------------------------------
-IGNode::IGNode(LiveRange *const PLR, unsigned int Ind): Index(Ind),
-							AdjList(),
-                                                        ParentLR(PLR)
+IGNode::IGNode(LiveRange *const PLR, unsigned int Ind) : Index(Ind),
+                                                         ParentLR(PLR)
 {
   OnStack = false;
   CurDegree = -1 ;
@@ -23,11 +24,12 @@
   int neighs = AdjList.size();
 
   if( neighs < 0) {
-    cout << "\nAdj List size = " << neighs;
+    cerr << "\nAdj List size = " << neighs;
     assert(0 && "Invalid adj list size");
   }
 
-  for(int i=0; i < neighs; i++)  (AdjList[i])->decCurDegree();
+  for(int i=0; i < neighs; i++)
+    AdjList[i]->decCurDegree();
 }
  
 //-----------------------------------------------------------------------------
@@ -35,11 +37,9 @@
 // two IGNodes together.
 //-----------------------------------------------------------------------------
 void IGNode::delAdjIGNode(const IGNode *const Node) {
-  vector <IGNode *>::iterator It = AdjList.begin();
-    
-  // find Node
-  for( ; It != AdjList.end() && (*It != Node); It++ ) ;
+  std::vector<IGNode *>::iterator It = 
+    find(AdjList.begin(), AdjList.end(), Node);
   assert( It != AdjList.end() );      // the node must be there
-  
-  AdjList.erase( It );
+    
+  AdjList.erase(It);
 }
diff --git a/lib/CodeGen/RegAlloc/IGNode.h b/lib/CodeGen/RegAlloc/IGNode.h
index 0f4cf9c..b89aea3 100644
--- a/lib/CodeGen/RegAlloc/IGNode.h
+++ b/lib/CodeGen/RegAlloc/IGNode.h
@@ -29,8 +29,6 @@
 #include "llvm/CodeGen/RegAllocCommon.h"
 #include "llvm/CodeGen/LiveRange.h"
 
-
-
 //----------------------------------------------------------------------------
 // Class IGNode
 //
@@ -39,13 +37,11 @@
 
 class IGNode
 {
- private:
-
   const int Index;            // index within IGNodeList 
 
   bool OnStack;               // this has been pushed on to stack for coloring
 
-  vector<IGNode *> AdjList;   // adjacency list for this live range
+  std::vector<IGNode *> AdjList;   // adjacency list for this live range
 
   int CurDegree;     
   //
@@ -54,7 +50,6 @@
   // Decremented when a neighbor is pushed on to the stack. 
   // After that, never incremented/set again nor used.
 
-
   LiveRange *const ParentLR;  // parent LR (cannot be a const)
 
 
@@ -152,10 +147,4 @@
 
 };
 
-
-
-
-
-
-
 #endif
diff --git a/lib/CodeGen/RegAlloc/InterferenceGraph.cpp b/lib/CodeGen/RegAlloc/InterferenceGraph.cpp
index e18c9a7..0de7275 100644
--- a/lib/CodeGen/RegAlloc/InterferenceGraph.cpp
+++ b/lib/CodeGen/RegAlloc/InterferenceGraph.cpp
@@ -1,4 +1,7 @@
 #include "llvm/CodeGen/InterferenceGraph.h"
+#include "Support/STLExtras.h"
+#include <iostream>
+using std::cerr;
 
 //-----------------------------------------------------------------------------
 // Constructor: Records the RegClass and initalizes IGNodeList.
@@ -11,7 +14,7 @@
   IG = NULL;         
   Size = 0;            
   if( DEBUG_RA) {
-    cout << "Interference graph created!" << endl;
+    cerr << "Interference graph created!\n";
   }
 }
 
@@ -22,19 +25,12 @@
 InterferenceGraph:: ~InterferenceGraph() {             
 
   // delete the matrix
-  //
-  if( IG )
-    delete []IG;
+  for(unsigned int r=0; r < IGNodeList.size(); ++r)
+    delete[] IG[r];
+  delete[] IG;
 
   // delete all IGNodes in the IGNodeList
-  //
-  vector<IGNode *>::const_iterator IGIt = IGNodeList.begin();
-  for(unsigned i=0; i < IGNodeList.size() ; ++i) {
-
-    const IGNode *const Node = IGNodeList[i];
-    if( Node ) delete Node;
-  }
-
+  for_each(IGNodeList.begin(), IGNodeList.end(), deleter<IGNode>);
 }
 
 
@@ -46,13 +42,13 @@
 void InterferenceGraph::createGraph()   
 { 
     Size = IGNodeList.size();
-    IG = (char **) new char *[Size]; 
+    IG = new char*[Size]; 
     for( unsigned int r=0; r < Size; ++r)
       IG[r] = new char[Size];
 
     // init IG matrix
     for(unsigned int i=0; i < Size; i++)     
-      for( unsigned int j=0; j < Size ; j++)
+      for(unsigned int j=0; j < Size; j++)
 	IG[i][j] = 0;
 }
 
@@ -61,9 +57,7 @@
 //-----------------------------------------------------------------------------
 void InterferenceGraph::addLRToIG(LiveRange *const LR)
 {
-  IGNode *Node = new IGNode(LR,  IGNodeList.size() );
-  IGNodeList.push_back( Node );
-
+  IGNodeList.push_back(new IGNode(LR, IGNodeList.size()));
 }
 
 
@@ -92,12 +86,11 @@
   char *val;
 
   if( DEBUG_RA > 1) 
-    cout << "setting intf for: [" << row << "][" <<  col << "]" << endl; 
+    cerr << "setting intf for: [" << row << "][" <<  col << "]\n"; 
 
   ( row > col) ?  val = &IG[row][col]: val = &IG[col][row]; 
 
   if( ! (*val) ) {                      // if this interf is not previously set
-
     *val = 1;                           // add edges between nodes 
     IGNode1->addAdjIGNode( IGNode2 );   
     IGNode2->addAdjIGNode( IGNode1 );
@@ -123,7 +116,10 @@
   const unsigned int col = LR2->getUserIGNode()->getIndex();
 
   char ret; 
-  ( row > col) ?  (ret = IG[row][col]) : (ret = IG[col][row]) ; 
+  if (row > col)
+    ret = IG[row][col];
+  else 
+    ret = IG[col][row]; 
   return ret;
 
 }
@@ -148,9 +144,9 @@
   assertIGNode( SrcNode );
 
   if( DEBUG_RA > 1) {
-    cout << "Merging LRs: \""; LR1->printSet(); 
-    cout << "\" and \""; LR2->printSet();
-    cout << "\"" << endl;
+    cerr << "Merging LRs: \""; LR1->printSet(); 
+    cerr << "\" and \""; LR2->printSet();
+    cerr << "\"\n";
   }
 
   unsigned SrcDegree = SrcNode->getNumOfNeighbors();
@@ -217,17 +213,16 @@
   for(unsigned int i=0; i < Size; i++) {   
 
     const IGNode *const Node = IGNodeList[i];
-    if( ! Node )
-      continue;                         // skip empty rows
+    if(Node) {
+      cerr << " [" << i << "] ";
 
-    cout << " [" << i << "] ";
-
-      for( unsigned int j=0; j < Size; j++) {
-	if( j >= i) break;
-	if( IG[i][j] ) cout << "(" << i << "," << j << ") ";
+      for( unsigned int j=0; j < i; j++) {
+	if(IG[i][j])
+          cerr << "(" << i << "," << j << ") ";
       }
-      cout << endl;
+      cerr << "\n";
     }
+  }
 }
 
 //----------------------------------------------------------------------------
@@ -235,21 +230,14 @@
 //----------------------------------------------------------------------------
 void InterferenceGraph::printIGNodeList() const
 {
-  vector<IGNode *>::const_iterator IGIt = IGNodeList.begin(); // hash map iter
-
   for(unsigned i=0; i < IGNodeList.size() ; ++i) {
-
     const IGNode *const Node = IGNodeList[i];
 
-    if( ! Node )
-      continue;
-
-    cout << " [" << Node->getIndex() << "] ";
-    (Node->getParentLR())->printSet(); 
-    //int Deg = Node->getCurDegree();
-    cout << "\t <# of Neighs: " << Node->getNumOfNeighbors() << ">" << endl;
-    
+    if (Node) {
+      cerr << " [" << Node->getIndex() << "] ";
+      Node->getParentLR()->printSet(); 
+      //int Deg = Node->getCurDegree();
+      cerr << "\t <# of Neighs: " << Node->getNumOfNeighbors() << ">\n";
+    }
   }
 }
-
-
diff --git a/lib/CodeGen/RegAlloc/InterferenceGraph.h b/lib/CodeGen/RegAlloc/InterferenceGraph.h
index 99dea8f..408bee4 100644
--- a/lib/CodeGen/RegAlloc/InterferenceGraph.h
+++ b/lib/CodeGen/RegAlloc/InterferenceGraph.h
@@ -1,4 +1,4 @@
-/* Title:   InterferenceGraph.h
+/* Title:   InterferenceGraph.h   -*- C++ -*-
    Author:  Ruchira Sasanka
    Date:    July 20, 01
    Purpose: Interference Graph used for register coloring.
@@ -24,7 +24,7 @@
 
 #include "llvm/CodeGen/IGNode.h"
 
-typedef vector <IGNode *> IGNodeListType;
+typedef std::vector <IGNode *> IGNodeListType;
 
 
 class InterferenceGraph
@@ -47,6 +47,8 @@
   // to create it after adding all IGNodes to the IGNodeList
 
   InterferenceGraph(RegClass *const RC);
+  ~InterferenceGraph();
+
   void createGraph();
 
   void addLRToIG(LiveRange *const LR);
@@ -65,12 +67,6 @@
 
   void printIG() const;
   void printIGNodeList() const;
-
-  ~InterferenceGraph();
-  
-
 };
 
-
 #endif
-
diff --git a/lib/CodeGen/RegAlloc/LiveRange.h b/lib/CodeGen/RegAlloc/LiveRange.h
index 778e070..8034751 100644
--- a/lib/CodeGen/RegAlloc/LiveRange.h
+++ b/lib/CodeGen/RegAlloc/LiveRange.h
@@ -1,4 +1,4 @@
-/* Title:   LiveRange.h
+/* Title:   LiveRange.h   -*- C++ -*-
    Author:  Ruchira Sasanka
    Date:    July 25, 01
    Purpose: To keep info about a live range. 
@@ -13,6 +13,7 @@
 
 #include "llvm/Analysis/LiveVar/ValueSet.h"
 #include "llvm/Type.h"
+#include <iostream>
 
 class RegClass;
 class IGNode;
@@ -176,7 +177,7 @@
     if(SuggestedColor == -1 )
       SuggestedColor = Col;
     else if (DEBUG_RA) 
-      cerr << "Already has a suggested color " << Col << endl;
+      std::cerr << "Already has a suggested color " << Col << "\n";
   }
 
   inline unsigned getSuggestedColor() const {
diff --git a/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp b/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
index 7fb688f..b66e6ef 100644
--- a/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
+++ b/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
@@ -1,15 +1,15 @@
 #include "llvm/CodeGen/LiveRangeInfo.h"
+#include <iostream>
+using std::cerr;
 
 //---------------------------------------------------------------------------
 // Constructor
 //---------------------------------------------------------------------------
 LiveRangeInfo::LiveRangeInfo(const Method *const M, 
 			     const TargetMachine& tm,
-			     vector<RegClass *> &RCL) 
-                             : Meth(M), LiveRangeMap(), 
-			       TM(tm), RegClassList(RCL),
-			       MRI( tm.getRegInfo()),
-			       CallRetInstrList()
+			     std::vector<RegClass *> &RCL)
+                             : Meth(M), LiveRangeMap(), TM(tm),
+                               RegClassList(RCL), MRI(tm.getRegInfo())
 { }
 
 
@@ -17,33 +17,25 @@
 // Destructor: Deletes all LiveRanges in the LiveRangeMap
 //---------------------------------------------------------------------------
 LiveRangeInfo::~LiveRangeInfo() {
-
   LiveRangeMapType::iterator MI =  LiveRangeMap.begin(); 
 
   for( ; MI != LiveRangeMap.end() ; ++MI) {  
-    if( (*MI).first ) {
+    if (MI->first && MI->second) {
+      LiveRange *LR = MI->second;
+
+      // we need to be careful in deleting LiveRanges in LiveRangeMap
+      // since two/more Values in the live range map can point to the same
+      // live range. We have to make the other entries NULL when we delete
+      // a live range.
+
+      LiveRange::iterator LI = LR->begin();
       
-      LiveRange *LR = (*MI).second;
-       
-      if( LR ) {
-
-	// we need to be careful in deleting LiveRanges in LiveRangeMap
-	// since two/more Values in the live range map can point to the same
-	// live range. We have to make the other entries NULL when we delete
-	// a live range.
-
-	LiveRange::iterator LI = LR->begin();
-	
-	for( ; LI != LR->end() ; ++LI) { 
-	  LiveRangeMap[*LI] = NULL;
-	}
-
-	delete LR;
-
-      }
+      for( ; LI != LR->end() ; ++LI)
+        LiveRangeMap[*LI] = 0;
+      
+      delete LR;
     }
   }
-
 }
 
 
@@ -82,7 +74,7 @@
  
   L1->addSpillCost( L2->getSpillCost() ); // add the spill costs
 
-  delete ( L2 );                        // delete L2 as it is no longer needed
+  delete L2;                        // delete L2 as it is no longer needed
 }
 
 
@@ -96,7 +88,7 @@
 {  
 
   if( DEBUG_RA) 
-    cout << "Consturcting Live Ranges ..." << endl;
+    cerr << "Consturcting Live Ranges ...\n";
 
   // first find the live ranges for all incoming args of the method since
   // those LRs start from the start of the method
@@ -108,14 +100,13 @@
 
              
   for( ; ArgIt != ArgList.end() ; ++ArgIt) {     // for each argument
-
     LiveRange * ArgRange = new LiveRange();      // creates a new LR and 
     const Value *const Val = (const Value *) *ArgIt;
 
     assert( Val);
 
-    ArgRange->add( Val );     // add the arg (def) to it
-    LiveRangeMap[ Val ] = ArgRange;
+    ArgRange->add(Val);     // add the arg (def) to it
+    LiveRangeMap[Val] = ArgRange;
 
     // create a temp machine op to find the register class of value
     //const MachineOperand Op(MachineOperand::MO_VirtualRegister);
@@ -125,8 +116,8 @@
 
     			   
     if( DEBUG_RA > 1) {     
-      cout << " adding LiveRange for argument ";    
-      printValue( (const Value *) *ArgIt); cout  << endl;
+      cerr << " adding LiveRange for argument ";    
+      printValue((const Value *) *ArgIt); cerr << "\n";
     }
   }
 
@@ -140,7 +131,6 @@
 
 
   Method::const_iterator BBI = Meth->begin();    // random iterator for BBs   
-
   for( ; BBI != Meth->end(); ++BBI) {            // go thru BBs in random order
 
     // Now find all LRs for machine the instructions. A new LR will be created 
@@ -150,8 +140,7 @@
 
     // get the iterator for machine instructions
     const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
-    MachineCodeForBasicBlock::const_iterator 
-      MInstIterator = MIVec.begin();
+    MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
 
     // iterate over all the machine instructions in BB
     for( ; MInstIterator != MIVec.end(); MInstIterator++) {  
@@ -161,53 +150,46 @@
       // Now if the machine instruction is a  call/return instruction,
       // add it to CallRetInstrList for processing its implicit operands
 
-      if( (TM.getInstrInfo()).isReturn( MInst->getOpCode()) ||
-	  (TM.getInstrInfo()).isCall( MInst->getOpCode()) )
+      if(TM.getInstrInfo().isReturn(MInst->getOpCode()) ||
+	 TM.getInstrInfo().isCall(MInst->getOpCode()))
 	CallRetInstrList.push_back( MInst ); 
  
              
       // iterate over  MI operands to find defs
-      for( MachineInstr::val_const_op_iterator OpI(MInst);!OpI.done(); ++OpI) {
-	
-	if( DEBUG_RA) {
+      for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
+	if(DEBUG_RA) {
 	  MachineOperand::MachineOperandType OpTyp = 
 	    OpI.getMachineOperand().getOperandType();
 
-	  if ( OpTyp == MachineOperand::MO_CCRegister) {
-	    cout << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
+	  if (OpTyp == MachineOperand::MO_CCRegister) {
+	    cerr << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
 	    printValue( OpI.getMachineOperand().getVRegValue() );
-	    cout << endl;
+	    cerr << "\n";
 	  }
 	}
 
 	// create a new LR iff this operand is a def
 	if( OpI.isDef() ) {     
-	  
 	  const Value *const Def = *OpI;
 
-
 	  // Only instruction values are accepted for live ranges here
-
 	  if( Def->getValueType() != Value::InstructionVal ) {
-	    cout << "\n**%%Error: Def is not an instruction val. Def=";
-	    printValue( Def ); cout << endl;
+	    cerr << "\n**%%Error: Def is not an instruction val. Def=";
+	    printValue( Def ); cerr << "\n";
 	    continue;
 	  }
 
-
 	  LiveRange *DefRange = LiveRangeMap[Def]; 
 
 	  // see LR already there (because of multiple defs)
-	  
 	  if( !DefRange) {                  // if it is not in LiveRangeMap
-	    
 	    DefRange = new LiveRange();     // creates a new live range and 
 	    DefRange->add( Def );           // add the instruction (def) to it
 	    LiveRangeMap[ Def ] = DefRange; // update the map
 
 	    if( DEBUG_RA > 1) { 	    
-	      cout << "  creating a LR for def: ";    
-	      printValue(Def); cout  << endl;
+	      cerr << "  creating a LR for def: ";    
+	      printValue(Def); cerr  << "\n";
 	    }
 
 	    // set the register class of the new live range
@@ -221,7 +203,7 @@
 
 
 	    if(isCC && DEBUG_RA) {
-	      cout  << "\a**created a LR for a CC reg:";
+	      cerr  << "\a**created a LR for a CC reg:";
 	      printValue( OpI.getMachineOperand().getVRegValue() );
 	    }
 
@@ -235,8 +217,8 @@
 	    LiveRangeMap[ Def ] = DefRange; 
 
 	    if( DEBUG_RA > 1) { 
-	      cout << "   added to an existing LR for def: ";  
-	      printValue( Def ); cout  << endl;
+	      cerr << "   added to an existing LR for def: ";  
+	      printValue( Def ); cerr  << "\n";
 	    }
 	  }
 
@@ -256,7 +238,7 @@
   suggestRegs4CallRets();
 
   if( DEBUG_RA) 
-    cout << "Initial Live Ranges constructed!" << endl;
+    cerr << "Initial Live Ranges constructed!\n";
 
 }
 
@@ -312,11 +294,8 @@
 //---------------------------------------------------------------------------
 void LiveRangeInfo::coalesceLRs()  
 {
-
-
-
   if( DEBUG_RA) 
-    cout << endl << "Coalscing LRs ..." << endl;
+    cerr << "\nCoalscing LRs ...\n";
 
   Method::const_iterator BBI = Meth->begin();  // random iterator for BBs   
 
@@ -324,8 +303,7 @@
 
     // get the iterator for machine instructions
     const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
-    MachineCodeForBasicBlock::const_iterator 
-      MInstIterator = MIVec.begin();
+    MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
 
     // iterate over all the machine instructions in BB
     for( ; MInstIterator != MIVec.end(); ++MInstIterator) {  
@@ -333,9 +311,9 @@
       const MachineInstr * MInst = *MInstIterator; 
 
       if( DEBUG_RA > 1) {
-	cout << " *Iterating over machine instr ";
+	cerr << " *Iterating over machine instr ";
 	MInst->dump();
-	cout << endl;
+	cerr << "\n";
       }
 
 
@@ -357,8 +335,8 @@
 
 	      //don't warn about labels
 	      if (!((*UseI)->getType())->isLabelType() && DEBUG_RA) {
-		cout<<" !! Warning: No LR for use "; printValue(*UseI);
-		cout << endl;
+		cerr<<" !! Warning: No LR for use "; printValue(*UseI);
+		cerr << "\n";
 	      }
 	      continue;                 // ignore and continue
 	    }
@@ -407,7 +385,7 @@
   } // for all BBs
 
   if( DEBUG_RA) 
-    cout << endl << "Coalscing Done!" << endl;
+    cerr << "\nCoalscing Done!\n";
 
 }
 
@@ -421,11 +399,11 @@
 void LiveRangeInfo::printLiveRanges()
 {
   LiveRangeMapType::iterator HMI = LiveRangeMap.begin();   // hash map iterator
-  cout << endl << "Printing Live Ranges from Hash Map:" << endl;
-  for( ; HMI != LiveRangeMap.end() ; HMI ++ ) {
-    if( (*HMI).first && (*HMI).second ) {
-      cout <<" "; printValue((*HMI).first);  cout  << "\t: "; 
-      ((*HMI).second)->printSet(); cout << endl;
+  cerr << "\nPrinting Live Ranges from Hash Map:\n";
+  for( ; HMI != LiveRangeMap.end() ; ++HMI) {
+    if( HMI->first && HMI->second ) {
+      cerr <<" "; printValue((*HMI).first);  cerr << "\t: "; 
+      HMI->second->printSet(); cerr << "\n";
     }
   }
 }
diff --git a/lib/CodeGen/RegAlloc/LiveRangeInfo.h b/lib/CodeGen/RegAlloc/LiveRangeInfo.h
index 1eee1ae..9e7ef06 100644
--- a/lib/CodeGen/RegAlloc/LiveRangeInfo.h
+++ b/lib/CodeGen/RegAlloc/LiveRangeInfo.h
@@ -1,4 +1,4 @@
-/* Title:   LiveRangeInfo.h
+/* Title:   LiveRangeInfo.h  -*- C++ -*-
    Author:  Ruchira Sasanka
    Date:    Jun 30, 01
    Purpose: 
@@ -34,8 +34,8 @@
 #include "llvm/CodeGen/RegClass.h"
 
 
-typedef hash_map <const Value *,  LiveRange *, hashFuncValue> LiveRangeMapType;
-typedef vector <const MachineInstr *> CallRetInstrListType;
+typedef std::hash_map<const Value*, LiveRange*> LiveRangeMapType;
+typedef std::vector<const MachineInstr*> CallRetInstrListType;
 
 
 
@@ -59,7 +59,7 @@
   
   const TargetMachine& TM;          // target machine description
 
-  vector<RegClass *> & RegClassList;// a vector containing register classess
+  std::vector<RegClass *> & RegClassList;// vector containing register classess
 
   const MachineRegInfo& MRI;        // machine reg info
 
@@ -82,7 +82,7 @@
   
   LiveRangeInfo(const Method *const M, 
 		const TargetMachine& tm,
-		vector<RegClass *> & RCList);
+		std::vector<RegClass *> & RCList);
 
 
   // Destructor to destroy all LiveRanges in the LiveRange Map
diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index 7d6fbb7..e2d455b 100644
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -14,7 +14,9 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MachineFrameInfo.h"
+#include <iostream>
 #include <math.h>
+using std::cerr;
 
 
 // ***TODO: There are several places we add instructions. Validate the order
@@ -35,18 +37,16 @@
 PhyRegAlloc::PhyRegAlloc(Method *M, 
 			 const TargetMachine& tm, 
 			 MethodLiveVarInfo *const Lvi) 
-                        : RegClassList(),
-                          TM(tm),
-			  Meth(M),
+                       :  TM(tm), Meth(M),
                           mcInfo(MachineCodeForMethod::get(M)),
                           LVI(Lvi), LRI(M, tm, RegClassList), 
 			  MRI( tm.getRegInfo() ),
                           NumOfRegClasses(MRI.getNumOfRegClasses()),
-			  AddedInstrMap(), LoopDepthCalc(M), ResColList() {
+			  LoopDepthCalc(M) {
 
   // create each RegisterClass and put in RegClassList
   //
-  for( unsigned int rc=0; rc < NumOfRegClasses; rc++)  
+  for(unsigned int rc=0; rc < NumOfRegClasses; rc++)  
     RegClassList.push_back( new RegClass(M, MRI.getMachineRegClass(rc), 
 					 &ResColList) );
 }
@@ -69,7 +69,7 @@
 //----------------------------------------------------------------------------
 void PhyRegAlloc::createIGNodeListsAndIGs()
 {
-  if(DEBUG_RA ) cout << "Creating LR lists ..." << endl;
+  if(DEBUG_RA ) cerr << "Creating LR lists ...\n";
 
   // hash map iterator
   LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin();   
@@ -85,8 +85,8 @@
 
 	if( !L) { 
 	  if( DEBUG_RA) {
-	    cout << "\n*?!?Warning: Null liver range found for: ";
-	    printValue( (*HMI).first) ; cout << endl;
+	    cerr << "\n*?!?Warning: Null liver range found for: ";
+	    printValue(HMI->first); cerr << "\n";
 	  }
 	  continue;
 	}
@@ -108,7 +108,7 @@
     RegClassList[ rc ]->createInterferenceGraph();
 
   if( DEBUG_RA)
-    cout << "LRLists Created!" << endl;
+    cerr << "LRLists Created!\n";
 }
 
 
@@ -140,8 +140,8 @@
   for( ; LIt != LVSet->end(); ++LIt) {
 
     if( DEBUG_RA > 1) {
-      cout << "< Def="; printValue(Def);     
-      cout << ", Lvar=";  printValue( *LIt); cout  << "> ";
+      cerr << "< Def="; printValue(Def);     
+      cerr << ", Lvar=";  printValue( *LIt); cerr  << "> ";
     }
 
     //  get the live range corresponding to live var
@@ -166,8 +166,8 @@
     else if(DEBUG_RA > 1)  { 
       // we will not have LRs for values not explicitly allocated in the
       // instruction stream (e.g., constants)
-      cout << " warning: no live range for " ; 
-      printValue( *LIt); cout << endl; }
+      cerr << " warning: no live range for " ; 
+      printValue(*LIt); cerr << "\n"; }
     
     }
  
@@ -203,7 +203,7 @@
   }
 
   if( DEBUG_RA)
-    cout << "\n For call inst: " << *MInst;
+    cerr << "\n For call inst: " << *MInst;
 
   LiveVarSet::const_iterator LIt = LVSetAft->begin();
 
@@ -216,7 +216,7 @@
     LiveRange *const LR = LRI.getLiveRangeForValue(*LIt ); 
 
     if( LR && DEBUG_RA) {
-      cout << "\n\tLR Aft Call: ";
+      cerr << "\n\tLR Aft Call: ";
       LR->printSet();
     }
    
@@ -227,7 +227,7 @@
     if( LR && (LR != RetValLR) )   {  
       LR->setCallInterference();
       if( DEBUG_RA) {
-	cout << "\n  ++Added call interf for LR: " ;
+	cerr << "\n  ++Added call interf for LR: " ;
 	LR->printSet();
       }
     }
@@ -247,7 +247,7 @@
 void PhyRegAlloc::buildInterferenceGraphs()
 {
 
-  if(DEBUG_RA) cout << "Creating interference graphs ..." << endl;
+  if(DEBUG_RA) cerr << "Creating interference graphs ...\n";
 
   unsigned BBLoopDepthCost;
   Method::const_iterator BBI = Meth->begin();  // random iterator for BBs   
@@ -333,7 +333,7 @@
   addInterferencesForArgs();          
 
   if( DEBUG_RA)
-    cout << "Interference graphs calculted!" << endl;
+    cerr << "Interference graphs calculted!\n";
 
 }
 
@@ -411,8 +411,8 @@
     addInterference( *ArgIt, InSet, false );  // add interferences between 
                                               // args and LVars at start
     if( DEBUG_RA > 1) {
-       cout << " - %% adding interference for  argument ";    
-      printValue( (const Value *) *ArgIt); cout  << endl;
+       cerr << " - %% adding interference for  argument ";    
+      printValue((const Value *)*ArgIt); cerr << "\n";
     }
   }
 }
@@ -510,7 +510,7 @@
 	  // delete this condition checking later (must assert if Val is null)
 	  if( !Val) {
             if (DEBUG_RA)
-              cout << "Warning: NULL Value found for operand" << endl;
+              cerr << "Warning: NULL Value found for operand\n";
 	    continue;
 	  }
 	  assert( Val && "Value is NULL");   
@@ -522,9 +522,9 @@
 	    // nothing to worry if it's a const or a label
 
             if (DEBUG_RA) {
-              cout << "*NO LR for operand : " << Op ;
-	      cout << " [reg:" <<  Op.getAllocatedRegNum() << "]";
-	      cout << " in inst:\t" << *MInst << endl;
+              cerr << "*NO LR for operand : " << Op ;
+	      cerr << " [reg:" <<  Op.getAllocatedRegNum() << "]";
+	      cerr << " in inst:\t" << *MInst << "\n";
             }
 
 	    // if register is not allocated, mark register as invalid
@@ -563,18 +563,16 @@
       // instruction, add them now.
       //      
       if( AddedInstrMap[ MInst ] ) {
-
-	deque<MachineInstr *> &IBef = (AddedInstrMap[MInst])->InstrnsBefore;
+	std::deque<MachineInstr *> &IBef = AddedInstrMap[MInst]->InstrnsBefore;
 
 	if( ! IBef.empty() ) {
-
-	  deque<MachineInstr *>::iterator AdIt; 
+	  std::deque<MachineInstr *>::iterator AdIt; 
 
 	  for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
 
 	    if( DEBUG_RA) {
 	      cerr << "For inst " << *MInst;
-	      cerr << " PREPENDed instr: " << **AdIt << endl;
+	      cerr << " PREPENDed instr: " << **AdIt << "\n";
 	    }
 	  	    
 	    MInstIterator = MIVec.insert( MInstIterator, *AdIt );
@@ -600,7 +598,7 @@
 	if((delay=TM.getInstrInfo().getNumDelaySlots(MInst->getOpCode())) >0){ 
 	  move2DelayedInstr(MInst,  *(MInstIterator+delay) );
 
-	  if(DEBUG_RA)  cout<< "\nMoved an added instr after the delay slot";
+	  if(DEBUG_RA)  cerr<< "\nMoved an added instr after the delay slot";
 	}
        
 	else {
@@ -609,11 +607,11 @@
 	  // Here we can add the "instructions after" to the current
 	  // instruction since there are no delay slots for this instruction
 
-	  deque<MachineInstr *> &IAft = (AddedInstrMap[MInst])->InstrnsAfter;
+	  std::deque<MachineInstr *> &IAft = AddedInstrMap[MInst]->InstrnsAfter;
 	  
 	  if( ! IAft.empty() ) {     
 	    
-	    deque<MachineInstr *>::iterator AdIt; 
+	    std::deque<MachineInstr *>::iterator AdIt; 
 	    
 	    ++MInstIterator;   // advance to the next instruction
 	    
@@ -621,7 +619,7 @@
 	      
 	      if(DEBUG_RA) {
 		cerr << "For inst " << *MInst;
-		cerr << " APPENDed instr: "  << **AdIt << endl;
+		cerr << " APPENDed instr: "  << **AdIt << "\n";
 	      }	      
 
 	      MInstIterator = MIVec.insert( MInstIterator, *AdIt );
@@ -669,9 +667,7 @@
   RegClass *RC = LR->getRegClass();
   const LiveVarSet *LVSetBef =  LVI->getLiveVarSetBeforeMInst(MInst, BB);
 
-
-  int TmpOff = 
-    mcInfo.pushTempValue(TM, MRI.getSpilledRegSize(RegType) );
+  mcInfo.pushTempValue(TM, MRI.getSpilledRegSize(RegType) );
   
   MachineInstr *MIBef=NULL,  *AdIMid=NULL, *MIAft=NULL;
   
@@ -854,13 +850,10 @@
     return  MRI.getUnifiedRegNum(RC->getID(), c);
   else 
     assert( 0 && "FATAL: No free register could be found in reg class!!");
-
+  return 0;
 }
 
 
-
-
-
 //----------------------------------------------------------------------------
 // This method modifies the IsColorUsedArr of the register class passed to it.
 // It sets the bits corresponding to the registers used by this machine
@@ -909,14 +902,10 @@
 
    LiveRange *const LRofImpRef = 
      LRI.getLiveRangeForValue( MInst->getImplicitRef(z)  );    
-
-   if( LRofImpRef )     
-     if( LRofImpRef->hasColor() ) 
-       IsColorUsedArr[ LRofImpRef->getColor() ] = true;
+   
+   if(LRofImpRef && LRofImpRef->hasColor())
+     IsColorUsedArr[LRofImpRef->getColor()] = true;
  }
-
-
-
 }
 
 
@@ -936,9 +925,8 @@
 void PhyRegAlloc:: move2DelayedInstr(const MachineInstr *OrigMI,
 				     const MachineInstr *DelayedMI) {
 
-
   // "added after" instructions of the original instr
-  deque<MachineInstr *> &OrigAft = (AddedInstrMap[OrigMI])->InstrnsAfter;
+  std::deque<MachineInstr *> &OrigAft = AddedInstrMap[OrigMI]->InstrnsAfter;
 
   // "added instructions" of the delayed instr
   AddedInstrns *DelayAdI = AddedInstrMap[DelayedMI];
@@ -949,21 +937,15 @@
   }
 
   // "added after" instructions of the delayed instr
-  deque<MachineInstr *> &DelayedAft = DelayAdI->InstrnsAfter;
+  std::deque<MachineInstr *> &DelayedAft = DelayAdI->InstrnsAfter;
 
   // go thru all the "added after instructions" of the original instruction
   // and append them to the "addded after instructions" of the delayed
   // instructions
-
-  deque<MachineInstr *>::iterator OrigAdIt; 
-	    
-  for( OrigAdIt = OrigAft.begin(); OrigAdIt != OrigAft.end() ; ++OrigAdIt ) { 
-    DelayedAft.push_back( *OrigAdIt );
-  }    
+  DelayedAft.insert(DelayedAft.end(), OrigAft.begin(), OrigAft.end());
 
   // empty the "added after instructions" of the original instruction
   OrigAft.clear();
-    
 }
 
 //----------------------------------------------------------------------------
@@ -973,14 +955,14 @@
 void PhyRegAlloc::printMachineCode()
 {
 
-  cout << endl << ";************** Method ";
-  cout << Meth->getName() << " *****************" << endl;
+  cerr << "\n;************** Method " << Meth->getName()
+       << " *****************\n";
 
   Method::const_iterator BBI = Meth->begin();  // random iterator for BBs   
 
   for( ; BBI != Meth->end(); ++BBI) {          // traverse BBs in random order
 
-    cout << endl ; printLabel( *BBI); cout << ": ";
+    cerr << "\n"; printLabel( *BBI); cerr << ": ";
 
     // get the iterator for machine instructions
     MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
@@ -992,8 +974,8 @@
       MachineInstr *const MInst = *MInstIterator; 
 
 
-      cout << endl << "\t";
-      cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
+      cerr << "\n\t";
+      cerr << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
       
 
       //for(MachineInstr::val_const_op_iterator OpI(MInst);!OpI.done();++OpI) {
@@ -1009,41 +991,39 @@
 	  const Value *const Val = Op.getVRegValue () ;
 	  // ****this code is temporary till NULL Values are fixed
 	  if( ! Val ) {
-	    cout << "\t<*NULL*>";
+	    cerr << "\t<*NULL*>";
 	    continue;
 	  }
 
 	  // if a label or a constant
-	  if( (Val->getValueType() == Value::BasicBlockVal)  ) {
-
-	    cout << "\t"; printLabel(	Op.getVRegValue	() );
-	  }
-	  else {
+	  if(isa<BasicBlock>(Val) {
+	    cerr << "\t"; printLabel(	Op.getVRegValue	() );
+	  } else {
 	    // else it must be a register value
 	    const int RegNum = Op.getAllocatedRegNum();
 
-	    cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
+	    cerr << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
 	    if (Val->hasName() )
-	      cout << "(" << Val->getName() << ")";
+	      cerr << "(" << Val->getName() << ")";
 	    else 
-	      cout << "(" << Val << ")";
+	      cerr << "(" << Val << ")";
 
 	    if( Op.opIsDef() )
-	      cout << "*";
+	      cerr << "*";
 
 	    const LiveRange *LROfVal = LRI.getLiveRangeForValue(Val);
 	    if( LROfVal )
 	      if( LROfVal->hasSpillOffset() )
-		cout << "$";
+		cerr << "$";
 	  }
 
 	} 
 	else if(Op.getOperandType() ==  MachineOperand::MO_MachineRegister) {
-	  cout << "\t" << "%" << MRI.getUnifiedRegName(Op.getMachineRegNum());
+	  cerr << "\t" << "%" << MRI.getUnifiedRegName(Op.getMachineRegNum());
 	}
 
 	else 
-	  cout << "\t" << Op;      // use dump field
+	  cerr << "\t" << Op;      // use dump field
       }
 
     
@@ -1051,23 +1031,22 @@
       unsigned NumOfImpRefs =  MInst->getNumImplicitRefs();
       if(  NumOfImpRefs > 0 ) {
 	
-	cout << "\tImplicit:";
+	cerr << "\tImplicit:";
 
 	for(unsigned z=0; z < NumOfImpRefs; z++) {
 	  printValue(  MInst->getImplicitRef(z) );
-	  cout << "\t";
+	  cerr << "\t";
 	}
 	
       }
 
     } // for all machine instructions
 
-
-    cout << endl;
+    cerr << "\n";
 
   } // for all BBs
 
-  cout << endl;
+  cerr << "\n";
 }
 
 
@@ -1125,9 +1104,9 @@
   assert( FirstMI && "No machine instruction in entry BB");
 
   AddedInstrns *AI = AddedInstrMap[ FirstMI ];
-  if ( !AI ) { 
+  if (!AI) { 
     AI = new AddedInstrns();
-    AddedInstrMap[ FirstMI  ] = AI;
+    AddedInstrMap[FirstMI] = AI;
   }
 
   MRI.colorMethodArgs(Meth, LRI, AI );
@@ -1137,12 +1116,11 @@
 //----------------------------------------------------------------------------
 // Used to generate a label for a basic block
 //----------------------------------------------------------------------------
-void PhyRegAlloc::printLabel(const Value *const Val)
-{
-  if( Val->hasName() )
-    cout  << Val->getName();
+void PhyRegAlloc::printLabel(const Value *const Val) {
+  if (Val->hasName())
+    cerr  << Val->getName();
   else
-    cout << "Label" <<  Val;
+    cerr << "Label" <<  Val;
 }
 
 
@@ -1155,7 +1133,7 @@
 
 void PhyRegAlloc::markUnusableSugColors()
 {
-  if(DEBUG_RA ) cout << "\nmarking unusable suggested colors ..." << endl;
+  if(DEBUG_RA ) cerr << "\nmarking unusable suggested colors ...\n";
 
   // hash map iterator
   LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin();   
@@ -1193,22 +1171,18 @@
 
 void PhyRegAlloc::allocateStackSpace4SpilledLRs()
 {
-  if(DEBUG_RA ) cout << "\nsetting LR stack offsets ..." << endl;
+  if(DEBUG_RA ) cerr << "\nsetting LR stack offsets ...\n";
 
   // hash map iterator
   LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin();   
   LiveRangeMapType::const_iterator HMIEnd = (LRI.getLiveRangeMap())->end();   
 
     for(  ; HMI != HMIEnd ; ++HMI ) {
-      if( (*HMI).first ) { 
-	LiveRange *L = (*HMI).second;      // get the LiveRange
-	if(L)
-	  if( ! L->hasColor() ) 
-
-	    //  NOTE: ** allocating the size of long Type **
-	    L->setSpillOffFromFP(mcInfo.allocateSpilledValue(TM, 
-			         Type::LongTy));
-							    
+      if(HMI->first && HMI->second) {
+	LiveRange *L = HMI->second;      // get the LiveRange
+        if( ! L->hasColor() ) 
+          //  NOTE: ** allocating the size of long Type **
+          L->setSpillOffFromFP(mcInfo.allocateSpilledValue(TM, Type::LongTy));
       }
     } // for all LR's in hash map
 }
diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.h b/lib/CodeGen/RegAlloc/PhyRegAlloc.h
index 9d34557..6871b2d 100644
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.h
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.h
@@ -1,4 +1,4 @@
-/* Title:   PhyRegAlloc.h
+/* Title:   PhyRegAlloc.h   -*- C++ -*-
    Author:  Ruchira Sasanka
    Date:    Aug 20, 01
    Purpose: This is the main entry point for register allocation.
@@ -54,13 +54,11 @@
 class AddedInstrns
 {
  public:
-  deque<MachineInstr *> InstrnsBefore;  // Added insts BEFORE an existing inst
-  deque<MachineInstr *> InstrnsAfter;   // Added insts AFTER an existing inst
-
-  AddedInstrns() : InstrnsBefore(), InstrnsAfter() { }
+  std::deque<MachineInstr*> InstrnsBefore;// Added insts BEFORE an existing inst
+  std::deque<MachineInstr*> InstrnsAfter; // Added insts AFTER an existing inst
 };
 
-typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
+typedef std::hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
 
 
 
@@ -74,7 +72,7 @@
 class PhyRegAlloc: public NonCopyable
 {
 
-  vector<RegClass *> RegClassList  ;    // vector of register classes
+  std::vector<RegClass *> RegClassList; // vector of register classes
   const TargetMachine &TM;              // target machine
   const Method* Meth;                   // name of the method we work on
   MachineCodeForMethod& mcInfo;         // descriptor for method's native code
@@ -115,8 +113,7 @@
                                  const BasicBlock *BB,
                                  const unsigned OpNum);
 
-  inline void constructLiveRanges() 
-    { LRI.constructLiveRanges(); }      
+  inline void constructLiveRanges() { LRI.constructLiveRanges(); }      
 
   void colorIncomingArgs();
   void colorCallRetArgs();
@@ -141,12 +138,9 @@
 
   void addInterf4PseudoInstr(const MachineInstr *MInst);
 
-
  public:
-
   PhyRegAlloc(Method *const M, const TargetMachine& TM, 
 	      MethodLiveVarInfo *const Lvi);
-
   ~PhyRegAlloc(); 
 
   // main method called for allocating registers
diff --git a/lib/CodeGen/RegAlloc/RegClass.cpp b/lib/CodeGen/RegAlloc/RegClass.cpp
index 3918871..8ba6a15 100644
--- a/lib/CodeGen/RegAlloc/RegClass.cpp
+++ b/lib/CodeGen/RegAlloc/RegClass.cpp
@@ -1,5 +1,6 @@
 #include "llvm/CodeGen/RegClass.h"
-
+#include <iostream>
+using std::cerr;
 
 //----------------------------------------------------------------------------
 // This constructor inits IG. The actual matrix is created by a call to 
@@ -11,7 +12,7 @@
                   :  Meth(M), MRC(Mrc), RegClassID( Mrc->getRegClassID() ),
                      IG(this), IGNodeStack(), ReservedColorList(RCL) {
   if( DEBUG_RA)
-    cout << "Created Reg Class: " << RegClassID << endl;
+    cerr << "Created Reg Class: " << RegClassID << "\n";
 
   IsColorUsedArr = new bool[ Mrc->getNumOfAllRegs() ];
 }
@@ -23,7 +24,7 @@
 //----------------------------------------------------------------------------
 void RegClass::colorAllRegs()
 {
-  if(DEBUG_RA) cout << "Coloring IG of reg class " << RegClassID << " ...\n";
+  if(DEBUG_RA) cerr << "Coloring IG of reg class " << RegClassID << " ...\n";
 
                                         // pre-color IGNodes
   pushAllIGNodes();                     // push all IG Nodes
@@ -57,9 +58,9 @@
   bool PushedAll  = pushUnconstrainedIGNodes(); 
 
   if( DEBUG_RA) {
-    cout << " Puhsed all-unconstrained IGNodes. ";
-    if( PushedAll ) cout << " No constrained nodes left.";
-    cout << endl;
+    cerr << " Puhsed all-unconstrained IGNodes. ";
+    if( PushedAll ) cerr << " No constrained nodes left.";
+    cerr << "\n";
   }
 
   if( PushedAll )                       // if NO constrained nodes left
@@ -129,8 +130,8 @@
       IGNode->pushOnStack();            // set OnStack and dec deg of neighs
 
       if (DEBUG_RA > 1) {
-	cout << " pushed un-constrained IGNode " << IGNode->getIndex() ;
-	cout << " on to stack" << endl;
+	cerr << " pushed un-constrained IGNode " << IGNode->getIndex() ;
+	cerr << " on to stack\n";
       }
     }
     else pushedall = false;             // we didn't push all live ranges
@@ -215,16 +216,16 @@
   }
   else {
     if( DEBUG_RA ) {
-      cout << " Node " << Node->getIndex();
-      cout << " already colored with color " << Node->getColor() << endl;
+      cerr << " Node " << Node->getIndex();
+      cerr << " already colored with color " << Node->getColor() << "\n";
     }
   }
 
 
   if( !Node->hasColor() ) {
     if( DEBUG_RA ) {
-      cout << " Node " << Node->getIndex();
-      cout << " - could not find a color (needs spilling)" << endl;
+      cerr << " Node " << Node->getIndex();
+      cerr << " - could not find a color (needs spilling)\n";
     }
   }
 
diff --git a/lib/CodeGen/RegAlloc/RegClass.h b/lib/CodeGen/RegAlloc/RegClass.h
index d6cbaf8..fe25986 100644
--- a/lib/CodeGen/RegAlloc/RegClass.h
+++ b/lib/CodeGen/RegAlloc/RegClass.h
@@ -13,8 +13,9 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MachineRegInfo.h"
 #include <stack>
+#include <iostream>
 
-typedef vector<unsigned int> ReservedColorListType;
+typedef std::vector<unsigned int> ReservedColorListType;
 
 
 //-----------------------------------------------------------------------------
@@ -46,7 +47,7 @@
 
   InterferenceGraph IG;                 // Interference graph - constructed by
                                         // buildInterferenceGraph
-  stack <IGNode *> IGNodeStack;         // the stack used for coloring
+  std::stack<IGNode *> IGNodeStack;     // the stack used for coloring
 
   const ReservedColorListType *const ReservedColorList;
   //
@@ -117,21 +118,14 @@
 
 
   inline void printIGNodeList() const {
-    cerr << "IG Nodes for Register Class " << RegClassID << ":" << endl;
+    std::cerr << "IG Nodes for Register Class " << RegClassID << ":" << "\n";
     IG.printIGNodeList(); 
   }
 
   inline void printIG() {  
-    cerr << "IG for Register Class " << RegClassID << ":" << endl;
+    std::cerr << "IG for Register Class " << RegClassID << ":" << "\n";
     IG.printIG(); 
   }
-
 };
 
-
-
-
-
-
-
 #endif