diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 02f53cc..8176f24 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -905,9 +905,8 @@
   // memory location argument.
   MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
   SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
-  SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
-  return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV->getValue(),
-                      SV->getOffset());
+  const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
+  return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0);
 }
 
 static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index c359a5b..d20e1f7 100644
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -491,10 +491,9 @@
   case ISD::VAARG: {
     SDOperand Chain = Op.getOperand(0);
     SDOperand VAListP = Op.getOperand(1);
-    SrcValueSDNode *VAListS = cast<SrcValueSDNode>(Op.getOperand(2));
+    const Value *VAListS = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
     
-    SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS->getValue(),
-                                 VAListS->getOffset());
+    SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS, 0);
     SDOperand Tmp = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
                                 DAG.getConstant(8, MVT::i64));
     SDOperand Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Base.getValue(1),
@@ -527,13 +526,11 @@
     SDOperand Chain = Op.getOperand(0);
     SDOperand DestP = Op.getOperand(1);
     SDOperand SrcP = Op.getOperand(2);
-    SrcValueSDNode *DestS = cast<SrcValueSDNode>(Op.getOperand(3));
-    SrcValueSDNode *SrcS = cast<SrcValueSDNode>(Op.getOperand(4));
+    const Value *DestS = cast<SrcValueSDNode>(Op.getOperand(3))->getValue();
+    const Value *SrcS = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
     
-    SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP,
-                                SrcS->getValue(), SrcS->getOffset());
-    SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS->getValue(),
-                                    DestS->getOffset());
+    SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, SrcS, 0);
+    SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS, 0);
     SDOperand NP = DAG.getNode(ISD::ADD, MVT::i64, SrcP, 
                                DAG.getConstant(8, MVT::i64));
     Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Result, NP, NULL,0, MVT::i32);
@@ -544,12 +541,11 @@
   case ISD::VASTART: {
     SDOperand Chain = Op.getOperand(0);
     SDOperand VAListP = Op.getOperand(1);
-    SrcValueSDNode *VAListS = cast<SrcValueSDNode>(Op.getOperand(2));
+    const Value *VAListS = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
     
     // vastart stores the address of the VarArgsBase and VarArgsOffset
     SDOperand FR  = DAG.getFrameIndex(VarArgsBase, MVT::i64);
-    SDOperand S1  = DAG.getStore(Chain, FR, VAListP, VAListS->getValue(),
-                                 VAListS->getOffset());
+    SDOperand S1  = DAG.getStore(Chain, FR, VAListP, VAListS, 0);
     SDOperand SA2 = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
                                 DAG.getConstant(8, MVT::i64));
     return DAG.getTruncStore(S1, DAG.getConstant(VarArgsOffset, MVT::i64),
diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index d81d5e6..ef77274 100644
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -581,16 +581,16 @@
   }
   case ISD::VAARG: {
     MVT::ValueType VT = getPointerTy();
-    SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
+    const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
     SDOperand VAList = DAG.getLoad(VT, Op.getOperand(0), Op.getOperand(1), 
-                                   SV->getValue(), SV->getOffset());
+                                   SV, 0);
     // Increment the pointer, VAList, to the next vaarg
     SDOperand VAIncr = DAG.getNode(ISD::ADD, VT, VAList, 
                                    DAG.getConstant(MVT::getSizeInBits(VT)/8, 
                                                    VT));
     // Store the incremented VAList to the legalized pointer
     VAIncr = DAG.getStore(VAList.getValue(1), VAIncr,
-                          Op.getOperand(1), SV->getValue(), SV->getOffset());
+                          Op.getOperand(1), SV, 0);
     // Load the actual argument out of the pointer VAList
     return DAG.getLoad(Op.getValueType(), VAIncr, VAList, NULL, 0);
   }
@@ -598,9 +598,8 @@
     // vastart just stores the address of the VarArgsFrameIndex slot into the
     // memory location argument.
     SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64);
-    SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
-    return DAG.getStore(Op.getOperand(0), FR, 
-                        Op.getOperand(1), SV->getValue(), SV->getOffset());
+    const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
+    return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0);
   }
   // Frame & Return address.  Currently unimplemented
   case ISD::RETURNADDR:         break;
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index e17f82d..28aa35c 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -24,6 +24,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/PseudoSourceValue.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/Constants.h"
 #include "llvm/Function.h"
@@ -1175,9 +1176,8 @@
     // memory location argument.
     MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
     SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
-    SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
-    return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV->getValue(),
-                        SV->getOffset());
+    const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
+    return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0);
   }
 
   // For ELF 32 ABI we follow the layout of the va_list struct.
@@ -1211,37 +1211,41 @@
 
   MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
   
-  SDOperand StackOffset = DAG.getFrameIndex(VarArgsStackOffset, PtrVT);
+  SDOperand StackOffsetFI = DAG.getFrameIndex(VarArgsStackOffset, PtrVT);
   SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
   
-  SDOperand ConstFrameOffset = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8,
-                                               PtrVT);
-  SDOperand ConstStackOffset = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8 - 1,
-                                               PtrVT);
-  SDOperand ConstFPROffset   = DAG.getConstant(1, PtrVT);
+  uint64_t FrameOffset = MVT::getSizeInBits(PtrVT)/8;
+  SDOperand ConstFrameOffset = DAG.getConstant(FrameOffset, PtrVT);
+
+  uint64_t StackOffset = MVT::getSizeInBits(PtrVT)/8 - 1;
+  SDOperand ConstStackOffset = DAG.getConstant(StackOffset, PtrVT);
+
+  uint64_t FPROffset = 1;
+  SDOperand ConstFPROffset = DAG.getConstant(FPROffset, PtrVT);
   
-  SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
+  const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
   
   // Store first byte : number of int regs
   SDOperand firstStore = DAG.getStore(Op.getOperand(0), ArgGPR,
-                                      Op.getOperand(1), SV->getValue(),
-                                      SV->getOffset());
+                                      Op.getOperand(1), SV, 0);
+  uint64_t nextOffset = FPROffset;
   SDOperand nextPtr = DAG.getNode(ISD::ADD, PtrVT, Op.getOperand(1),
                                   ConstFPROffset);
   
   // Store second byte : number of float regs
-  SDOperand secondStore = DAG.getStore(firstStore, ArgFPR, nextPtr,
-                                       SV->getValue(), SV->getOffset());
+  SDOperand secondStore =
+    DAG.getStore(firstStore, ArgFPR, nextPtr, SV, nextOffset);
+  nextOffset += StackOffset;
   nextPtr = DAG.getNode(ISD::ADD, PtrVT, nextPtr, ConstStackOffset);
   
   // Store second word : arguments given on stack
-  SDOperand thirdStore = DAG.getStore(secondStore, StackOffset, nextPtr,
-                                      SV->getValue(), SV->getOffset());
+  SDOperand thirdStore =
+    DAG.getStore(secondStore, StackOffsetFI, nextPtr, SV, nextOffset);
+  nextOffset += FrameOffset;
   nextPtr = DAG.getNode(ISD::ADD, PtrVT, nextPtr, ConstFrameOffset);
 
   // Store third word : arguments given in registers
-  return DAG.getStore(thirdStore, FR, nextPtr, SV->getValue(),
-                      SV->getOffset());
+  return DAG.getStore(thirdStore, FR, nextPtr, SV, nextOffset);
 
 }
 
@@ -2199,9 +2203,11 @@
                                 Op.getOperand(0));
   
   // STD the extended value into the stack slot.
+  MemOperand MO(&PseudoSourceValue::getFixedStack(),
+                MemOperand::MOStore, FrameIdx, 8, 8);
   SDOperand Store = DAG.getNode(PPCISD::STD_32, MVT::Other,
                                 DAG.getEntryNode(), Ext64, FIdx,
-                                DAG.getSrcValue(NULL));
+                                DAG.getMemOperand(MO));
   // Load the value as a double.
   SDOperand Ld = DAG.getLoad(MVT::f64, Store, FIdx, NULL, 0);
   
@@ -3300,11 +3306,11 @@
       std::vector<MVT::ValueType> VTs;
       VTs.push_back(MVT::i32);
       VTs.push_back(MVT::Other);
-      SDOperand SV = DAG.getSrcValue(LD->getSrcValue(), LD->getSrcValueOffset());
+      SDOperand MO = DAG.getMemOperand(LD->getMemOperand());
       SDOperand Ops[] = {
         LD->getChain(),    // Chain
         LD->getBasePtr(),  // Ptr
-        SV,                // SrcValue
+        MO,                // MemOperand
         DAG.getValueType(N->getValueType(0)) // VT
       };
       SDOperand BSLoad = DAG.getNode(PPCISD::LBRX, VTs, Ops, 4);
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index ad814ef..0abbb00 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -805,25 +805,23 @@
     SDOperand Offset = DAG.getNode(ISD::ADD, MVT::i32,
                                    DAG.getRegister(SP::I6, MVT::i32),
                                 DAG.getConstant(VarArgsFrameOffset, MVT::i32));
-    SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
-    return DAG.getStore(Op.getOperand(0), Offset, 
-                        Op.getOperand(1), SV->getValue(), SV->getOffset());
+    const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
+    return DAG.getStore(Op.getOperand(0), Offset, Op.getOperand(1), SV, 0);
   }
   case ISD::VAARG: {
     SDNode *Node = Op.Val;
     MVT::ValueType VT = Node->getValueType(0);
     SDOperand InChain = Node->getOperand(0);
     SDOperand VAListPtr = Node->getOperand(1);
-    SrcValueSDNode *SV = cast<SrcValueSDNode>(Node->getOperand(2));
-    SDOperand VAList = DAG.getLoad(getPointerTy(), InChain, VAListPtr,
-                                   SV->getValue(), SV->getOffset());
+    const Value *SV = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
+    SDOperand VAList = DAG.getLoad(getPointerTy(), InChain, VAListPtr, SV, 0);
     // Increment the pointer, VAList, to the next vaarg
     SDOperand NextPtr = DAG.getNode(ISD::ADD, getPointerTy(), VAList, 
                                     DAG.getConstant(MVT::getSizeInBits(VT)/8, 
                                                     getPointerTy()));
     // Store the incremented VAList to the legalized pointer
     InChain = DAG.getStore(VAList.getValue(1), NextPtr,
-                           VAListPtr, SV->getValue(), SV->getOffset());
+                           VAListPtr, SV, 0);
     // Load the actual argument out of the pointer VAList, unless this is an
     // f64 load.
     if (VT != MVT::f64) {
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 091ce18..79ac36d 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -32,6 +32,7 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/PseudoSourceValue.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/Debug.h"
@@ -1089,7 +1090,8 @@
   SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy());
   if (isByVal)
     return FIN;
-  return DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0);
+  return DAG.getLoad(VA.getValVT(), Root, FIN,
+                     &PseudoSourceValue::getFixedStack(), FI);
 }
 
 SDOperand
@@ -1217,7 +1219,10 @@
         unsigned VReg = AddLiveIn(MF, GPR64ArgRegs[NumIntRegs],
                                   X86::GR64RegisterClass);
         SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i64);
-        SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);
+        SDOperand Store =
+          DAG.getStore(Val.getValue(1), Val, FIN,
+                       &PseudoSourceValue::getFixedStack(),
+                       RegSaveFrameIndex);
         MemOps.push_back(Store);
         FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
                           DAG.getIntPtrConstant(8));
@@ -1230,7 +1235,10 @@
         unsigned VReg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs],
                                   X86::VR128RegisterClass);
         SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::v4f32);
-        SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);
+        SDOperand Store =
+          DAG.getStore(Val.getValue(1), Val, FIN,
+                       &PseudoSourceValue::getFixedStack(),
+                       RegSaveFrameIndex);
         MemOps.push_back(Store);
         FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
                           DAG.getIntPtrConstant(16));
@@ -1559,7 +1567,9 @@
                                                            Flags, DAG));
         } else {
           // Store relative to framepointer.
-          MemOpChains2.push_back(DAG.getStore(Chain, Source, FIN, NULL, 0));
+          MemOpChains2.push_back(
+            DAG.getStore(Chain, Source, FIN,
+                         &PseudoSourceValue::getFixedStack(), FI));
         }            
       }
     }
@@ -3788,7 +3798,8 @@
   // the GV offset field. Platform check is inside GVRequiresExtraLoad() call
   // The same applies for external symbols during PIC codegen
   if (Subtarget->GVRequiresExtraLoad(GV, getTargetMachine(), false))
-    Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), Result, NULL, 0);
+    Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), Result,
+                         &PseudoSourceValue::getGOT(), 0);
 
   return Result;
 }
@@ -3846,7 +3857,8 @@
   SDOperand Offset = DAG.getNode(X86ISD::Wrapper, PtrVT, TGA);
 
   if (GA->getGlobal()->isDeclaration()) // initial exec TLS model
-    Offset = DAG.getLoad(PtrVT, DAG.getEntryNode(), Offset, NULL, 0);
+    Offset = DAG.getLoad(PtrVT, DAG.getEntryNode(), Offset,
+                         &PseudoSourceValue::getGOT(), 0);
 
   // The address of the thread local variable is the add of the thread
   // pointer with the offset of the variable.
@@ -3978,7 +3990,9 @@
   int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
   SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
   SDOperand Chain = DAG.getStore(DAG.getEntryNode(), Op.getOperand(0),
-                                 StackSlot, NULL, 0);
+                                 StackSlot,
+                                 &PseudoSourceValue::getFixedStack(),
+                                 SSFI);
 
   // These are really Legal; caller falls through into that case.
   if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType()))
@@ -4019,7 +4033,8 @@
     Ops.push_back(DAG.getValueType(Op.getValueType()));
     Ops.push_back(InFlag);
     Chain = DAG.getNode(X86ISD::FST, Tys, &Ops[0], Ops.size());
-    Result = DAG.getLoad(Op.getValueType(), Chain, StackSlot, NULL, 0);
+    Result = DAG.getLoad(Op.getValueType(), Chain, StackSlot,
+                         &PseudoSourceValue::getFixedStack(), SSFI);
   }
 
   return Result;
@@ -4057,7 +4072,8 @@
   SDOperand Value = Op.getOperand(0);
   if (isScalarFPTypeInSSEReg(Op.getOperand(0).getValueType())) {
     assert(Op.getValueType() == MVT::i64 && "Invalid FP_TO_SINT to lower!");
-    Chain = DAG.getStore(Chain, Value, StackSlot, NULL, 0);
+    Chain = DAG.getStore(Chain, Value, StackSlot,
+                         &PseudoSourceValue::getFixedStack(), SSFI);
     SDVTList Tys = DAG.getVTList(Op.getOperand(0).getValueType(), MVT::Other);
     SDOperand Ops[] = {
       Chain, StackSlot, DAG.getValueType(Op.getOperand(0).getValueType())
@@ -4116,7 +4132,8 @@
   }
   Constant *C = ConstantVector::get(CV);
   SDOperand CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
-  SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0,
+  SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
+                               &PseudoSourceValue::getConstantPool(), 0,
                                false, 16);
   return DAG.getNode(X86ISD::FAND, VT, Op.getOperand(0), Mask);
 }
@@ -4144,7 +4161,8 @@
   }
   Constant *C = ConstantVector::get(CV);
   SDOperand CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
-  SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0,
+  SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
+                               &PseudoSourceValue::getConstantPool(), 0,
                                false, 16);
   if (MVT::isVector(VT)) {
     return DAG.getNode(ISD::BIT_CONVERT, VT,
@@ -4192,7 +4210,8 @@
   }
   Constant *C = ConstantVector::get(CV);
   SDOperand CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
-  SDOperand Mask1 = DAG.getLoad(SrcVT, DAG.getEntryNode(), CPIdx, NULL, 0,
+  SDOperand Mask1 = DAG.getLoad(SrcVT, DAG.getEntryNode(), CPIdx,
+                                &PseudoSourceValue::getConstantPool(), 0,
                                 false, 16);
   SDOperand SignBit = DAG.getNode(X86ISD::FAND, SrcVT, Op1, Mask1);
 
@@ -4220,7 +4239,8 @@
   }
   C = ConstantVector::get(CV);
   CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
-  SDOperand Mask2 = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0,
+  SDOperand Mask2 = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
+                                &PseudoSourceValue::getConstantPool(), 0,
                                 false, 16);
   SDOperand Val = DAG.getNode(X86ISD::FAND, VT, Op0, Mask2);
 
@@ -4676,14 +4696,13 @@
 }
 
 SDOperand X86TargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG) {
-  SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
+  const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
 
   if (!Subtarget->is64Bit()) {
     // vastart just stores the address of the VarArgsFrameIndex slot into the
     // memory location argument.
     SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
-    return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1), SV->getValue(),
-                        SV->getOffset());
+    return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1), SV, 0);
   }
 
   // __va_list_tag:
@@ -4696,28 +4715,26 @@
   // Store gp_offset
   SDOperand Store = DAG.getStore(Op.getOperand(0),
                                  DAG.getConstant(VarArgsGPOffset, MVT::i32),
-                                 FIN, SV->getValue(), SV->getOffset());
+                                 FIN, SV, 0);
   MemOps.push_back(Store);
 
   // Store fp_offset
   FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, DAG.getIntPtrConstant(4));
   Store = DAG.getStore(Op.getOperand(0),
                        DAG.getConstant(VarArgsFPOffset, MVT::i32),
-                       FIN, SV->getValue(), SV->getOffset());
+                       FIN, SV, 0);
   MemOps.push_back(Store);
 
   // Store ptr to overflow_arg_area
   FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, DAG.getIntPtrConstant(4));
   SDOperand OVFIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
-  Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, SV->getValue(),
-                       SV->getOffset());
+  Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, SV, 0);
   MemOps.push_back(Store);
 
   // Store ptr to reg_save_area.
   FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, DAG.getIntPtrConstant(8));
   SDOperand RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy());
-  Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, SV->getValue(),
-                       SV->getOffset());
+  Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, SV, 0);
   MemOps.push_back(Store);
   return DAG.getNode(ISD::TokenFactor, MVT::Other, &MemOps[0], MemOps.size());
 }
@@ -4727,18 +4744,15 @@
   SDOperand Chain = Op.getOperand(0);
   SDOperand DstPtr = Op.getOperand(1);
   SDOperand SrcPtr = Op.getOperand(2);
-  SrcValueSDNode *DstSV = cast<SrcValueSDNode>(Op.getOperand(3));
-  SrcValueSDNode *SrcSV = cast<SrcValueSDNode>(Op.getOperand(4));
+  const Value *DstSV = cast<SrcValueSDNode>(Op.getOperand(3))->getValue();
+  const Value *SrcSV = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
 
-  SrcPtr = DAG.getLoad(getPointerTy(), Chain, SrcPtr,
-                       SrcSV->getValue(), SrcSV->getOffset());
+  SrcPtr = DAG.getLoad(getPointerTy(), Chain, SrcPtr, SrcSV, 0);
   Chain = SrcPtr.getValue(1);
   for (unsigned i = 0; i < 3; ++i) {
-    SDOperand Val = DAG.getLoad(MVT::i64, Chain, SrcPtr,
-                                SrcSV->getValue(), SrcSV->getOffset());
+    SDOperand Val = DAG.getLoad(MVT::i64, Chain, SrcPtr, SrcSV, 0);
     Chain = Val.getValue(1);
-    Chain = DAG.getStore(Chain, Val, DstPtr,
-                         DstSV->getValue(), DstSV->getOffset());
+    Chain = DAG.getStore(Chain, Val, DstPtr, DstSV, 0);
     if (i == 2)
       break;
     SrcPtr = DAG.getNode(ISD::ADD, getPointerTy(), SrcPtr, 
@@ -4918,7 +4932,7 @@
   SDOperand FPtr = Op.getOperand(2); // nested function
   SDOperand Nest = Op.getOperand(3); // 'nest' parameter value
 
-  SrcValueSDNode *TrmpSV = cast<SrcValueSDNode>(Op.getOperand(4));
+  const Value *TrmpAddr = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
 
   const X86InstrInfo *TII =
     ((X86TargetMachine&)getTargetMachine()).getInstrInfo();
@@ -4942,33 +4956,31 @@
     unsigned OpCode = ((MOV64ri | N86R11) << 8) | REX_WB; // movabsq r11
     SDOperand Addr = Trmp;
     OutChains[0] = DAG.getStore(Root, DAG.getConstant(OpCode, MVT::i16), Addr,
-                                TrmpSV->getValue(), TrmpSV->getOffset());
+                                TrmpAddr, 0);
 
     Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(2, MVT::i64));
-    OutChains[1] = DAG.getStore(Root, FPtr, Addr, TrmpSV->getValue(),
-                                TrmpSV->getOffset() + 2, false, 2);
+    OutChains[1] = DAG.getStore(Root, FPtr, Addr, TrmpAddr, 2, false, 2);
 
     // Load the 'nest' parameter value into R10.
     // R10 is specified in X86CallingConv.td
     OpCode = ((MOV64ri | N86R10) << 8) | REX_WB; // movabsq r10
     Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(10, MVT::i64));
     OutChains[2] = DAG.getStore(Root, DAG.getConstant(OpCode, MVT::i16), Addr,
-                                TrmpSV->getValue(), TrmpSV->getOffset() + 10);
+                                TrmpAddr, 10);
 
     Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(12, MVT::i64));
-    OutChains[3] = DAG.getStore(Root, Nest, Addr, TrmpSV->getValue(),
-                                TrmpSV->getOffset() + 12, false, 2);
+    OutChains[3] = DAG.getStore(Root, Nest, Addr, TrmpAddr, 12, false, 2);
 
     // Jump to the nested function.
     OpCode = (JMP64r << 8) | REX_WB; // jmpq *...
     Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(20, MVT::i64));
     OutChains[4] = DAG.getStore(Root, DAG.getConstant(OpCode, MVT::i16), Addr,
-                                TrmpSV->getValue(), TrmpSV->getOffset() + 20);
+                                TrmpAddr, 20);
 
     unsigned char ModRM = N86R11 | (4 << 3) | (3 << 6); // ...r11
     Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(22, MVT::i64));
     OutChains[5] = DAG.getStore(Root, DAG.getConstant(ModRM, MVT::i8), Addr,
-                                TrmpSV->getValue(), TrmpSV->getOffset() + 22);
+                                TrmpAddr, 22);
 
     SDOperand Ops[] =
       { Trmp, DAG.getNode(ISD::TokenFactor, MVT::Other, OutChains, 6) };
@@ -5026,20 +5038,18 @@
     const unsigned char N86Reg =
       ((X86RegisterInfo*)RegInfo)->getX86RegNum(NestReg);
     OutChains[0] = DAG.getStore(Root, DAG.getConstant(MOV32ri|N86Reg, MVT::i8),
-                                Trmp, TrmpSV->getValue(), TrmpSV->getOffset());
+                                Trmp, TrmpAddr, 0);
 
     Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(1, MVT::i32));
-    OutChains[1] = DAG.getStore(Root, Nest, Addr, TrmpSV->getValue(),
-                                TrmpSV->getOffset() + 1, false, 1);
+    OutChains[1] = DAG.getStore(Root, Nest, Addr, TrmpAddr, 1, false, 1);
 
     const unsigned char JMP = TII->getBaseOpcodeFor(X86::JMP);
     Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(5, MVT::i32));
     OutChains[2] = DAG.getStore(Root, DAG.getConstant(JMP, MVT::i8), Addr,
-                                TrmpSV->getValue() + 5, TrmpSV->getOffset());
+                                TrmpAddr, 5, false, 1);
 
     Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(6, MVT::i32));
-    OutChains[3] = DAG.getStore(Root, Disp, Addr, TrmpSV->getValue(),
-                                TrmpSV->getOffset() + 6, false, 1);
+    OutChains[3] = DAG.getStore(Root, Disp, Addr, TrmpAddr, 6, false, 1);
 
     SDOperand Ops[] =
       { Trmp, DAG.getNode(ISD::TokenFactor, MVT::Other, OutChains, 4) };