diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 22cdb4f..f965c5f 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -436,7 +436,7 @@
 LiveIntervals::Interval::Interval(unsigned r)
     : reg(r),
       weight((MRegisterInfo::isPhysicalRegister(r) ?
-              std::numeric_limits<float>::max() : 0.0F))
+              std::numeric_limits<float>::infinity() : 0.0F))
 {
 
 }
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index d26ee8f..0369a88 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -641,7 +641,7 @@
 
     DEBUG(std::cerr << "\t\tassigning stack slot at interval "<< *cur << ":\n");
 
-    float minWeight = std::numeric_limits<float>::max();
+    float minWeight = std::numeric_limits<float>::infinity();
     unsigned minReg = 0;
     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
     for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);