Allow itineraries to be passed through the Target Machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp
index 94af54c..442017d 100644
--- a/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -71,6 +71,7 @@
PPCSubtarget::PPCSubtarget(const Module &M, const std::string &FS)
: StackAlignment(16)
+ , InstrItins()
, IsGigaProcessor(false)
, Is64Bit(false)
, Has64BitRegs(false)
diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h
index a457751..3f1454c 100644
--- a/lib/Target/PowerPC/PPCSubtarget.h
+++ b/lib/Target/PowerPC/PPCSubtarget.h
@@ -14,6 +14,7 @@
#ifndef POWERPCSUBTARGET_H
#define POWERPCSUBTARGET_H
+#include "llvm/Target/TargetInstrItineraries.h"
#include "llvm/Target/TargetSubtarget.h"
#include <string>
@@ -26,6 +27,9 @@
/// stackAlignment - The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned StackAlignment;
+
+ /// Selected instruction itineraries (one entry per itinerary class.)
+ InstrItineraryData InstrItins;
/// Used by the ISel to turn in optimizations for POWER4-derived architectures
bool IsGigaProcessor;
@@ -49,6 +53,11 @@
/// stack frame on entry to the function and which must be maintained by every
/// function for this subtarget.
unsigned getStackAlignment() const { return StackAlignment; }
+
+ /// getInstrItins - Return the instruction itineraies based on subtarget
+ /// selection.
+ const InstrItineraryData getInstrItineraryData() const { return InstrItins; }
+
bool hasFSQRT() const { return HasFSQRT; }
bool has64BitRegs() const { return Has64BitRegs; }
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index bd31e97..9a88750 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -64,7 +64,8 @@
PPCTargetMachine::PPCTargetMachine(const Module &M, IntrinsicLowering *IL,
const std::string &FS)
: TargetMachine("PowerPC", IL, false, 4, 4, 4, 4, 4, 4, 2, 1, 1),
- Subtarget(M, FS), FrameInfo(*this, false), JITInfo(*this) {
+ Subtarget(M, FS), FrameInfo(*this, false), JITInfo(*this),
+ InstrItins(Subtarget.getInstrItineraryData()) {
if (TargetDefault == PPCTarget) {
if (Subtarget.isAIX()) PPCTarget = TargetAIX;
if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
diff --git a/lib/Target/PowerPC/PPCTargetMachine.h b/lib/Target/PowerPC/PPCTargetMachine.h
index 5ba4f32..1295a59 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/lib/Target/PowerPC/PPCTargetMachine.h
@@ -27,10 +27,11 @@
class IntrinsicLowering;
class PPCTargetMachine : public TargetMachine {
- PPCInstrInfo InstrInfo;
- PPCSubtarget Subtarget;
- PPCFrameInfo FrameInfo;
- PPCJITInfo JITInfo;
+ PPCInstrInfo InstrInfo;
+ PPCSubtarget Subtarget;
+ PPCFrameInfo FrameInfo;
+ PPCJITInfo JITInfo;
+ InstrItineraryData InstrItins;
public:
PPCTargetMachine(const Module &M, IntrinsicLowering *IL,
const std::string &FS);
@@ -42,6 +43,10 @@
virtual const MRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}
+ virtual const InstrItineraryData getInstrItineraryData() const {
+ return InstrItins;
+ }
+
static unsigned getJITMatchQuality();