Avoid bad assertion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4918 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp
index 6206059..ae14e41 100644
--- a/lib/Target/X86/Printer.cpp
+++ b/lib/Target/X86/Printer.cpp
@@ -183,7 +183,7 @@
assert(isReg(MI->getOperand(0)) &&
(MI->getNumOperands() == 1 ||
(MI->getNumOperands() == 2 &&
- (MI->getOperand(1).getVRegValue() ||
+ (MI->getOperand(1).getVRegValueOrNull() ||
isImmediate(MI->getOperand(1))))) &&
"Illegal form for AddRegFrm instruction!");