Fix a few small typos I noticed when converting this over to the DAG->DAG
selector. Also, there is no difference between addSImm and addImm, so just
use addImm, folding some branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22819 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index e0255df..e1e5c5d 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -36,14 +36,15 @@
using namespace llvm;
namespace {
-Statistic<>Recorded("ppc-codegen", "Number of recording ops emitted");
-Statistic<>FusedFP("ppc-codegen", "Number of fused fp operations");
-Statistic<>FrameOff("ppc-codegen", "Number of frame idx offsets collapsed");
+Statistic<> Recorded("ppc-codegen", "Number of recording ops emitted");
+Statistic<> FusedFP ("ppc-codegen", "Number of fused fp operations");
+Statistic<> FrameOff("ppc-codegen", "Number of frame idx offsets collapsed");
//===--------------------------------------------------------------------===//
-/// ISel - PPC32 specific code to select PPC32 machine instructions for
-/// SelectionDAG operations.
+// ISel - PPC32 specific code to select PPC32 machine instructions for
+// SelectionDAG operations.
//===--------------------------------------------------------------------===//
+
class ISel : public SelectionDAGISel {
PPC32TargetLowering PPC32Lowering;
SelectionDAG *ISelDAG; // Hack to support us having a dag->dag transform
@@ -764,7 +765,7 @@
// exit if not a constant
if (!CN) return false;
// extract immediate
- unsigned C = (unsigned)CN->getSignExtended();
+ unsigned C = (unsigned)CN->getValue();
// negate if required (ISD::SUB)
if (Negate) C = -C;
// get the hi and lo portions of constant
@@ -784,17 +785,15 @@
unsigned Opr0 = SelectExpr(N.getOperand(0));
// is a lo instruction needed
if (Lo) {
- // generate instruction for hi portion
- const MachineInstrBuilder &MIBLo = BuildMI(BB, OCLo, 2, Tmp).addReg(Opr0);
- if (IsArithmetic) MIBLo.addSImm(Lo); else MIBLo.addImm(Lo);
+ // generate instruction for lo portion
+ BuildMI(BB, OCLo, 2, Tmp).addReg(Opr0).addImm(Lo);
// need to switch out first operand for hi instruction
Opr0 = Tmp;
}
- // is a ho instruction needed
+ // is a hi instruction needed
if (Hi) {
// generate instruction for hi portion
- const MachineInstrBuilder &MIBHi = BuildMI(BB, OCHi, 2, Result).addReg(Opr0);
- if (IsArithmetic) MIBHi.addSImm(Hi); else MIBHi.addImm(Hi);
+ BuildMI(BB, OCHi, 2, Result).addReg(Opr0).addImm(Hi);
}
return true;
}