Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42822 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 98a2495..ce28c79 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -3324,10 +3324,18 @@
case Expand: {
// Convert f32 / f64 to i32 / i64.
MVT::ValueType VT = Op.getValueType();
+ MVT::ValueType OVT = Node->getOperand(0).getValueType();
+ if (OVT == MVT::ppcf128 && VT == MVT::i32) {
+ Result = DAG.getNode(ISD::FP_TO_SINT, VT,
+ DAG.getNode(ISD::FP_ROUND, MVT::f64,
+ (DAG.getNode(ISD::FP_ROUND_INREG,
+ MVT::ppcf128, Node->getOperand(0),
+ DAG.getValueType(MVT::f64)))));
+ break;
+ }
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
switch (Node->getOpcode()) {
case ISD::FP_TO_SINT: {
- MVT::ValueType OVT = Node->getOperand(0).getValueType();
if (OVT == MVT::f32)
LC = (VT == MVT::i32)
? RTLIB::FPTOSINT_F32_I32 : RTLIB::FPTOSINT_F32_I64;
@@ -3345,7 +3353,6 @@
break;
}
case ISD::FP_TO_UINT: {
- MVT::ValueType OVT = Node->getOperand(0).getValueType();
if (OVT == MVT::f32)
LC = (VT == MVT::i32)
? RTLIB::FPTOUINT_F32_I32 : RTLIB::FPTOSINT_F32_I64;
@@ -5159,6 +5166,17 @@
switch (Node->getOpcode()) {
case ISD::CopyFromReg:
assert(0 && "CopyFromReg must be legal!");
+ case ISD::FP_ROUND_INREG:
+ if (VT == MVT::ppcf128 &&
+ TLI.getOperationAction(ISD::FP_ROUND_INREG, VT) ==
+ TargetLowering::Custom) {
+ SDOperand Result = TLI.LowerOperation(Op, DAG);
+ assert(Result.Val->getOpcode() == ISD::BUILD_PAIR);
+ Lo = Result.Val->getOperand(0);
+ Hi = Result.Val->getOperand(1);
+ break;
+ }
+ // fall through
default:
#ifndef NDEBUG
cerr << "NODE: "; Node->dump(&DAG); cerr << "\n";
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index bb5f1b1..2ac30f6 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3033,6 +3033,12 @@
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops, NumOps).Val;
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
+ MVT::ValueType VT2) {
+ const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2);
+ SDOperand Op;
+ return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op, 0).Val;
+}
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
MVT::ValueType VT2, SDOperand Op1) {
const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2);
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op1, 1).Val;