Whoops, fix a thinko. All cases except SETNE are now handled by the
target independent code in SelectionDAG.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23002 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index d927929..2f79380 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -1667,19 +1667,11 @@
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N.getOperand(2));
ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N.getOperand(3));
if (N1C && N2C && N3C && N1C->isNullValue() && N3C->isNullValue() &&
- N2C->getValue() == 1ULL && (CC == ISD::SETNE || CC == ISD::SETEQ)) {
+ N2C->getValue() == 1ULL && CC == ISD::SETNE) {
Tmp1 = SelectExpr(Node->getOperand(0));
Tmp2 = MakeIntReg();
- if (CC == ISD::SETNE) {
- BuildMI(BB, PPC::ADDIC, 2, Tmp2).addReg(Tmp1).addSImm(-1);
- BuildMI(BB, PPC::SUBFE, 2, Result).addReg(Tmp2).addReg(Tmp1);
- } else {
- Tmp3 = MakeIntReg();
- BuildMI(BB, PPC::NEG, 2, Tmp2).addReg(Tmp1);
- BuildMI(BB, PPC::ANDC, 2, Tmp3).addReg(Tmp2).addReg(Tmp1);
- BuildMI(BB, PPC::RLWINM, 4, Result).addReg(Tmp3).addImm(1).addImm(31)
- .addImm(31);
- }
+ BuildMI(BB, PPC::ADDIC, 2, Tmp2).addReg(Tmp1).addSImm(-1);
+ BuildMI(BB, PPC::SUBFE, 2, Result).addReg(Tmp2).addReg(Tmp1);
return Result;
}