Rename MRegisterInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index a4743ed..d65136a 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -44,7 +44,7 @@
private:
MachineFunction *MF;
const TargetMachine *TM;
- const MRegisterInfo *MRI;
+ const TargetRegisterInfo *TRI;
// StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
// these values are spilled
@@ -169,7 +169,7 @@
// Made to combat the incorrect allocation of r2 = add r1, r1
std::map<unsigned, unsigned> Virt2PhysRegMap;
- RegsUsed.resize(MRI->getNumRegs());
+ RegsUsed.resize(TRI->getNumRegs());
// This is a preliminary pass that will invalidate any registers that are
// used by the instruction (including implicit uses).
@@ -192,7 +192,7 @@
MachineOperand &op = MI->getOperand(i);
if (op.isRegister() && op.getReg() &&
- MRegisterInfo::isVirtualRegister(op.getReg())) {
+ TargetRegisterInfo::isVirtualRegister(op.getReg())) {
unsigned virtualReg = (unsigned) op.getReg();
DOUT << "op: " << op << "\n";
DOUT << "\t inst[" << i << "]: ";
@@ -239,7 +239,7 @@
DOUT << "Machine Function\n";
MF = &Fn;
TM = &MF->getTarget();
- MRI = TM->getRegisterInfo();
+ TRI = TM->getRegisterInfo();
// Loop over all of the basic blocks, eliminating virtual register references
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();