commit 6f8c6852a08df9d41f4e0242624ec744cd7e0d2f
author Michael Liao <michael.liao@intel.com> Thu Mar 14 06:57:42 2013 +0000
committer Michael Liao <michael.liao@intel.com> Thu Mar 14 06:57:42 2013 +0000
tree f22996b4d058ed8431221009b0ddc7ec8a8e4e17
parent a3493e2ad8cb2a93484eaca80265290f89311305

Fix PR15309

- Fix the typo on type checking



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177010 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 960870d..b80b899 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -12262,7 +12262,8 @@
     return;
   }
   case ISD::UINT_TO_FP: {
-    if (N->getOperand(0).getValueType() != MVT::v2i32 &&
+    assert(Subtarget->hasSSE2() && "Requires at least SSE2!");
+    if (N->getOperand(0).getValueType() != MVT::v2i32 ||
         N->getValueType(0) != MVT::v2f32)
       return;
     SDValue ZExtIn = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v2i64,