encode BLR predicate info for the JIT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31450 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 81332c1..e072e7e 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -255,9 +255,9 @@
let MIOperandInfo = (ops i32imm, ptr_rc);
}
-// PowerPC Predicate operand. 640 = ((20<<5)|0) = always, CR0 is a dummy reg
+// PowerPC Predicate operand. 20 = (0<<5)|20 = always, CR0 is a dummy reg
// that doesn't matter.
-def pred : PredicateOperand<(ops imm, CRRC), (ops (i32 640), CR0)> {
+def pred : PredicateOperand<(ops imm, CRRC), (ops (i32 20), CR0)> {
let PrintMethod = "printPredicateOperand";
}
@@ -317,9 +317,10 @@
let isTerminator = 1, isBarrier = 1, noResults = 1, PPC970_Unit = 7 in {
let isReturn = 1 in
- def BLR : XLForm_2_ext<19, 16, 20, 0, 0,
- (ops pred:$p),
- "b${p:cc}lr ${p:reg}", BrB, [(retflag)]>;
+ def BLR : XLForm_2_br<19, 16, 0,
+ (ops pred:$p),
+ "b${p:cc}lr ${p:reg}", BrB,
+ [(retflag)]>;
def BCTR : XLForm_2_ext<19, 528, 20, 0, 0, (ops), "bctr", BrB, []>;
}