Make these format a bit nicer


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14747 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index 2cdf30f..4cc0654 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -42,7 +42,7 @@
 
 namespace {
   // Register the target.
-  RegisterTarget<CTargetMachine> X("c", "C backend");
+  RegisterTarget<CTargetMachine> X("c", "  C backend");
 
   /// NameAllUsedStructs - This pass inserts names for any unnamed structure
   /// types that are used by the program.
diff --git a/lib/Target/CBackend/Writer.cpp b/lib/Target/CBackend/Writer.cpp
index 2cdf30f..4cc0654 100644
--- a/lib/Target/CBackend/Writer.cpp
+++ b/lib/Target/CBackend/Writer.cpp
@@ -42,7 +42,7 @@
 
 namespace {
   // Register the target.
-  RegisterTarget<CTargetMachine> X("c", "C backend");
+  RegisterTarget<CTargetMachine> X("c", "  C backend");
 
   /// NameAllUsedStructs - This pass inserts names for any unnamed structure
   /// types that are used by the program.
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 1d6898a..6593fcd 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -25,7 +25,7 @@
 
 namespace {
   // Register the target.
-  RegisterTarget<PowerPCTargetMachine> X("powerpc", "PowerPC (experimental)");
+  RegisterTarget<PowerPCTargetMachine> X("powerpc", "  PowerPC (experimental)");
 }
 
 // allocatePowerPCTargetMachine - Allocate and return a subclass of 
diff --git a/lib/Target/PowerPC/PowerPCTargetMachine.cpp b/lib/Target/PowerPC/PowerPCTargetMachine.cpp
index 7132e5d..a9b9cde 100644
--- a/lib/Target/PowerPC/PowerPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PowerPCTargetMachine.cpp
@@ -22,7 +22,7 @@
 
 namespace {
   // Register the target.
-  RegisterTarget<PowerPCTargetMachine> X("powerpc", "PowerPC (experimental)");
+  RegisterTarget<PowerPCTargetMachine> X("powerpc", "  PowerPC (experimental)");
 }
 
 // allocatePowerPCTargetMachine - Allocate and return a subclass of 
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index 4a8a394..1ca3432 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -24,7 +24,7 @@
 
 namespace {
   // Register the target.
-  RegisterTarget<SparcV8TargetMachine> X("sparcv8", "SPARC V8 (experimental)");
+  RegisterTarget<SparcV8TargetMachine> X("sparcv8","  SPARC V8 (experimental)");
 }
 
 // allocateSparcV8TargetMachine - Allocate and return a subclass of 
diff --git a/lib/Target/SparcV8/SparcV8TargetMachine.cpp b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
index 4a8a394..1ca3432 100644
--- a/lib/Target/SparcV8/SparcV8TargetMachine.cpp
+++ b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
@@ -24,7 +24,7 @@
 
 namespace {
   // Register the target.
-  RegisterTarget<SparcV8TargetMachine> X("sparcv8", "SPARC V8 (experimental)");
+  RegisterTarget<SparcV8TargetMachine> X("sparcv8","  SPARC V8 (experimental)");
 }
 
 // allocateSparcV8TargetMachine - Allocate and return a subclass of 
diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
index e114674..6fbc685 100644
--- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
@@ -61,7 +61,7 @@
                       cl::desc("Do not strip the LLVM bytecode in executable"));
 
   // Register the target.
-  RegisterTarget<SparcV9TargetMachine> X("sparcv9", "SPARC V9");
+  RegisterTarget<SparcV9TargetMachine> X("sparcv9", "  SPARC V9");
 }
 
 unsigned SparcV9TargetMachine::getJITMatchQuality() {
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 3ee9dd2..7871316 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -38,7 +38,7 @@
 	     cl::desc("Use the hand coded 'simple' X86 instruction selector"));
 
   // Register the target.
-  RegisterTarget<X86TargetMachine> X("x86", "IA-32 (Pentium and above)");
+  RegisterTarget<X86TargetMachine> X("x86", "  IA-32 (Pentium and above)");
 }
 
 // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine