Ignore register mask operands when lowering instructions to MC.
This is similar to implicit register operands. MC doesn't understand
register liveness and call clobbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCMCInstLower.cpp b/lib/Target/PowerPC/PPCMCInstLower.cpp
index 33af426..ff6ebba 100644
--- a/lib/Target/PowerPC/PPCMCInstLower.cpp
+++ b/lib/Target/PowerPC/PPCMCInstLower.cpp
@@ -166,6 +166,8 @@
MCOp = GetSymbolRef(MO,AP.GetBlockAddressSymbol(MO.getBlockAddress()),AP,
isDarwin);
break;
+ case MachineOperand::MO_RegisterMask:
+ continue;
}
OutMI.addOperand(MCOp);