commit 71f0fc1ca88965b69b4b2c8794a7144bc93d4bba
author Jakob Stoklund Olesen <stoklund@2pi.dk> Wed Jan 18 23:52:19 2012 +0000
committer Jakob Stoklund Olesen <stoklund@2pi.dk> Wed Jan 18 23:52:19 2012 +0000
tree 74d90f8e2fc12215de756277e0b66154c392e64f
parent 9cf37e8b48732fccd4c301ed51aafed7074bd84e

Ignore register mask operands when lowering instructions to MC.

This is similar to implicit register operands.  MC doesn't understand
register liveness and call clobbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86MCInstLower.cpp

diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp
index 1f7d422..8955458 100644
--- a/lib/Target/X86/X86MCInstLower.cpp
+++ b/lib/Target/X86/X86MCInstLower.cpp
@@ -335,6 +335,9 @@
       MCOp = LowerSymbolOperand(MO,
                      AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress()));
       break;
+    case MachineOperand::MO_RegisterMask:
+      // Ignore call clobbers.
+      continue;
     }
     
     OutMI.addOperand(MCOp);