Remove the X86 and PowerPC Simple instruction selectors; their time has
passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 18c7fdc..936629a 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -85,13 +85,9 @@
PM.add(createUnreachableBlockEliminationPass());
// Install an instruction selector.
- if (EnablePPCDAGDAG) {
+ if (EnablePPCDAGDAG)
PM.add(createPPC32ISelDag(*this));
-
- } else if (PatternISelTriState == 0) {
- PM.add(createLowerConstantExpressionsPass());
- PM.add(createPPC32ISelSimple(*this));
- } else
+ else
PM.add(createPPC32ISelPattern(*this));
if (PrintMachineCode)
@@ -143,13 +139,8 @@
// Make sure that no unreachable blocks are instruction selected.
PM.add(createUnreachableBlockEliminationPass());
- // Default to pattern ISel
- if (PatternISelTriState == 0) {
- PM.add(createLowerConstantExpressionsPass());
- PM.add(createPPC32ISelSimple(TM));
- } else {
- PM.add(createPPC32ISelPattern(TM));
- }
+ // Install an instruction selector.
+ PM.add(createPPC32ISelPattern(TM));
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());