commit 73ea7bf4509663267317ec3911aac00ca35a2f2c
author Jakob Stoklund Olesen <stoklund@2pi.dk> Mon May 24 14:48:12 2010 +0000
committer Jakob Stoklund Olesen <stoklund@2pi.dk> Mon May 24 14:48:12 2010 +0000
tree 706c544a2d423e2ea4ad29029f525d193bd78c16
parent 3816c25fdc03fb2945ecfe4df41e1834ea386245

Add the SubRegIndex TableGen class.

This is the beginning of purely symbolic subregister indices, but we need a bit
of jiggling before the explicit numeric indices can be completely removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104492 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/FastISelEmitter.cpp

diff --git a/utils/TableGen/FastISelEmitter.cpp b/utils/TableGen/FastISelEmitter.cpp
index ce9d97b..9ec9e08 100644
--- a/utils/TableGen/FastISelEmitter.cpp
+++ b/utils/TableGen/FastISelEmitter.cpp
@@ -31,7 +31,7 @@
 struct InstructionMemo {
   std::string Name;
   const CodeGenRegisterClass *RC;
-  unsigned char SubRegNo;
+  std::string SubRegNo;
   std::vector<std::string>* PhysRegs;
 };
 
@@ -278,7 +278,7 @@
     // For now, ignore instructions where the first operand is not an
     // output register.
     const CodeGenRegisterClass *DstRC = 0;
-    unsigned SubRegNo = ~0;
+    std::string SubRegNo;
     if (Op->getName() != "EXTRACT_SUBREG") {
       Record *Op0Rec = II.OperandList[0].Rec;
       if (!Op0Rec->isSubClassOf("RegisterClass"))
@@ -287,8 +287,11 @@
       if (!DstRC)
         continue;
     } else {
-      SubRegNo = static_cast<IntInit*>(
-                 Dst->getChild(1)->getLeafValue())->getValue();
+      DefInit *SR = dynamic_cast<DefInit*>(Dst->getChild(1)->getLeafValue());
+      if (SR)
+        SubRegNo = getQualifiedName(SR->getDef());
+      else
+        SubRegNo = Dst->getChild(1)->getLeafValue()->getAsString();
     }
 
     // Inspect the pattern.
@@ -437,7 +440,7 @@
               }
               
               OS << "  return FastEmitInst_";
-              if (Memo.SubRegNo == (unsigned char)~0) {
+              if (Memo.SubRegNo.empty()) {
                 Operands.PrintManglingSuffix(OS, *Memo.PhysRegs);
                 OS << "(" << InstNS << Memo.Name << ", ";
                 OS << InstNS << Memo.RC->getName() << "RegisterClass";
@@ -448,7 +451,7 @@
               } else {
                 OS << "extractsubreg(" << getName(RetVT);
                 OS << ", Op0, Op0IsKill, ";
-                OS << (unsigned)Memo.SubRegNo;
+                OS << Memo.SubRegNo;
                 OS << ");\n";
               }
               
@@ -532,7 +535,7 @@
             
             OS << "  return FastEmitInst_";
             
-            if (Memo.SubRegNo == (unsigned char)~0) {
+            if (Memo.SubRegNo.empty()) {
               Operands.PrintManglingSuffix(OS, *Memo.PhysRegs);
               OS << "(" << InstNS << Memo.Name << ", ";
               OS << InstNS << Memo.RC->getName() << "RegisterClass";
@@ -542,7 +545,7 @@
               OS << ");\n";
             } else {
               OS << "extractsubreg(RetVT, Op0, Op0IsKill, ";
-              OS << (unsigned)Memo.SubRegNo;
+              OS << Memo.SubRegNo;
               OS << ");\n";
             }