Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc
into XXXGenRegisterInfo.inc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133922 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/Alpha.h b/lib/Target/Alpha/Alpha.h
index 2c359da..174d261 100644
--- a/lib/Target/Alpha/Alpha.h
+++ b/lib/Target/Alpha/Alpha.h
@@ -44,7 +44,9 @@
// Defines symbolic names for Alpha registers. This defines a mapping from
// register name to register number.
//
-#include "AlphaGenRegisterNames.inc"
+
+#define GET_REGINFO_ENUM
+#include "AlphaGenRegisterInfo.inc"
// Defines symbolic names for the Alpha instructions.
//
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp
index 5ff846e..3eef05f 100644
--- a/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -33,8 +33,11 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include <cstdlib>
-#include "AlphaGenRegisterDesc.inc"
+
+#define GET_REGINFO_MC_DESC
+#define GET_REGINFO_TARGET_DESC
#include "AlphaGenRegisterInfo.inc"
+
using namespace llvm;
AlphaRegisterInfo::AlphaRegisterInfo(const TargetInstrInfo &tii)
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.h b/lib/Target/Alpha/AlphaRegisterInfo.h
index ffe6cf1..1072bf7 100644
--- a/lib/Target/Alpha/AlphaRegisterInfo.h
+++ b/lib/Target/Alpha/AlphaRegisterInfo.h
@@ -15,7 +15,9 @@
#define ALPHAREGISTERINFO_H
#include "llvm/Target/TargetRegisterInfo.h"
-#include "AlphaGenRegisterInfo.h.inc"
+
+#define GET_REGINFO_HEADER
+#include "AlphaGenRegisterInfo.inc"
namespace llvm {
diff --git a/lib/Target/Alpha/CMakeLists.txt b/lib/Target/Alpha/CMakeLists.txt
index 1834b06..bcde447 100644
--- a/lib/Target/Alpha/CMakeLists.txt
+++ b/lib/Target/Alpha/CMakeLists.txt
@@ -1,8 +1,5 @@
set(LLVM_TARGET_DEFINITIONS Alpha.td)
-tablegen(AlphaGenRegisterNames.inc -gen-register-enums)
-tablegen(AlphaGenRegisterDesc.inc -gen-register-desc)
-tablegen(AlphaGenRegisterInfo.h.inc -gen-register-info-header)
tablegen(AlphaGenRegisterInfo.inc -gen-register-info)
tablegen(AlphaGenInstrNames.inc -gen-instr-enums)
tablegen(AlphaGenInstrInfo.inc -gen-instr-desc)
diff --git a/lib/Target/Alpha/Makefile b/lib/Target/Alpha/Makefile
index f029793..bd280a0 100644
--- a/lib/Target/Alpha/Makefile
+++ b/lib/Target/Alpha/Makefile
@@ -12,8 +12,7 @@
TARGET = Alpha
# Make sure that tblgen is run, first thing.
-BUILT_SOURCES = AlphaGenRegisterNames.inc AlphaGenRegisterDesc.inc \
- AlphaGenRegisterInfo.h.inc AlphaGenRegisterInfo.inc \
+BUILT_SOURCES = AlphaGenRegisterInfo.inc \
AlphaGenInstrNames.inc AlphaGenInstrInfo.inc \
AlphaGenAsmWriter.inc AlphaGenDAGISel.inc \
AlphaGenCallingConv.inc AlphaGenSubtarget.inc