Refactor rewinding code for finding the first terminator of a basic
block into MachineBasicBlock::getFirstTerminator().
This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11748 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/CodeGen/MachineBasicBlock.h b/include/llvm/CodeGen/MachineBasicBlock.h
index 44cab9e..0fec6a2 100644
--- a/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/include/llvm/CodeGen/MachineBasicBlock.h
@@ -95,6 +95,11 @@
reverse_iterator rend () { return Insts.rend(); }
const_reverse_iterator rend () const { return Insts.rend(); }
+ /// getFirstTerminator - returns an iterator to the first terminator
+ /// instruction of this basic block. If a terminator does not exist,
+ /// it returns end()
+ iterator getFirstTerminator();
+
void push_back(MachineInstr *MI) { Insts.push_back(MI); }
template<typename IT>
void insert(iterator I, IT S, IT E) { Insts.insert(I, S, E); }
diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp
index 9d65453..89763ba 100644
--- a/lib/CodeGen/MachineBasicBlock.cpp
+++ b/lib/CodeGen/MachineBasicBlock.cpp
@@ -15,6 +15,8 @@
#include "llvm/BasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/TargetMachine.h"
#include "Support/LeakDetector.h"
using namespace llvm;
@@ -56,6 +58,16 @@
first->parent = toList.parent;
}
+MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator()
+{
+ const TargetInstrInfo& TII = MachineFunction::get(
+ getBasicBlock()->getParent()).getTarget().getInstrInfo();
+ iterator I = end();
+ while (I != begin() && TII.isTerminatorInstr((--I)->getOpcode()));
+ if (I != end() && !TII.isTerminatorInstr(I->getOpcode())) ++I;
+ return I;
+}
+
void MachineBasicBlock::dump() const
{
print(std::cerr);
diff --git a/lib/CodeGen/PHIElimination.cpp b/lib/CodeGen/PHIElimination.cpp
index 0630582..ea464c9 100644
--- a/lib/CodeGen/PHIElimination.cpp
+++ b/lib/CodeGen/PHIElimination.cpp
@@ -143,22 +143,7 @@
// source path the PHI.
MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
- // Figure out where to insert the copy, which is at the end of the
- // predecessor basic block, but before any terminator/branch
- // instructions...
- MachineBasicBlock::iterator I = opBlock.end();
- if (I != opBlock.begin()) { // Handle empty blocks
- --I;
- // must backtrack over ALL the branches in the previous block
- while (MII.isTerminatorInstr(I->getOpcode()) &&
- I != opBlock.begin())
- --I;
-
- // move back to the first branch instruction so new instructions
- // are inserted right in front of it and not in front of a non-branch
- if (!MII.isTerminatorInstr(I->getOpcode()))
- ++I;
- }
+ MachineBasicBlock::iterator I = opBlock.getFirstTerminator();
// Check to make sure we haven't already emitted the copy for this block.
// This can happen because PHI nodes may have multiple entries for the
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 38e0073..a3d6639 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -649,11 +649,7 @@
}
}
- // Rewind the iterator to point to the first flow control instruction...
- const TargetInstrInfo &TII = TM->getInstrInfo();
- MI = MBB.end();
- while (MI != MBB.begin() && TII.isTerminatorInstr((--MI)->getOpcode()));
- if (MI != MBB.end()) ++MI;
+ MI = MBB.getFirstTerminator();
// Spill all physical registers holding virtual registers now.
for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index 2675a04..4ebffeb 100644
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -679,7 +679,6 @@
//
void ISel::InsertFPRegKills() {
SSARegMap &RegMap = *F->getSSARegMap();
- const TargetInstrInfo &TII = TM.getInstrInfo();
for (MachineFunction::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) {
for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); I!=E; ++I)
@@ -709,11 +708,7 @@
// it's not an unwind/return), insert the FP_REG_KILL instruction.
if (BB->getBasicBlock()->getTerminator()->getNumSuccessors() &&
RequiresFPRegKill(BB->getBasicBlock())) {
- // Rewind past any terminator instructions that might exist.
- MachineBasicBlock::iterator I = BB->end();
- while (I != BB->begin() && TII.isTerminatorInstr((--I)->getOpcode()));
- if (I != BB->end()) ++I;
- BMI(BB, I, X86::FP_REG_KILL, 0);
+ BMI(BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0);
++NumFPKill;
}
}
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index 2675a04..4ebffeb 100644
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -679,7 +679,6 @@
//
void ISel::InsertFPRegKills() {
SSARegMap &RegMap = *F->getSSARegMap();
- const TargetInstrInfo &TII = TM.getInstrInfo();
for (MachineFunction::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) {
for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); I!=E; ++I)
@@ -709,11 +708,7 @@
// it's not an unwind/return), insert the FP_REG_KILL instruction.
if (BB->getBasicBlock()->getTerminator()->getNumSuccessors() &&
RequiresFPRegKill(BB->getBasicBlock())) {
- // Rewind past any terminator instructions that might exist.
- MachineBasicBlock::iterator I = BB->end();
- while (I != BB->begin() && TII.isTerminatorInstr((--I)->getOpcode()));
- if (I != BB->end()) ++I;
- BMI(BB, I, X86::FP_REG_KILL, 0);
+ BMI(BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0);
++NumFPKill;
}
}