Make sure to sext or trunc the result from the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136444 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 5601300..2b556bc 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -1822,7 +1822,7 @@
AddLandingPadInfo(LP, MMI, MBB);
SmallVector<EVT, 2> ValueVTs;
- ComputeValueVTs(TLI, LP.getType(),ValueVTs);
+ ComputeValueVTs(TLI, LP.getType(), ValueVTs);
// Insert the EXCEPTIONADDR instruction.
assert(FuncInfo.MBB->isLandingPad() &&
@@ -1839,10 +1839,10 @@
Ops[1] = Chain;
SDValue Op2 = DAG.getNode(ISD::EHSELECTION, getCurDebugLoc(), VTs, Ops, 2);
Chain = Op2.getValue(1);
+ Op2 = DAG.getSExtOrTrunc(Op2, getCurDebugLoc(), MVT::i32)
Ops[0] = Op1;
Ops[1] = Op2;
-
SDValue Res = DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
&Ops[0], 2);