commit 749c6f6b5ed301c84aac562e414486549d7b98eb
author Chris Lattner <sabre@nondot.org> Mon Jan 07 07:27:27 2008 +0000
committer Chris Lattner <sabre@nondot.org> Mon Jan 07 07:27:27 2008 +0000
tree 275f34b73cd0673d5e8fdcfe02cdb6d60c5422c2
parent 682b8aed0779ac0c9a6a13d79ccc1cff3e9730cf

rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/LiveIntervalAnalysis.cpp

diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 3d0e23c..80d3547 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -615,9 +615,9 @@
     return false;
 
   isLoad = false;
-  const TargetInstrDescriptor *TID = MI->getDesc();
-  if (TID->isImplicitDef() || tii_->isTriviallyReMaterializable(MI)) {
-    isLoad = TID->isSimpleLoad();
+  const TargetInstrDesc &TID = MI->getDesc();
+  if (TID.isImplicitDef() || tii_->isTriviallyReMaterializable(MI)) {
+    isLoad = TID.isSimpleLoad();
     return true;
   }
 
@@ -679,9 +679,9 @@
                                          SmallVector<unsigned, 2> &Ops,
                                          bool isSS, int Slot, unsigned Reg) {
   unsigned MRInfo = 0;
-  const TargetInstrDescriptor *TID = MI->getDesc();
+  const TargetInstrDesc &TID = MI->getDesc();
   // If it is an implicit def instruction, just delete it.
-  if (TID->isImplicitDef()) {
+  if (TID.isImplicitDef()) {
     RemoveMachineInstrFromMaps(MI);
     vrm.RemoveMachineInstrFromMaps(MI);
     MI->eraseFromParent();
@@ -699,7 +699,7 @@
       MRInfo |= (unsigned)VirtRegMap::isMod;
     else {
       // Filter out two-address use operand(s).
-      if (TID->getOperandConstraint(OpIdx, TOI::TIED_TO) != -1) {
+      if (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1) {
         MRInfo = VirtRegMap::isModRef;
         continue;
       }
@@ -1225,7 +1225,7 @@
     int LdSlot = 0;
     bool isLoadSS = DefIsReMat && tii_->isLoadFromStackSlot(ReMatDefMI, LdSlot);
     bool isLoad = isLoadSS ||
-      (DefIsReMat && (ReMatDefMI->getDesc()->isSimpleLoad()));
+      (DefIsReMat && (ReMatDefMI->getDesc().isSimpleLoad()));
     bool IsFirstRange = true;
     for (LiveInterval::Ranges::const_iterator
            I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) {
@@ -1307,7 +1307,7 @@
     int LdSlot = 0;
     bool isLoadSS = DefIsReMat && tii_->isLoadFromStackSlot(ReMatDefMI, LdSlot);
     bool isLoad = isLoadSS ||
-      (DefIsReMat && ReMatDefMI->getDesc()->isSimpleLoad());
+      (DefIsReMat && ReMatDefMI->getDesc().isSimpleLoad());
     rewriteInstructionsForSpills(li, TrySplit, I, ReMatOrigDefMI, ReMatDefMI,
                                Slot, LdSlot, isLoad, isLoadSS, DefIsReMat,
                                CanDelete, vrm, RegInfo, rc, ReMatIds, loopInfo,
@@ -1422,7 +1422,7 @@
           int LdSlot = 0;
           bool isLoadSS = tii_->isLoadFromStackSlot(ReMatDefMI, LdSlot);
           // If the rematerializable def is a load, also try to fold it.
-          if (isLoadSS || ReMatDefMI->getDesc()->isSimpleLoad())
+          if (isLoadSS || ReMatDefMI->getDesc().isSimpleLoad())
             Folded = tryFoldMemoryOperand(MI, vrm, ReMatDefMI, index,
                                           Ops, isLoadSS, LdSlot, VReg);
         }
@@ -1450,7 +1450,7 @@
         MachineInstr *LastUse = getInstructionFromIndex(LastUseIdx);
         int UseIdx = LastUse->findRegisterUseOperandIdx(LI->reg);
         assert(UseIdx != -1);
-        if (LastUse->getDesc()->getOperandConstraint(UseIdx, TOI::TIED_TO) ==
+        if (LastUse->getDesc().getOperandConstraint(UseIdx, TOI::TIED_TO) ==
             -1) {
           LastUse->getOperand(UseIdx).setIsKill();
           vrm.addKillPoint(LI->reg, LastUseIdx);