commit 75361b69f3f327842b9dad69fa7f28ae3b688412
author Chris Lattner <sabre@nondot.org> Wed Apr 07 22:58:41 2010 +0000
committer Chris Lattner <sabre@nondot.org> Wed Apr 07 22:58:41 2010 +0000
tree 5308b9ca3c47b10d83068cbbd7c13bcf8cca7f73
parent e3a601b648e4cbb916e33f969a1b9d3d40b36734

rename llvm::llvm_report_error -> llvm::report_fatal_error



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 85c30ab..583161f 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -4993,7 +4993,7 @@
     if (isIndirect) {
       const llvm::PointerType *PtrTy = dyn_cast<PointerType>(OpTy);
       if (!PtrTy)
-        llvm_report_error("Indirect operand for inline asm not a pointer!");
+        report_fatal_error("Indirect operand for inline asm not a pointer!");
       OpTy = PtrTy->getElementType();
     }
 
@@ -5331,7 +5331,7 @@
              Input.ConstraintVT.isInteger()) ||
             (OpInfo.ConstraintVT.getSizeInBits() !=
              Input.ConstraintVT.getSizeInBits())) {
-          llvm_report_error("Unsupported asm: input constraint"
+          report_fatal_error("Unsupported asm: input constraint"
                             " with a matching output constraint of incompatible"
                             " type!");
         }
@@ -5444,7 +5444,7 @@
       // Copy the output from the appropriate register.  Find a register that
       // we can use.
       if (OpInfo.AssignedRegs.Regs.empty())
-        llvm_report_error("Couldn't allocate output reg for"
+        report_fatal_error("Couldn't allocate output reg for"
                           " constraint '" + OpInfo.ConstraintCode + "'!");
 
       // If this is an indirect operand, store through the pointer after the
@@ -5497,7 +5497,7 @@
             InlineAsm::isRegDefEarlyClobberKind(OpFlag)) {
           // Add (OpFlag&0xffff)>>3 registers to MatchedRegs.
           if (OpInfo.isIndirect)
-            llvm_report_error("Don't know how to handle tied indirect "
+            report_fatal_error("Don't know how to handle tied indirect "
                               "register inputs yet!");
           RegsForValue MatchedRegs;
           MatchedRegs.TLI = &TLI;
@@ -5540,7 +5540,7 @@
         TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode[0],
                                          hasMemory, Ops, DAG);
         if (Ops.empty()) {
-          llvm_report_error("Invalid operand for inline asm"
+          report_fatal_error("Invalid operand for inline asm"
                             " constraint '" + OpInfo.ConstraintCode + "'!");
         }
 
@@ -5575,7 +5575,7 @@
       // Copy the input into the appropriate registers.
       if (OpInfo.AssignedRegs.Regs.empty() ||
           !OpInfo.AssignedRegs.areValueTypesLegal()) {
-        llvm_report_error("Couldn't allocate input reg for"
+        report_fatal_error("Couldn't allocate input reg for"
                           " constraint '"+ OpInfo.ConstraintCode +"'!");
       }