Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).
rdar://9437928 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/ARM/fast-isel.ll b/test/CodeGen/ARM/fast-isel.ll
index 6aad92f..8299c81 100644
--- a/test/CodeGen/ARM/fast-isel.ll
+++ b/test/CodeGen/ARM/fast-isel.ll
@@ -61,3 +61,74 @@
; THUMB: orr {{.*}} #4
; ARM: orr {{.*}} #4
}
+
+define void @test3(i32 %tmp, i32* %ptr1, i16* %ptr2, i8* %ptr3) nounwind {
+; THUMB: test3:
+; ARM: test3:
+
+bb1:
+ %a1 = trunc i32 %tmp to i16
+ %a2 = trunc i16 %a1 to i8
+ %a3 = trunc i8 %a2 to i1
+ %a4 = zext i1 %a3 to i8
+ store i8 %a4, i8* %ptr3
+ %a5 = zext i8 %a4 to i16
+ store i16 %a5, i16* %ptr2
+ %a6 = zext i16 %a5 to i32
+ store i32 %a6, i32* %ptr1
+ br label %bb2
+
+; THUMB: and
+; THUMB: strb
+; THUMB: uxtb
+; THUMB: strh
+; THUMB: uxth
+; ARM: and
+; ARM: strb
+; ARM: uxtb
+; ARM: strh
+; ARM: uxth
+
+bb2:
+ %b1 = trunc i32 %tmp to i16
+ %b2 = trunc i16 %b1 to i8
+ store i8 %b2, i8* %ptr3
+ %b3 = sext i8 %b2 to i16
+ store i16 %b3, i16* %ptr2
+ %b4 = sext i16 %b3 to i32
+ store i32 %b4, i32* %ptr1
+ br label %bb3
+
+; THUMB: strb
+; THUMB: sxtb
+; THUMB: strh
+; THUMB: sxth
+; ARM: strb
+; ARM: sxtb
+; ARM: strh
+; ARM: sxth
+
+bb3:
+ %c1 = load i8* %ptr3
+ %c2 = load i16* %ptr2
+ %c3 = load i32* %ptr1
+ %c4 = zext i8 %c1 to i32
+ %c5 = sext i16 %c2 to i32
+ %c6 = add i32 %c4, %c5
+ %c7 = sub i32 %c3, %c6
+ store i32 %c7, i32* %ptr1
+ ret void
+
+; THUMB: ldrb
+; THUMB: ldrh
+; THUMB: uxtb
+; THUMB: sxth
+; THUMB: add
+; THUMB: sub
+; ARM: ldrb
+; ARM: ldrh
+; ARM: uxtb
+; ARM: sxth
+; ARM: add
+; ARM: sub
+}
\ No newline at end of file
diff --git a/test/CodeGen/X86/fast-isel-i1.ll b/test/CodeGen/X86/fast-isel-i1.ll
index 5d572c1..8e01968 100644
--- a/test/CodeGen/X86/fast-isel-i1.ll
+++ b/test/CodeGen/X86/fast-isel-i1.ll
@@ -1,14 +1,15 @@
-; RUN: llc < %s -march=x86 -fast-isel | FileCheck %s
+; RUN: llc < %s -march=x86 -fast-isel -fast-isel-abort | FileCheck %s
+; RUN: llc < %s -march=x86-64 -fast-isel -fast-isel-abort | FileCheck %s
-declare i64 @test1a(i64)
+declare i32 @test1a(i32)
-define i32 @test1(i64 %x) nounwind {
+define i32 @test1(i32 %x) nounwind {
; CHECK: test1:
; CHECK: andb $1, %
- %y = add i64 %x, -3
- %t = call i64 @test1a(i64 %y)
- %s = mul i64 %t, 77
- %z = trunc i64 %s to i1
+ %y = add i32 %x, -3
+ %t = call i32 @test1a(i32 %y)
+ %s = mul i32 %t, 77
+ %z = trunc i32 %s to i1
br label %next
next: ; preds = %0