commit 769b481e9f57b9fa2acf6c5fe0a94877520fcec3
author Anton Korobeynikov <asl@math.spbu.ru> Wed Apr 23 18:22:28 2008 +0000
committer Anton Korobeynikov <asl@math.spbu.ru> Wed Apr 23 18:22:28 2008 +0000
tree 01dafcbe4bb5a2392dafa7cc0db5b71e5178d826
parent aadc780a56820c263dca141b2b9f9e39355f6991

Add facility for pre-RA passes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50165 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/LLVMTargetMachine.cpp

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index c65a6b9..3927eee 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -94,6 +94,10 @@
   if (EnableSinking)
     PM.add(createMachineSinkingPass());
 
+  // Run pre-ra passes.
+  if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   // Perform register allocation to convert to a concrete x86 representation
   PM.add(createRegisterAllocator());