Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index e41f75a..da34ebf 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -309,6 +309,11 @@
throw "Could not find 'IMPLICIT_DEF' instruction!";
const CodeGenInstruction *IMPLICIT_DEF = &I->second;
+ I = getInstructions().find("SUBREG_TO_REG");
+ if (I == Instructions.end())
+ throw "Could not find 'SUBREG_TO_REG' instruction!";
+ const CodeGenInstruction *SUBREG_TO_REG = &I->second;
+
// Print out the rest of the instructions now.
NumberedInstructions.push_back(PHI);
NumberedInstructions.push_back(INLINEASM);
@@ -317,6 +322,7 @@
NumberedInstructions.push_back(EXTRACT_SUBREG);
NumberedInstructions.push_back(INSERT_SUBREG);
NumberedInstructions.push_back(IMPLICIT_DEF);
+ NumberedInstructions.push_back(SUBREG_TO_REG);
for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
if (&II->second != PHI &&
&II->second != INLINEASM &&
@@ -324,7 +330,8 @@
&II->second != DECLARE &&
&II->second != EXTRACT_SUBREG &&
&II->second != INSERT_SUBREG &&
- &II->second != IMPLICIT_DEF)
+ &II->second != IMPLICIT_DEF &&
+ &II->second != SUBREG_TO_REG)
NumberedInstructions.push_back(&II->second);
}