commit 7740daa8ba053294b7448556c049cf6778711d66
author Michel Danzer <michel.daenzer@amd.com> Wed Jul 10 16:36:43 2013 +0000
committer Michel Danzer <michel.daenzer@amd.com> Wed Jul 10 16:36:43 2013 +0000
tree ccbd3219bd492392ef21fc62e01406d55ae66c5a
parent 0a9aaacd7298e4108eeecef7bad7933ae7cf36c4

R600/SI: Initial support for LDS/GDS instructions

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186009 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/R600/SIInsertWaits.cpp

diff --git a/lib/Target/R600/SIInsertWaits.cpp b/lib/Target/R600/SIInsertWaits.cpp
index c36e1dc..d31da45 100644
--- a/lib/Target/R600/SIInsertWaits.cpp
+++ b/lib/Target/R600/SIInsertWaits.cpp
@@ -134,6 +134,8 @@
   if (TSFlags & SIInstrFlags::LGKM_CNT) {
 
     MachineOperand &Op = MI.getOperand(0);
+    if (!Op.isReg())
+      Op = MI.getOperand(1);
     assert(Op.isReg() && "First LGKM operand must be a register!");
 
     unsigned Reg = Op.getReg();