Subtract instructions; minor cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12111 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Sparc/InstSelectSimple.cpp b/lib/Target/Sparc/InstSelectSimple.cpp
index 95ff31e..5c145cb 100644
--- a/lib/Target/Sparc/InstSelectSimple.cpp
+++ b/lib/Target/Sparc/InstSelectSimple.cpp
@@ -165,9 +165,8 @@
void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
MachineBasicBlock::iterator IP,
Constant *C, unsigned R) {
- if (C->getType()->isIntegral()) {
+ if (ConstantInt *CI = dyn_cast<ConstantInt> (C)) {
unsigned Class = getClass(C->getType());
- ConstantInt *CI = cast<ConstantInt>(C);
switch (Class) {
case cByte:
BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (V8::G0).addImm ((uint8_t) CI->getRawValue ());
@@ -185,12 +184,12 @@
return;
}
default:
- assert (0 && "Can't move this kind of constant");
+ assert (0 && "Can't copy this kind of constant into register yet");
return;
}
}
- assert (0 && "Can't copy constants into registers yet");
+ assert (0 && "Can't copy this kind of constant into register yet");
}
bool V8ISel::runOnFunction(Function &Fn) {
@@ -246,6 +245,9 @@
case Instruction::Add:
BuildMI (BB, V8::ADDrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
break;
+ case Instruction::Sub:
+ BuildMI (BB, V8::SUBrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
+ break;
default:
visitInstruction (I);
return;
diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td
index 7a54404..72ad34f 100644
--- a/lib/Target/Sparc/SparcInstrInfo.td
+++ b/lib/Target/Sparc/SparcInstrInfo.td
@@ -62,7 +62,7 @@
let Name = "call";
}
-// Section B.9 - SETHI Instruction, p. 102
+// Section B.9 - SETHI Instruction, p. 104
def SETHIi: F2_1<0b100, "sethi">;
// Section B.11 - Logical Instructions, p. 106
@@ -78,6 +78,9 @@
// Section B.13 - Add Instructions, p. 108
def ADDrr : F3_1<2, 0b000000, "add">;
+// Section B.15 - Subtract Instructions, p. 110
+def SUBrr : F3_1<2, 0b000100, "sub">;
+
// Section B.25 - Jump and Link, p. 126
def JMPLr : F3_1<2, 0b111000, "jmpl">; // jmpl [rs1+rs2], rd
def JMPLi : F3_2<2, 0b111000, "jmpl">; // jmpl [rs1+imm], rd
diff --git a/lib/Target/Sparc/SparcV8ISelSimple.cpp b/lib/Target/Sparc/SparcV8ISelSimple.cpp
index 95ff31e..5c145cb 100644
--- a/lib/Target/Sparc/SparcV8ISelSimple.cpp
+++ b/lib/Target/Sparc/SparcV8ISelSimple.cpp
@@ -165,9 +165,8 @@
void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
MachineBasicBlock::iterator IP,
Constant *C, unsigned R) {
- if (C->getType()->isIntegral()) {
+ if (ConstantInt *CI = dyn_cast<ConstantInt> (C)) {
unsigned Class = getClass(C->getType());
- ConstantInt *CI = cast<ConstantInt>(C);
switch (Class) {
case cByte:
BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (V8::G0).addImm ((uint8_t) CI->getRawValue ());
@@ -185,12 +184,12 @@
return;
}
default:
- assert (0 && "Can't move this kind of constant");
+ assert (0 && "Can't copy this kind of constant into register yet");
return;
}
}
- assert (0 && "Can't copy constants into registers yet");
+ assert (0 && "Can't copy this kind of constant into register yet");
}
bool V8ISel::runOnFunction(Function &Fn) {
@@ -246,6 +245,9 @@
case Instruction::Add:
BuildMI (BB, V8::ADDrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
break;
+ case Instruction::Sub:
+ BuildMI (BB, V8::SUBrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
+ break;
default:
visitInstruction (I);
return;