Add more patterns to match in the integer comparison test harnesses.
Fix bugs encountered, mostly due to range matching for immediates;
the CellSPU's 10-bit immediates are sign extended, covering a
larger range of unsigned values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48575 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
index 1d4b28b..b81f277 100644
--- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
+++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
@@ -65,14 +65,14 @@
bool
isI32IntU10Immediate(ConstantSDNode *CN)
{
- return isU10Constant((int) CN->getValue());
+ return isU10Constant(CN->getSignExtended());
}
//! ConstantSDNode predicate for i16 sign-extended, 10-bit immediate values
bool
isI16IntS10Immediate(ConstantSDNode *CN)
{
- return isS10Constant((short) CN->getValue());
+ return isS10Constant(CN->getSignExtended());
}
//! SDNode predicate for i16 sign-extended, 10-bit immediate values