commit 786225adf09e606c795ef68a1f789c12f37869f2
author Evan Cheng <evan.cheng@apple.com> Thu Oct 05 23:01:46 2006 +0000
committer Evan Cheng <evan.cheng@apple.com> Thu Oct 05 23:01:46 2006 +0000
tree 61b96157aadb586bd7d47717fb7966e04d80f203
parent ad071e1cd1a4b880019f1b2e827ee81867815f82

Make use of getStore().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPCISelLowering.cpp

diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index e96982d..9624e66 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -743,8 +743,7 @@
   // memory location argument.
   MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
   SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
-  return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR, 
-                     Op.getOperand(1), Op.getOperand(2));
+  return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), Op.getOperand(2));
 }
 
 static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
@@ -900,8 +899,8 @@
       unsigned VReg = RegMap->createVirtualRegister(&PPC::GPRCRegClass);
       MF.addLiveIn(GPR[GPR_idx], VReg);
       SDOperand Val = DAG.getCopyFromReg(Root, VReg, PtrVT);
-      SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1),
-                                    Val, FIN, DAG.getSrcValue(NULL));
+      SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN,
+                                     DAG.getSrcValue(NULL));
       MemOps.push_back(Store);
       // Increment the address by four for the next argument to store
       SDOperand PtrOff = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8, PtrVT);
@@ -1035,8 +1034,8 @@
       if (GPR_idx != NumGPRs) {
         RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
       } else {
-        MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
-                                          Arg, PtrOff, DAG.getSrcValue(NULL)));
+        MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
+                                           DAG.getSrcValue(NULL)));
       }
       ArgOffset += PtrByteSize;
       break;
@@ -1046,9 +1045,8 @@
         RegsToPass.push_back(std::make_pair(FPR[FPR_idx++], Arg));
 
         if (isVarArg) {
-          SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Chain,
-                                        Arg, PtrOff,
-                                        DAG.getSrcValue(NULL));
+          SDOperand Store = DAG.getStore(Chain, Arg, PtrOff,
+                                         DAG.getSrcValue(NULL));
           MemOpChains.push_back(Store);
 
           // Float varargs are always shadowed in available integer registers
@@ -1076,8 +1074,8 @@
             ++GPR_idx;
         }
       } else {
-        MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
-                                          Arg, PtrOff, DAG.getSrcValue(NULL)));
+        MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
+                                           DAG.getSrcValue(NULL)));
       }
       if (isPPC64)
         ArgOffset += 8;
@@ -2123,8 +2121,8 @@
   SDOperand FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
   
   // Store the input value into Value#0 of the stack slot.
-  SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
-                                Op.getOperand(0), FIdx,DAG.getSrcValue(NULL));
+  SDOperand Store = DAG.getStore(DAG.getEntryNode(),
+                                 Op.getOperand(0), FIdx,DAG.getSrcValue(NULL));
   // Load it out.
   return DAG.getLoad(Op.getValueType(), Store, FIdx, DAG.getSrcValue(NULL));
 }