Relax this check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30381 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index c8dd50e..4d4fa9d 100644
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -824,13 +824,16 @@
const SDNodeInfo &NodeInfo = ISE.getSDNodeInfo(getOperator());
if (NodeInfo.hasProperty(SDNodeInfo::SDNPCommutative)) {
// Scan all of the operands of the node and make sure that only the last one
- // is a constant node.
- for (unsigned i = 0, e = getNumChildren()-1; i != e; ++i)
- if (!getChild(i)->isLeaf() &&
- getChild(i)->getOperator()->getName() == "imm") {
- Reason = "Immediate value must be on the RHS of commutative operators!";
- return false;
- }
+ // is a constant node, unless the RHS also is.
+ if (getChild(getNumChildren()-1)->isLeaf() ||
+ getChild(getNumChildren()-1)->getOperator()->getName() != "imm") {
+ for (unsigned i = 0, e = getNumChildren()-1; i != e; ++i)
+ if (!getChild(i)->isLeaf() &&
+ getChild(i)->getOperator()->getName() == "imm") {
+ Reason = "Immediate value must be on the RHS of commutative operators!";
+ return false;
+ }
+ }
}
return true;