Do not use typeinfo to identify pass in pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36632 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp
index 9237228..0850d22 100644
--- a/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -128,6 +128,9 @@
ARMFunctionInfo *AFI;
bool isThumb;
public:
+ static const int ID;
+ ARMConstantIslands() : MachineFunctionPass((intptr_t)&ID) {}
+
virtual bool runOnMachineFunction(MachineFunction &Fn);
virtual const char *getPassName() const {
@@ -171,6 +174,7 @@
void dumpBBs();
void verify(MachineFunction &Fn);
};
+ const int ARMConstantIslands::ID = 0;
}
/// verify - check BBOffsets, BBSizes, alignment of islands
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 3f8f350..143fa1b 100644
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -38,6 +38,9 @@
namespace {
struct VISIBILITY_HIDDEN ARMLoadStoreOpt : public MachineFunctionPass {
+ static const int ID;
+ ARMLoadStoreOpt() : MachineFunctionPass((intptr_t)&ID) {}
+
const TargetInstrInfo *TII;
const MRegisterInfo *MRI;
ARMFunctionInfo *AFI;
@@ -70,6 +73,7 @@
bool LoadStoreMultipleOpti(MachineBasicBlock &MBB);
bool MergeReturnIntoLDM(MachineBasicBlock &MBB);
};
+ const int ARMLoadStoreOpt::ID = 0;
}
/// createARMLoadStoreOptimizationPass - returns an instance of the load / store
diff --git a/lib/Target/Alpha/AlphaBranchSelector.cpp b/lib/Target/Alpha/AlphaBranchSelector.cpp
index 65bacb8..f0f70ad 100644
--- a/lib/Target/Alpha/AlphaBranchSelector.cpp
+++ b/lib/Target/Alpha/AlphaBranchSelector.cpp
@@ -22,6 +22,8 @@
namespace {
struct VISIBILITY_HIDDEN AlphaBSel : public MachineFunctionPass {
+ static const int ID;
+ AlphaBSel() : MachineFunctionPass((intptr_t)&ID) {}
virtual bool runOnMachineFunction(MachineFunction &Fn);
@@ -29,6 +31,7 @@
return "Alpha Branch Selection";
}
};
+ const int AlphaBSel::ID = 0;
}
/// createAlphaBranchSelectionPass - returns an instance of the Branch Selection
diff --git a/lib/Target/Alpha/AlphaCodeEmitter.cpp b/lib/Target/Alpha/AlphaCodeEmitter.cpp
index 15aef85..006e571 100644
--- a/lib/Target/Alpha/AlphaCodeEmitter.cpp
+++ b/lib/Target/Alpha/AlphaCodeEmitter.cpp
@@ -36,11 +36,12 @@
int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
public:
+ static const int ID;
explicit AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
- : II(0), TM(tm), MCE(mce) {}
+ : MachineFunctionPass((intptr_t)&ID), II(0), TM(tm), MCE(mce) {}
AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
const AlphaInstrInfo& ii)
- : II(&ii), TM(tm), MCE(mce) {}
+ : MachineFunctionPass((intptr_t)&ID), II(&ii), TM(tm), MCE(mce) {}
bool runOnMachineFunction(MachineFunction &MF);
@@ -60,6 +61,7 @@
void emitBasicBlock(MachineBasicBlock &MBB);
};
+ const int AlphaCodeEmitter::ID = 0;
}
/// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code
diff --git a/lib/Target/Alpha/AlphaLLRP.cpp b/lib/Target/Alpha/AlphaLLRP.cpp
index 6d2d243..c5a20e7 100644
--- a/lib/Target/Alpha/AlphaLLRP.cpp
+++ b/lib/Target/Alpha/AlphaLLRP.cpp
@@ -37,7 +37,9 @@
///
AlphaTargetMachine &TM;
- AlphaLLRPPass(AlphaTargetMachine &tm) : TM(tm) { }
+ static const int ID;
+ AlphaLLRPPass(AlphaTargetMachine &tm)
+ : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
virtual const char *getPassName() const {
return "Alpha NOP inserter";
@@ -152,6 +154,7 @@
return Changed;
}
};
+ const int AlphaLLRPPass::ID = 0;
} // end of anonymous namespace
FunctionPass *llvm::createAlphaLLRPPass(AlphaTargetMachine &tm) {
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index ac7251f..e29edff 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -56,6 +56,10 @@
/// external functions with the same name.
///
class CBackendNameAllUsedStructsAndMergeFunctions : public ModulePass {
+ public:
+ static const int ID;
+ CBackendNameAllUsedStructsAndMergeFunctions()
+ : ModulePass((intptr_t)&ID) {}
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<FindUsedTypes>();
}
@@ -67,6 +71,8 @@
virtual bool runOnModule(Module &M);
};
+ const int CBackendNameAllUsedStructsAndMergeFunctions::ID = 0;
+
/// CWriter - This class is the main chunk of code that converts an LLVM
/// module to a C translation unit.
class CWriter : public FunctionPass, public InstVisitor<CWriter> {
@@ -82,8 +88,10 @@
std::set<Function*> intrinsicPrototypesAlreadyGenerated;
public:
- CWriter(std::ostream &o) : Out(o), IL(0), Mang(0), LI(0), TheModule(0),
- TAsm(0), TD(0) {}
+ static const int ID;
+ CWriter(std::ostream &o)
+ : FunctionPass((intptr_t)&ID), Out(o), IL(0), Mang(0), LI(0),
+ TheModule(0), TAsm(0), TD(0) {}
virtual const char *getPassName() const { return "C backend"; }
@@ -256,6 +264,8 @@
};
}
+const int CWriter::ID = 0;
+
/// This method inserts names for any unnamed structure types that are used by
/// the program, and removes names from structure types that are not used by the
/// program.
diff --git a/lib/Target/IA64/IA64Bundling.cpp b/lib/Target/IA64/IA64Bundling.cpp
index 08e4ba8..89732ae 100644
--- a/lib/Target/IA64/IA64Bundling.cpp
+++ b/lib/Target/IA64/IA64Bundling.cpp
@@ -36,12 +36,14 @@
namespace {
struct IA64BundlingPass : public MachineFunctionPass {
+ static const int ID;
/// Target machine description which we query for reg. names, data
/// layout, etc.
///
IA64TargetMachine &TM;
- IA64BundlingPass(IA64TargetMachine &tm) : TM(tm) { }
+ IA64BundlingPass(IA64TargetMachine &tm)
+ : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
virtual const char *getPassName() const {
return "IA64 (Itanium) Bundling Pass";
@@ -61,6 +63,7 @@
// 'fallthrough' code
std::set<unsigned> PendingRegWrites;
};
+ const int IA64BundlingPass::ID = 0;
} // end of anonymous namespace
/// createIA64BundlingPass - Returns a pass that adds STOP (;;) instructions
diff --git a/lib/Target/MSIL/MSILWriter.cpp b/lib/Target/MSIL/MSILWriter.cpp
index 55eb03c..86bea59 100644
--- a/lib/Target/MSIL/MSILWriter.cpp
+++ b/lib/Target/MSIL/MSILWriter.cpp
@@ -80,6 +80,8 @@
return Changed;
}
+const int MSILModule::ID = 0;
+const int MSILWriter::ID = 0;
bool MSILWriter::runOnFunction(Function &F) {
if (F.isDeclaration()) return false;
diff --git a/lib/Target/MSIL/MSILWriter.h b/lib/Target/MSIL/MSILWriter.h
index 7fa039e..15a463d 100644
--- a/lib/Target/MSIL/MSILWriter.h
+++ b/lib/Target/MSIL/MSILWriter.h
@@ -37,9 +37,10 @@
const TargetData*& TD;
public:
+ static const int ID;
MSILModule(const std::set<const Type *>*& _UsedTypes,
const TargetData*& _TD)
- : UsedTypes(_UsedTypes), TD(_TD) {}
+ : ModulePass((intptr_t)&ID), UsedTypes(_UsedTypes), TD(_TD) {}
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<FindUsedTypes>();
@@ -82,8 +83,8 @@
std::map<const GlobalVariable*,std::vector<StaticInitializer> >
StaticInitList;
const std::set<const Type *>* UsedTypes;
-
- MSILWriter(std::ostream &o) : Out(o) {
+ static const int ID;
+ MSILWriter(std::ostream &o) : FunctionPass((intptr_t)&ID), Out(o) {
UniqID = 0;
}
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index 2cd8325..a4f0cae 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -32,6 +32,9 @@
namespace {
struct VISIBILITY_HIDDEN PPCBSel : public MachineFunctionPass {
+ static const int ID;
+ PPCBSel() : MachineFunctionPass((intptr_t)&ID) {}
+
/// BlockSizes - The sizes of the basic blocks in the function.
std::vector<unsigned> BlockSizes;
@@ -41,6 +44,7 @@
return "PowerPC Branch Selector";
}
};
+ const int PPCBSel::ID = 0;
}
/// createPPCBranchSelectionPass - returns an instance of the Branch Selection
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index 6e3d68d..acca7a3 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -40,8 +40,9 @@
int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
public:
+ static const int ID;
PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
- : TM(T), MCE(M) {}
+ : MachineFunctionPass((intptr_t)&ID), TM(T), MCE(M) {}
const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
@@ -63,6 +64,7 @@
///
unsigned getBinaryCodeForInstr(MachineInstr &MI);
};
+ const int PPCCodeEmitter::ID = 0;
}
/// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
diff --git a/lib/Target/Sparc/DelaySlotFiller.cpp b/lib/Target/Sparc/DelaySlotFiller.cpp
index 898b23a..313eab9 100644
--- a/lib/Target/Sparc/DelaySlotFiller.cpp
+++ b/lib/Target/Sparc/DelaySlotFiller.cpp
@@ -30,7 +30,9 @@
TargetMachine &TM;
const TargetInstrInfo *TII;
- Filler(TargetMachine &tm) : TM(tm), TII(tm.getInstrInfo()) { }
+ static const int ID;
+ Filler(TargetMachine &tm)
+ : MachineFunctionPass((intptr_t)&ID), TM(tm), TII(tm.getInstrInfo()) { }
virtual const char *getPassName() const {
return "SPARC Delay Slot Filler";
@@ -46,6 +48,7 @@
}
};
+ const int Filler::ID = 0;
} // end of anonymous namespace
/// createSparcDelaySlotFillerPass - Returns a pass that fills in delay
diff --git a/lib/Target/Sparc/FPMover.cpp b/lib/Target/Sparc/FPMover.cpp
index f7e6506..5596586 100644
--- a/lib/Target/Sparc/FPMover.cpp
+++ b/lib/Target/Sparc/FPMover.cpp
@@ -31,8 +31,10 @@
/// layout, etc.
///
TargetMachine &TM;
-
- FPMover(TargetMachine &tm) : TM(tm) { }
+
+ static const int ID;
+ FPMover(TargetMachine &tm)
+ : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
virtual const char *getPassName() const {
return "Sparc Double-FP Move Fixer";
@@ -41,6 +43,7 @@
bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
bool runOnMachineFunction(MachineFunction &F);
};
+ const int FPMover::ID = 0;
} // end of anonymous namespace
/// createSparcFPMoverPass - Returns a pass that turns FpMOVD
diff --git a/lib/Target/TargetData.cpp b/lib/Target/TargetData.cpp
index 2cbb903..d1842fe 100644
--- a/lib/Target/TargetData.cpp
+++ b/lib/Target/TargetData.cpp
@@ -33,6 +33,7 @@
// Handle the Pass registration stuff necessary to use TargetData's.
namespace {
// Register the default SparcV9 implementation...
+ const int TargetData::ID = 0;
RegisterPass<TargetData> X("targetdata", "Target Data Layout");
}
@@ -221,7 +222,8 @@
}
}
-TargetData::TargetData(const Module *M) {
+TargetData::TargetData(const Module *M)
+ : ImmutablePass((intptr_t)&ID) {
init(M->getDataLayout());
}
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 7371aad..db80d9f 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -39,11 +39,14 @@
MachineCodeEmitter &MCE;
bool Is64BitMode;
public:
+ static const int ID;
explicit Emitter(TargetMachine &tm, MachineCodeEmitter &mce)
- : II(0), TD(0), TM(tm), MCE(mce), Is64BitMode(false) {}
+ : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm),
+ MCE(mce), Is64BitMode(false) {}
Emitter(TargetMachine &tm, MachineCodeEmitter &mce,
const X86InstrInfo &ii, const TargetData &td, bool is64)
- : II(&ii), TD(&td), TM(tm), MCE(mce), Is64BitMode(is64) {}
+ : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm),
+ MCE(mce), Is64BitMode(is64) {}
bool runOnMachineFunction(MachineFunction &MF);
@@ -79,6 +82,7 @@
bool isX86_64ExtendedReg(const MachineOperand &MO);
unsigned determineREX(const MachineInstr &MI);
};
+ const int Emitter::ID = 0;
}
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index 2439d19..4667b91 100644
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -52,6 +52,9 @@
namespace {
struct VISIBILITY_HIDDEN FPS : public MachineFunctionPass {
+ static const int ID;
+ FPS() : MachineFunctionPass((intptr_t)&ID) {}
+
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual const char *getPassName() const { return "X86 FP Stackifier"; }
@@ -151,6 +154,7 @@
void handleCondMovFP(MachineBasicBlock::iterator &I);
void handleSpecialFP(MachineBasicBlock::iterator &I);
};
+ const int FPS::ID = 0;
}
FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); }