Next bit of PPC ByVal handling; call-site code seems
correct now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47978 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 5ae71ac..9ac5694 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1583,7 +1583,7 @@
((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs);
SDOperand AlignNode = DAG.getConstant(Align, MVT::i32);
SDOperand SizeNode = DAG.getConstant(Size, MVT::i32);
- SDOperand AlwaysInline = DAG.getConstant(1, MVT::i32);
+ SDOperand AlwaysInline = DAG.getConstant(0, MVT::i32);
return DAG.getMemcpy(Chain, Dst, Src, SizeNode, AlignNode, AlwaysInline);
}
@@ -1633,6 +1633,7 @@
// These operations are automatically eliminated by the prolog/epilog pass
Chain = DAG.getCALLSEQ_START(Chain,
DAG.getConstant(NumBytes, PtrVT));
+ SDOperand CallSeqStart = Chain;
// Set up a copy of the stack pointer for use loading and storing any
// arguments that may not fit in the registers available for argument
@@ -1713,13 +1714,20 @@
SDOperand AddArg = DAG.getNode(ISD::ADD, PtrVT, Arg, Const);
if (GPR_idx != NumGPRs) {
SDOperand Load = DAG.getLoad(PtrVT, Chain, AddArg, NULL, 0);
+ MemOpChains.push_back(Load.getValue(1));
RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
if (isMachoABI)
ArgOffset += PtrByteSize;
} else {
SDOperand AddPtr = DAG.getNode(ISD::ADD, PtrVT, PtrOff, Const);
- MemOpChains.push_back(CreateCopyOfByValArgument(AddArg, AddPtr,
- Chain, Flags, DAG, Size - j));
+ SDOperand MemcpyCall = CreateCopyOfByValArgument(AddArg, AddPtr,
+ CallSeqStart.Val->getOperand(0),
+ Flags, DAG, Size - j);
+ // This must go outside the CALLSEQ_START..END.
+ SDOperand NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall,
+ CallSeqStart.Val->getOperand(1));
+ DAG.ReplaceAllUsesWith(CallSeqStart.Val, NewCallSeqStart.Val);
+ CallSeqStart = NewCallSeqStart;
ArgOffset += ((Size - j + 3)/4)*4;
}
}