Make ARM an X86 memcpy expansion more similar to each other.
Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it.
This should not change generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43552 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 17c7534..f1bf150 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4332,7 +4332,7 @@
// The libc version is likely to be faster for these cases. It can use the
// address value and run time information about the CPU.
if ((Align & 3) != 0 ||
- (I && I->getValue() > Subtarget->getMinRepStrSizeThreshold())) {
+ (I && I->getValue() > Subtarget->getMaxInlineSizeThreshold())) {
MVT::ValueType IntPtr = getPointerTy();
const Type *IntPtrTy = getTargetData()->getIntPtrType();
TargetLowering::ArgListTy Args;
@@ -4510,7 +4510,7 @@
return LowerMEMCPYCall(ChainOp, DestOp, SourceOp, CountOp, DAG);
// If size is more than the threshold, call memcpy.
- if (Size > Subtarget->getMinRepStrSizeThreshold())
+ if (Size > Subtarget->getMaxInlineSizeThreshold())
return LowerMEMCPYCall(ChainOp, DestOp, SourceOp, CountOp, DAG);
return LowerMEMCPYInline(ChainOp, DestOp, SourceOp, Size, Align, DAG);