commit 7bbf0ee97c77f7712154648a44ac6eeb57886462
author Cameron Zwarich <zwarich@apple.com> Thu Mar 17 14:53:37 2011 +0000
committer Cameron Zwarich <zwarich@apple.com> Thu Mar 17 14:53:37 2011 +0000
tree 9e93ea5f729b56a880a474c259310737fc8547ac
parent 9e69ff914d8ea054c1dbfd40cd63281c5b087163

Move more logic into getTypeForExtArgOrReturn.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127809 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 9671a45..16a6107 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -1128,12 +1128,8 @@
         else if (F->paramHasAttr(0, Attribute::ZExt))
           ExtendKind = ISD::ZERO_EXTEND;
 
-        if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
-          MVT ReturnMVT = TLI.getTypeForExtArgOrReturn(VT, ExtendKind);
-          EVT MinVT = TLI.getRegisterType(*DAG.getContext(), ReturnMVT);
-          if (VT.bitsLT(MinVT))
-            VT = MinVT;
-        }
+        if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger())
+          VT = TLI.getTypeForExtArgOrReturn(*DAG.getContext(), VT, ExtendKind);
 
         unsigned NumParts = TLI.getNumRegisters(*DAG.getContext(), VT);
         EVT PartVT = TLI.getRegisterType(*DAG.getContext(), VT);

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index dfb7b87..a4d01a1 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -1448,13 +1448,18 @@
   return HasRet;
 }
 
-MVT
-X86TargetLowering::getTypeForExtArgOrReturn(EVT VT,
+EVT
+X86TargetLowering::getTypeForExtArgOrReturn(LLVMContext &Context, EVT VT,
                                             ISD::NodeType ExtendKind) const {
+  MVT ReturnMVT;
   // TODO: Is this also valid on 32-bit?
   if (Subtarget->is64Bit() && VT == MVT::i1 && ExtendKind == ISD::ZERO_EXTEND)
-    return MVT::i8;
-  return MVT::i32;
+    ReturnMVT = MVT::i8;
+  else
+    ReturnMVT = MVT::i32;
+
+  EVT MinVT = getRegisterType(Context, ReturnMVT);
+  return VT.bitsLT(MinVT) ? MinVT : VT;
 }
 
 /// LowerCallResult - Lower the result values of a call into the

lib/Target/X86/X86ISelLowering.h

diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index bd9247b..7c1b13a 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -843,8 +843,9 @@
 
     virtual bool isUsedByReturnOnly(SDNode *N) const;
 
-    virtual MVT
-    getTypeForExtArgOrReturn(EVT VT, ISD::NodeType ExtendKind) const;
+    virtual EVT
+    getTypeForExtArgOrReturn(LLVMContext &Context, EVT VT,
+                             ISD::NodeType ExtendKind) const;
 
     virtual bool
       CanLowerReturn(CallingConv::ID CallConv, bool isVarArg,