When using NEON for single-precision FP, the NEON result must be placed in D0-D15 as these are the only D registers with S subregs. Introduce a new regclass to represent D0-D15 and use it in the NEON single-precision FP patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78244 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 3819b43..9c5f3aa 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -610,23 +610,29 @@
if (I != MBB.end()) DL = I->getDebugLoc();
if (DestRC != SrcRC) {
- // Not yet supported!
- return false;
+ if (((DestRC == ARM::DPRRegisterClass) && (SrcRC == ARM::DPR_VFP2RegisterClass)) ||
+ ((SrcRC == ARM::DPRRegisterClass) && (DestRC == ARM::DPR_VFP2RegisterClass))) {
+ // Allow copy between DPR and DPR_VFP2.
+ } else {
+ return false;
+ }
}
- if (DestRC == ARM::GPRRegisterClass)
+ if (DestRC == ARM::GPRRegisterClass) {
AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::MOVr),
DestReg).addReg(SrcReg)));
- else if (DestRC == ARM::SPRRegisterClass)
+ } else if (DestRC == ARM::SPRRegisterClass) {
AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FCPYS), DestReg)
.addReg(SrcReg));
- else if (DestRC == ARM::DPRRegisterClass)
+ } else if ((DestRC == ARM::DPRRegisterClass) ||
+ (DestRC == ARM::DPR_VFP2RegisterClass)) {
AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FCPYD), DestReg)
.addReg(SrcReg));
- else if (DestRC == ARM::QPRRegisterClass)
+ } else if (DestRC == ARM::QPRRegisterClass) {
BuildMI(MBB, I, DL, get(ARM::VMOVQ), DestReg).addReg(SrcReg);
- else
+ } else {
return false;
+ }
return true;
}