Document the subtarget features better, make sure that 64-bit mode, 64-bit
support, and 64-bit register use are all consistent with each other.
Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently. This not makes ppc64 blow up on lots
of stuff :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp
index b228ba7..f7a9560 100644
--- a/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -16,6 +16,7 @@
#include "llvm/Module.h"
#include "llvm/Support/CommandLine.h"
#include "PPCGenSubtarget.inc"
+#include <iostream>
using namespace llvm;
PPCTargetEnum llvm::PPCTarget = TargetDefault;
@@ -75,6 +76,7 @@
, IsGigaProcessor(false)
, Has64BitSupport(false)
, Use64BitRegs(false)
+ , IsPPC64(is64Bit)
, HasAltivec(false)
, HasFSQRT(false)
, HasSTFIWX(false)
@@ -90,6 +92,25 @@
// Parse features string.
ParseSubtargetFeatures(FS, CPU);
+ // If we are generating code for ppc64, verify that options make sense.
+ if (is64Bit) {
+ if (!has64BitSupport()) {
+ std::cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
+ "requested. Ignoring 32-bit processor feature.\n";
+ Has64BitSupport = true;
+ // Silently force 64-bit register use on ppc64.
+ Use64BitRegs = true;
+ }
+ }
+
+ // If the user requested use of 64-bit regs, but the cpu selected doesn't
+ // support it, warn and ignore.
+ if (use64BitRegs() && !has64BitSupport()) {
+ std::cerr << "PPC: 64-bit registers requested on CPU without support. "
+ "Disabling 64-bit register use.\n";
+ Use64BitRegs = false;
+ }
+
// Set the boolean corresponding to the current target triple, or the default
// if one cannot be determined, to true.
const std::string& TT = M.getTargetTriple();