Document the subtarget features better, make sure that 64-bit mode, 64-bit
support, and 64-bit register use are all consistent with each other.
Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently. This not makes ppc64 blow up on lots
of stuff :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h
index e898a04..2c5c6ba 100644
--- a/lib/Target/PowerPC/PPCSubtarget.h
+++ b/lib/Target/PowerPC/PPCSubtarget.h
@@ -35,6 +35,7 @@
bool IsGigaProcessor;
bool Has64BitSupport;
bool Use64BitRegs;
+ bool IsPPC64;
bool HasAltivec;
bool HasFSQRT;
bool HasSTFIWX;
@@ -58,21 +59,35 @@
/// getInstrItins - Return the instruction itineraies based on subtarget
/// selection.
const InstrItineraryData getInstrItineraryData() const { return InstrItins; }
-
+
+ /// getTargetDataString - Return the pointer size and type alignment
+ /// properties of this subtarget.
const char *getTargetDataString() const {
- // FIXME: Make is64Bit be for the processor, not the target.
- return true ? "E-p:32:32-d:32-l:32" : "E-p:64:64-d:32-l:32";
+ return isPPC64() ? "E-p:64:64-d:32-l:32" : "E-p:32:32-d:32-l:32";
}
+ /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
+ ///
+ bool isPPC64() const { return IsPPC64; }
+
+ /// has64BitSupport - Return true if the selected CPU supports 64-bit
+ /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
+ bool has64BitSupport() const { return Has64BitSupport; }
+
+ /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
+ /// registers in 32-bit mode when possible. This can only true if
+ /// has64BitSupport() returns true.
+ bool use64BitRegs() const { return Use64BitRegs; }
+
+
+ // Specific obvious features.
bool hasFSQRT() const { return HasFSQRT; }
bool hasSTFIWX() const { return HasSTFIWX; }
- bool use64BitRegs() const { return Use64BitRegs; }
bool hasAltivec() const { return HasAltivec; }
+ bool isGigaProcessor() const { return IsGigaProcessor; }
bool isAIX() const { return IsAIX; }
bool isDarwin() const { return IsDarwin; }
- bool has64BitSupport() const { return Has64BitSupport; }
- bool isGigaProcessor() const { return IsGigaProcessor; }
};
} // End llvm namespace