diff --git a/docs/LangRef.html b/docs/LangRef.html
index 5f23674..60217ec 100644
--- a/docs/LangRef.html
+++ b/docs/LangRef.html
@@ -89,8 +89,11 @@
       <li><a href="#binaryops">Binary Operations</a>
         <ol>
           <li><a href="#i_add">'<tt>add</tt>' Instruction</a></li>
+          <li><a href="#i_fadd">'<tt>fadd</tt>' Instruction</a></li>
           <li><a href="#i_sub">'<tt>sub</tt>' Instruction</a></li>
+          <li><a href="#i_fsub">'<tt>fsub</tt>' Instruction</a></li>
           <li><a href="#i_mul">'<tt>mul</tt>' Instruction</a></li>
+          <li><a href="#i_fmul">'<tt>fmul</tt>' Instruction</a></li>
           <li><a href="#i_udiv">'<tt>udiv</tt>' Instruction</a></li>
           <li><a href="#i_sdiv">'<tt>sdiv</tt>' Instruction</a></li>
           <li><a href="#i_fdiv">'<tt>fdiv</tt>' Instruction</a></li>
@@ -2503,16 +2506,15 @@
 <h5>Arguments:</h5>
 
 <p>The two arguments to the '<tt>add</tt>' instruction must be <a
- href="#t_integer">integer</a>, <a href="#t_floating">floating point</a>, or
- <a href="#t_vector">vector</a> values. Both arguments must have identical
- types.</p>
+ href="#t_integer">integer</a> or
+ <a href="#t_vector">vector</a> of integer values. Both arguments must
+ have identical types.</p>
 
 <h5>Semantics:</h5>
 
-<p>The value produced is the integer or floating point sum of the two
-operands.</p>
+<p>The value produced is the integer sum of the two operands.</p>
 
-<p>If an integer sum has unsigned overflow, the result returned is the
+<p>If the sum has unsigned overflow, the result returned is the
 mathematical result modulo 2<sup>n</sup>, where n is the bit width of
 the result.</p>
 
@@ -2527,6 +2529,39 @@
 </div>
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
+  <a name="i_fadd">'<tt>fadd</tt>' Instruction</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+
+<pre>
+  &lt;result&gt; = fadd &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt;   <i>; yields {ty}:result</i>
+</pre>
+
+<h5>Overview:</h5>
+
+<p>The '<tt>fadd</tt>' instruction returns the sum of its two operands.</p>
+
+<h5>Arguments:</h5>
+
+<p>The two arguments to the '<tt>fadd</tt>' instruction must be
+<a href="#t_floating">floating point</a> or <a href="#t_vector">vector</a> of
+floating point values. Both arguments must have identical types.</p>
+
+<h5>Semantics:</h5>
+
+<p>The value produced is the floating point sum of the two operands.</p>
+
+<h5>Example:</h5>
+
+<pre>
+  &lt;result&gt; = fadd float 4.0, %var          <i>; yields {float}:result = 4.0 + %var</i>
+</pre>
+</div>
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
    <a name="i_sub">'<tt>sub</tt>' Instruction</a>
 </div>
 
@@ -2550,16 +2585,14 @@
 <h5>Arguments:</h5>
 
 <p>The two arguments to the '<tt>sub</tt>' instruction must be <a
- href="#t_integer">integer</a>, <a href="#t_floating">floating point</a>,
- or <a href="#t_vector">vector</a> values.  Both arguments must have identical
- types.</p>
+ href="#t_integer">integer</a> or <a href="#t_vector">vector</a> of
+ integer values.  Both arguments must have identical types.</p>
 
 <h5>Semantics:</h5>
 
-<p>The value produced is the integer or floating point difference of
-the two operands.</p>
+<p>The value produced is the integer difference of the two operands.</p>
 
-<p>If an integer difference has unsigned overflow, the result returned is the
+<p>If the difference has unsigned overflow, the result returned is the
 mathematical result modulo 2<sup>n</sup>, where n is the bit width of
 the result.</p>
 
@@ -2575,6 +2608,45 @@
 
 <!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection">
+   <a name="i_fsub">'<tt>fsub</tt>' Instruction</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+
+<pre>
+  &lt;result&gt; = fsub &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt;   <i>; yields {ty}:result</i>
+</pre>
+
+<h5>Overview:</h5>
+
+<p>The '<tt>fsub</tt>' instruction returns the difference of its two
+operands.</p>
+
+<p>Note that the '<tt>fsub</tt>' instruction is used to represent the
+'<tt>fneg</tt>' instruction present in most other intermediate
+representations.</p>
+
+<h5>Arguments:</h5>
+
+<p>The two arguments to the '<tt>fsub</tt>' instruction must be <a
+ <a href="#t_floating">floating point</a> or <a href="#t_vector">vector</a>
+ of floating point values.  Both arguments must have identical types.</p>
+
+<h5>Semantics:</h5>
+
+<p>The value produced is the floating point difference of the two operands.</p>
+
+<h5>Example:</h5>
+<pre>
+  &lt;result&gt; = fsub float 4.0, %var           <i>; yields {float}:result = 4.0 - %var</i>
+  &lt;result&gt; = fsub float -0.0, %val          <i>; yields {float}:result = -%var</i>
+</pre>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
   <a name="i_mul">'<tt>mul</tt>' Instruction</a>
 </div>
 
@@ -2590,16 +2662,14 @@
 <h5>Arguments:</h5>
 
 <p>The two arguments to the '<tt>mul</tt>' instruction must be <a
-href="#t_integer">integer</a>, <a href="#t_floating">floating point</a>,
-or <a href="#t_vector">vector</a> values.  Both arguments must have identical
-types.</p>
+href="#t_integer">integer</a> or <a href="#t_vector">vector</a> of integer
+values.  Both arguments must have identical types.</p>
  
 <h5>Semantics:</h5>
 
-<p>The value produced is the integer or floating point product of the
-two operands.</p>
+<p>The value produced is the integer product of the two operands.</p>
 
-<p>If the result of an integer multiplication has unsigned overflow,
+<p>If the result of the multiplication has unsigned overflow,
 the result returned is the mathematical result modulo 
 2<sup>n</sup>, where n is the bit width of the result.</p>
 <p>Because LLVM integers use a two's complement representation, and the
@@ -2614,6 +2684,35 @@
 </div>
 
 <!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="i_fmul">'<tt>fmul</tt>' Instruction</a>
+</div>
+
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre>  &lt;result&gt; = fmul &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt;   <i>; yields {ty}:result</i>
+</pre>
+<h5>Overview:</h5>
+<p>The  '<tt>fmul</tt>' instruction returns the product of its two
+operands.</p>
+
+<h5>Arguments:</h5>
+
+<p>The two arguments to the '<tt>fmul</tt>' instruction must be
+<a href="#t_floating">floating point</a> or <a href="#t_vector">vector</a>
+of floating point values.  Both arguments must have identical types.</p>
+
+<h5>Semantics:</h5>
+
+<p>The value produced is the floating point product of the two operands.</p>
+
+<h5>Example:</h5>
+<pre>  &lt;result&gt; = fmul float 4.0, %var          <i>; yields {float}:result = 4.0 * %var</i>
+</pre>
+</div>
+
+<!-- _______________________________________________________________________ -->
 <div class="doc_subsubsection"> <a name="i_udiv">'<tt>udiv</tt>' Instruction
 </a></div>
 <div class="doc_text">
diff --git a/include/llvm/Constants.h b/include/llvm/Constants.h
index 9e95a08..ed0fe27 100644
--- a/include/llvm/Constants.h
+++ b/include/llvm/Constants.h
@@ -704,10 +704,14 @@
   /// specify the full Instruction::OPCODE identifier.
   ///
   static Constant *getNeg(Constant *C);
+  static Constant *getFNeg(Constant *C);
   static Constant *getNot(Constant *C);
   static Constant *getAdd(Constant *C1, Constant *C2);
+  static Constant *getFAdd(Constant *C1, Constant *C2);
   static Constant *getSub(Constant *C1, Constant *C2);
+  static Constant *getFSub(Constant *C1, Constant *C2);
   static Constant *getMul(Constant *C1, Constant *C2);
+  static Constant *getFMul(Constant *C1, Constant *C2);
   static Constant *getUDiv(Constant *C1, Constant *C2);
   static Constant *getSDiv(Constant *C1, Constant *C2);
   static Constant *getFDiv(Constant *C1, Constant *C2);
diff --git a/include/llvm/InstrTypes.h b/include/llvm/InstrTypes.h
index 3a774d4..1eab983 100644
--- a/include/llvm/InstrTypes.h
+++ b/include/llvm/InstrTypes.h
@@ -204,21 +204,30 @@
                                    Instruction *InsertBefore = 0);
   static BinaryOperator *CreateNeg(Value *Op, const std::string &Name,
                                    BasicBlock *InsertAtEnd);
+  static BinaryOperator *CreateFNeg(Value *Op, const std::string &Name = "",
+                                    Instruction *InsertBefore = 0);
+  static BinaryOperator *CreateFNeg(Value *Op, const std::string &Name,
+                                    BasicBlock *InsertAtEnd);
   static BinaryOperator *CreateNot(Value *Op, const std::string &Name = "",
                                    Instruction *InsertBefore = 0);
   static BinaryOperator *CreateNot(Value *Op, const std::string &Name,
                                    BasicBlock *InsertAtEnd);
 
-  /// isNeg, isNot - Check if the given Value is a NEG or NOT instruction.
+  /// isNeg, isFNeg, isNot - Check if the given Value is a
+  /// NEG, FNeg, or NOT instruction.
   ///
   static bool isNeg(const Value *V);
+  static bool isFNeg(const Value *V);
   static bool isNot(const Value *V);
 
   /// getNegArgument, getNotArgument - Helper functions to extract the
-  ///     unary argument of a NEG or NOT operation implemented via Sub or Xor.
+  ///     unary argument of a NEG, FNEG or NOT operation implemented via
+  ///     Sub, FSub, or Xor.
   ///
   static const Value *getNegArgument(const Value *BinOp);
   static       Value *getNegArgument(      Value *BinOp);
+  static const Value *getFNegArgument(const Value *BinOp);
+  static       Value *getFNegArgument(      Value *BinOp);
   static const Value *getNotArgument(const Value *BinOp);
   static       Value *getNotArgument(      Value *BinOp);
 
diff --git a/include/llvm/Instruction.def b/include/llvm/Instruction.def
index 66bf2ce..98fda77 100644
--- a/include/llvm/Instruction.def
+++ b/include/llvm/Instruction.def
@@ -105,71 +105,74 @@
 // Standard binary operators...
  FIRST_BINARY_INST( 7)
 HANDLE_BINARY_INST( 7, Add  , BinaryOperator)
-HANDLE_BINARY_INST( 8, Sub  , BinaryOperator)
-HANDLE_BINARY_INST( 9, Mul  , BinaryOperator)
-HANDLE_BINARY_INST(10, UDiv , BinaryOperator)
-HANDLE_BINARY_INST(11, SDiv , BinaryOperator)
-HANDLE_BINARY_INST(12, FDiv , BinaryOperator)
-HANDLE_BINARY_INST(13, URem , BinaryOperator)
-HANDLE_BINARY_INST(14, SRem , BinaryOperator)
-HANDLE_BINARY_INST(15, FRem , BinaryOperator)
+HANDLE_BINARY_INST( 8, FAdd  , BinaryOperator)
+HANDLE_BINARY_INST( 9, Sub  , BinaryOperator)
+HANDLE_BINARY_INST(10, FSub  , BinaryOperator)
+HANDLE_BINARY_INST(11, Mul  , BinaryOperator)
+HANDLE_BINARY_INST(12, FMul  , BinaryOperator)
+HANDLE_BINARY_INST(13, UDiv , BinaryOperator)
+HANDLE_BINARY_INST(14, SDiv , BinaryOperator)
+HANDLE_BINARY_INST(15, FDiv , BinaryOperator)
+HANDLE_BINARY_INST(16, URem , BinaryOperator)
+HANDLE_BINARY_INST(17, SRem , BinaryOperator)
+HANDLE_BINARY_INST(18, FRem , BinaryOperator)
 
 // Logical operators (integer operands)
-HANDLE_BINARY_INST(16, Shl  , BinaryOperator) // Shift left  (logical)
-HANDLE_BINARY_INST(17, LShr , BinaryOperator) // Shift right (logical) 
-HANDLE_BINARY_INST(18, AShr , BinaryOperator) // Shift right (arithmetic)
-HANDLE_BINARY_INST(19, And  , BinaryOperator)
-HANDLE_BINARY_INST(20, Or   , BinaryOperator)
-HANDLE_BINARY_INST(21, Xor  , BinaryOperator)
-  LAST_BINARY_INST(21)
+HANDLE_BINARY_INST(19, Shl  , BinaryOperator) // Shift left  (logical)
+HANDLE_BINARY_INST(20, LShr , BinaryOperator) // Shift right (logical)
+HANDLE_BINARY_INST(21, AShr , BinaryOperator) // Shift right (arithmetic)
+HANDLE_BINARY_INST(22, And  , BinaryOperator)
+HANDLE_BINARY_INST(23, Or   , BinaryOperator)
+HANDLE_BINARY_INST(24, Xor  , BinaryOperator)
+  LAST_BINARY_INST(24)
 
 // Memory operators...
- FIRST_MEMORY_INST(22)
-HANDLE_MEMORY_INST(22, Malloc, MallocInst)  // Heap management instructions
-HANDLE_MEMORY_INST(23, Free  , FreeInst  )
-HANDLE_MEMORY_INST(24, Alloca, AllocaInst)  // Stack management
-HANDLE_MEMORY_INST(25, Load  , LoadInst  )  // Memory manipulation instrs
-HANDLE_MEMORY_INST(26, Store , StoreInst )
-HANDLE_MEMORY_INST(27, GetElementPtr, GetElementPtrInst)
-  LAST_MEMORY_INST(27)
+ FIRST_MEMORY_INST(25)
+HANDLE_MEMORY_INST(25, Malloc, MallocInst)  // Heap management instructions
+HANDLE_MEMORY_INST(26, Free  , FreeInst  )
+HANDLE_MEMORY_INST(27, Alloca, AllocaInst)  // Stack management
+HANDLE_MEMORY_INST(28, Load  , LoadInst  )  // Memory manipulation instrs
+HANDLE_MEMORY_INST(29, Store , StoreInst )
+HANDLE_MEMORY_INST(30, GetElementPtr, GetElementPtrInst)
+  LAST_MEMORY_INST(30)
 
 // Cast operators ...
 // NOTE: The order matters here because CastInst::isEliminableCastPair 
 // NOTE: (see Instructions.cpp) encodes a table based on this ordering.
- FIRST_CAST_INST(28)
-HANDLE_CAST_INST(28, Trunc   , TruncInst   )  // Truncate integers
-HANDLE_CAST_INST(29, ZExt    , ZExtInst    )  // Zero extend integers
-HANDLE_CAST_INST(30, SExt    , SExtInst    )  // Sign extend integers
-HANDLE_CAST_INST(31, FPToUI  , FPToUIInst  )  // floating point -> UInt
-HANDLE_CAST_INST(32, FPToSI  , FPToSIInst  )  // floating point -> SInt
-HANDLE_CAST_INST(33, UIToFP  , UIToFPInst  )  // UInt -> floating point
-HANDLE_CAST_INST(34, SIToFP  , SIToFPInst  )  // SInt -> floating point
-HANDLE_CAST_INST(35, FPTrunc , FPTruncInst )  // Truncate floating point
-HANDLE_CAST_INST(36, FPExt   , FPExtInst   )  // Extend floating point
-HANDLE_CAST_INST(37, PtrToInt, PtrToIntInst)  // Pointer -> Integer
-HANDLE_CAST_INST(38, IntToPtr, IntToPtrInst)  // Integer -> Pointer
-HANDLE_CAST_INST(39, BitCast , BitCastInst )  // Type cast
-  LAST_CAST_INST(39)
+ FIRST_CAST_INST(31)
+HANDLE_CAST_INST(31, Trunc   , TruncInst   )  // Truncate integers
+HANDLE_CAST_INST(32, ZExt    , ZExtInst    )  // Zero extend integers
+HANDLE_CAST_INST(33, SExt    , SExtInst    )  // Sign extend integers
+HANDLE_CAST_INST(34, FPToUI  , FPToUIInst  )  // floating point -> UInt
+HANDLE_CAST_INST(35, FPToSI  , FPToSIInst  )  // floating point -> SInt
+HANDLE_CAST_INST(36, UIToFP  , UIToFPInst  )  // UInt -> floating point
+HANDLE_CAST_INST(37, SIToFP  , SIToFPInst  )  // SInt -> floating point
+HANDLE_CAST_INST(38, FPTrunc , FPTruncInst )  // Truncate floating point
+HANDLE_CAST_INST(39, FPExt   , FPExtInst   )  // Extend floating point
+HANDLE_CAST_INST(40, PtrToInt, PtrToIntInst)  // Pointer -> Integer
+HANDLE_CAST_INST(41, IntToPtr, IntToPtrInst)  // Integer -> Pointer
+HANDLE_CAST_INST(42, BitCast , BitCastInst )  // Type cast
+  LAST_CAST_INST(42)
 
 // Other operators...
- FIRST_OTHER_INST(40)
-HANDLE_OTHER_INST(40, ICmp   , ICmpInst   )  // Integer comparison instruction
-HANDLE_OTHER_INST(41, FCmp   , FCmpInst   )  // Floating point comparison instr.
-HANDLE_OTHER_INST(42, PHI    , PHINode    )  // PHI node instruction
-HANDLE_OTHER_INST(43, Call   , CallInst   )  // Call a function
-HANDLE_OTHER_INST(44, Select , SelectInst )  // select instruction
-HANDLE_OTHER_INST(45, UserOp1, Instruction)  // May be used internally in a pass
-HANDLE_OTHER_INST(46, UserOp2, Instruction)  // Internal to passes only
-HANDLE_OTHER_INST(47, VAArg  , VAArgInst  )  // vaarg instruction
-HANDLE_OTHER_INST(48, ExtractElement, ExtractElementInst)// extract from vector
-HANDLE_OTHER_INST(49, InsertElement, InsertElementInst)  // insert into vector
-HANDLE_OTHER_INST(50, ShuffleVector, ShuffleVectorInst)  // shuffle two vectors.
-HANDLE_OTHER_INST(51, ExtractValue, ExtractValueInst)// extract from aggregate
-HANDLE_OTHER_INST(52, InsertValue, InsertValueInst)  // insert into aggregate
-HANDLE_OTHER_INST(53, VICmp  , VICmpInst  )  // Vec Int comparison instruction.
-HANDLE_OTHER_INST(54, VFCmp  , VFCmpInst  )  // Vec FP point comparison instr.
+ FIRST_OTHER_INST(43)
+HANDLE_OTHER_INST(43, ICmp   , ICmpInst   )  // Integer comparison instruction
+HANDLE_OTHER_INST(44, FCmp   , FCmpInst   )  // Floating point comparison instr.
+HANDLE_OTHER_INST(45, PHI    , PHINode    )  // PHI node instruction
+HANDLE_OTHER_INST(46, Call   , CallInst   )  // Call a function
+HANDLE_OTHER_INST(47, Select , SelectInst )  // select instruction
+HANDLE_OTHER_INST(48, UserOp1, Instruction)  // May be used internally in a pass
+HANDLE_OTHER_INST(49, UserOp2, Instruction)  // Internal to passes only
+HANDLE_OTHER_INST(50, VAArg  , VAArgInst  )  // vaarg instruction
+HANDLE_OTHER_INST(51, ExtractElement, ExtractElementInst)// extract from vector
+HANDLE_OTHER_INST(52, InsertElement, InsertElementInst)  // insert into vector
+HANDLE_OTHER_INST(53, ShuffleVector, ShuffleVectorInst)  // shuffle two vectors.
+HANDLE_OTHER_INST(54, ExtractValue, ExtractValueInst)// extract from aggregate
+HANDLE_OTHER_INST(55, InsertValue, InsertValueInst)  // insert into aggregate
+HANDLE_OTHER_INST(56, VICmp  , VICmpInst  )  // Vec Int comparison instruction.
+HANDLE_OTHER_INST(57, VFCmp  , VFCmpInst  )  // Vec FP point comparison instr.
 
-  LAST_OTHER_INST(55)
+  LAST_OTHER_INST(57)
 
 #undef  FIRST_TERM_INST
 #undef HANDLE_TERM_INST
diff --git a/include/llvm/Support/ConstantFolder.h b/include/llvm/Support/ConstantFolder.h
index ca8bcae..35065a0 100644
--- a/include/llvm/Support/ConstantFolder.h
+++ b/include/llvm/Support/ConstantFolder.h
@@ -32,12 +32,21 @@
   Constant *CreateAdd(Constant *LHS, Constant *RHS) const {
     return ConstantExpr::getAdd(LHS, RHS);
   }
+  Constant *CreateFAdd(Constant *LHS, Constant *RHS) const {
+    return ConstantExpr::getFAdd(LHS, RHS);
+  }
   Constant *CreateSub(Constant *LHS, Constant *RHS) const {
     return ConstantExpr::getSub(LHS, RHS);
   }
+  Constant *CreateFSub(Constant *LHS, Constant *RHS) const {
+    return ConstantExpr::getFSub(LHS, RHS);
+  }
   Constant *CreateMul(Constant *LHS, Constant *RHS) const {
     return ConstantExpr::getMul(LHS, RHS);
   }
+  Constant *CreateFMul(Constant *LHS, Constant *RHS) const {
+    return ConstantExpr::getFMul(LHS, RHS);
+  }
   Constant *CreateUDiv(Constant *LHS, Constant *RHS) const {
     return ConstantExpr::getUDiv(LHS, RHS);
   }
@@ -87,6 +96,9 @@
   Constant *CreateNeg(Constant *C) const {
     return ConstantExpr::getNeg(C);
   }
+  Constant *CreateFNeg(Constant *C) const {
+    return ConstantExpr::getFNeg(C);
+  }
   Constant *CreateNot(Constant *C) const {
     return ConstantExpr::getNot(C);
   }
diff --git a/include/llvm/Support/IRBuilder.h b/include/llvm/Support/IRBuilder.h
index 9ef14af..7942de7 100644
--- a/include/llvm/Support/IRBuilder.h
+++ b/include/llvm/Support/IRBuilder.h
@@ -175,18 +175,36 @@
         return Folder.CreateAdd(LC, RC);
     return Insert(BinaryOperator::CreateAdd(LHS, RHS), Name);
   }
+  Value *CreateFAdd(Value *LHS, Value *RHS, const char *Name = "") {
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      if (Constant *RC = dyn_cast<Constant>(RHS))
+        return Folder.CreateFAdd(LC, RC);
+    return Insert(BinaryOperator::CreateFAdd(LHS, RHS), Name);
+  }
   Value *CreateSub(Value *LHS, Value *RHS, const char *Name = "") {
     if (Constant *LC = dyn_cast<Constant>(LHS))
       if (Constant *RC = dyn_cast<Constant>(RHS))
         return Folder.CreateSub(LC, RC);
     return Insert(BinaryOperator::CreateSub(LHS, RHS), Name);
   }
+  Value *CreateFSub(Value *LHS, Value *RHS, const char *Name = "") {
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      if (Constant *RC = dyn_cast<Constant>(RHS))
+        return Folder.CreateFSub(LC, RC);
+    return Insert(BinaryOperator::CreateFSub(LHS, RHS), Name);
+  }
   Value *CreateMul(Value *LHS, Value *RHS, const char *Name = "") {
     if (Constant *LC = dyn_cast<Constant>(LHS))
       if (Constant *RC = dyn_cast<Constant>(RHS))
         return Folder.CreateMul(LC, RC);
     return Insert(BinaryOperator::CreateMul(LHS, RHS), Name);
   }
+  Value *CreateFMul(Value *LHS, Value *RHS, const char *Name = "") {
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      if (Constant *RC = dyn_cast<Constant>(RHS))
+        return Folder.CreateMul(LC, RC);
+    return Insert(BinaryOperator::CreateFMul(LHS, RHS), Name);
+  }
   Value *CreateUDiv(Value *LHS, Value *RHS, const char *Name = "") {
     if (Constant *LC = dyn_cast<Constant>(LHS))
       if (Constant *RC = dyn_cast<Constant>(RHS))
diff --git a/include/llvm/Support/NoFolder.h b/include/llvm/Support/NoFolder.h
index 1dce497..a49cf84 100644
--- a/include/llvm/Support/NoFolder.h
+++ b/include/llvm/Support/NoFolder.h
@@ -39,12 +39,21 @@
   Value *CreateAdd(Constant *LHS, Constant *RHS) const {
     return BinaryOperator::CreateAdd(LHS, RHS);
   }
+  Value *CreateFAdd(Constant *LHS, Constant *RHS) const {
+    return BinaryOperator::CreateFAdd(LHS, RHS);
+  }
   Value *CreateSub(Constant *LHS, Constant *RHS) const {
     return BinaryOperator::CreateSub(LHS, RHS);
   }
+  Value *CreateFSub(Constant *LHS, Constant *RHS) const {
+    return BinaryOperator::CreateFSub(LHS, RHS);
+  }
   Value *CreateMul(Constant *LHS, Constant *RHS) const {
     return BinaryOperator::CreateMul(LHS, RHS);
   }
+  Value *CreateFMul(Constant *LHS, Constant *RHS) const {
+    return BinaryOperator::CreateFMul(LHS, RHS);
+  }
   Value *CreateUDiv(Constant *LHS, Constant *RHS) const {
     return BinaryOperator::CreateUDiv(LHS, RHS);
   }
diff --git a/include/llvm/Support/PatternMatch.h b/include/llvm/Support/PatternMatch.h
index d27a7f1..fda925f 100644
--- a/include/llvm/Support/PatternMatch.h
+++ b/include/llvm/Support/PatternMatch.h
@@ -157,18 +157,36 @@
 }
 
 template<typename LHS, typename RHS>
+inline BinaryOp_match<LHS, RHS, Instruction::FAdd> m_FAdd(const LHS &L,
+                                                          const RHS &R) {
+  return BinaryOp_match<LHS, RHS, Instruction::FAdd>(L, R);
+}
+
+template<typename LHS, typename RHS>
 inline BinaryOp_match<LHS, RHS, Instruction::Sub> m_Sub(const LHS &L,
                                                         const RHS &R) {
   return BinaryOp_match<LHS, RHS, Instruction::Sub>(L, R);
 }
 
 template<typename LHS, typename RHS>
+inline BinaryOp_match<LHS, RHS, Instruction::FSub> m_FSub(const LHS &L,
+                                                          const RHS &R) {
+  return BinaryOp_match<LHS, RHS, Instruction::FSub>(L, R);
+}
+
+template<typename LHS, typename RHS>
 inline BinaryOp_match<LHS, RHS, Instruction::Mul> m_Mul(const LHS &L,
                                                         const RHS &R) {
   return BinaryOp_match<LHS, RHS, Instruction::Mul>(L, R);
 }
 
 template<typename LHS, typename RHS>
+inline BinaryOp_match<LHS, RHS, Instruction::FMul> m_FMul(const LHS &L,
+                                                          const RHS &R) {
+  return BinaryOp_match<LHS, RHS, Instruction::FMul>(L, R);
+}
+
+template<typename LHS, typename RHS>
 inline BinaryOp_match<LHS, RHS, Instruction::UDiv> m_UDiv(const LHS &L,
                                                         const RHS &R) {
   return BinaryOp_match<LHS, RHS, Instruction::UDiv>(L, R);
@@ -494,6 +512,35 @@
 inline neg_match<LHS> m_Neg(const LHS &L) { return L; }
 
 
+template<typename LHS_t>
+struct fneg_match {
+  LHS_t L;
+
+  fneg_match(const LHS_t &LHS) : L(LHS) {}
+
+  template<typename OpTy>
+  bool match(OpTy *V) {
+    if (Instruction *I = dyn_cast<Instruction>(V))
+      if (I->getOpcode() == Instruction::FSub)
+        return matchIfFNeg(I->getOperand(0), I->getOperand(1));
+    if (ConstantExpr *CE = dyn_cast<ConstantExpr>(V))
+      if (CE->getOpcode() == Instruction::FSub)
+        return matchIfFNeg(CE->getOperand(0), CE->getOperand(1));
+    if (ConstantFP *CF = dyn_cast<ConstantFP>(V))
+      return L.match(ConstantExpr::getFNeg(CF));
+    return false;
+  }
+private:
+  bool matchIfFNeg(Value *LHS, Value *RHS) {
+    return LHS == ConstantExpr::getZeroValueForNegationExpr(LHS->getType()) &&
+           L.match(RHS);
+  }
+};
+
+template<typename LHS>
+inline fneg_match<LHS> m_FNeg(const LHS &L) { return L; }
+
+
 //===----------------------------------------------------------------------===//
 // Matchers for control flow
 //
diff --git a/include/llvm/Support/TargetFolder.h b/include/llvm/Support/TargetFolder.h
index 172e4fe..b0700c1 100644
--- a/include/llvm/Support/TargetFolder.h
+++ b/include/llvm/Support/TargetFolder.h
@@ -48,12 +48,21 @@
   Constant *CreateAdd(Constant *LHS, Constant *RHS) const {
     return Fold(ConstantExpr::getAdd(LHS, RHS));
   }
+  Constant *CreateFAdd(Constant *LHS, Constant *RHS) const {
+    return Fold(ConstantExpr::getFAdd(LHS, RHS));
+  }
   Constant *CreateSub(Constant *LHS, Constant *RHS) const {
     return Fold(ConstantExpr::getSub(LHS, RHS));
   }
+  Constant *CreateFSub(Constant *LHS, Constant *RHS) const {
+    return Fold(ConstantExpr::getFSub(LHS, RHS));
+  }
   Constant *CreateMul(Constant *LHS, Constant *RHS) const {
     return Fold(ConstantExpr::getMul(LHS, RHS));
   }
+  Constant *CreateFMul(Constant *LHS, Constant *RHS) const {
+    return Fold(ConstantExpr::getFMul(LHS, RHS));
+  }
   Constant *CreateUDiv(Constant *LHS, Constant *RHS) const {
     return Fold(ConstantExpr::getUDiv(LHS, RHS));
   }
@@ -103,6 +112,9 @@
   Constant *CreateNeg(Constant *C) const {
     return Fold(ConstantExpr::getNeg(C));
   }
+  Constant *CreateFNeg(Constant *C) const {
+    return Fold(ConstantExpr::getFNeg(C));
+  }
   Constant *CreateNot(Constant *C) const {
     return Fold(ConstantExpr::getNot(C));
   }
diff --git a/lib/Analysis/ValueTracking.cpp b/lib/Analysis/ValueTracking.cpp
index 29ff8aa..45f97b8 100644
--- a/lib/Analysis/ValueTracking.cpp
+++ b/lib/Analysis/ValueTracking.cpp
@@ -771,7 +771,7 @@
   if (I == 0) return false;
   
   // (add x, 0.0) is guaranteed to return +0.0, not -0.0.
-  if (I->getOpcode() == Instruction::Add &&
+  if (I->getOpcode() == Instruction::FAdd &&
       isa<ConstantFP>(I->getOperand(1)) && 
       cast<ConstantFP>(I->getOperand(1))->isNullValue())
     return true;
diff --git a/lib/AsmParser/LLLexer.cpp b/lib/AsmParser/LLLexer.cpp
index 340cfe1..2cfb366 100644
--- a/lib/AsmParser/LLLexer.cpp
+++ b/lib/AsmParser/LLLexer.cpp
@@ -591,7 +591,9 @@
   if (Len == strlen(#STR) && !memcmp(StartChar, #STR, strlen(#STR))) { \
     UIntVal = Instruction::Enum; return lltok::kw_##STR; }
 
-  INSTKEYWORD(add,   Add);  INSTKEYWORD(sub,   Sub);  INSTKEYWORD(mul,   Mul);
+  INSTKEYWORD(add,   Add);  INSTKEYWORD(fadd,   FAdd);
+  INSTKEYWORD(sub,   Sub);  INSTKEYWORD(fsub,   FSub);
+  INSTKEYWORD(mul,   Mul);  INSTKEYWORD(fmul,   FMul);
   INSTKEYWORD(udiv,  UDiv); INSTKEYWORD(sdiv,  SDiv); INSTKEYWORD(fdiv,  FDiv);
   INSTKEYWORD(urem,  URem); INSTKEYWORD(srem,  SRem); INSTKEYWORD(frem,  FRem);
   INSTKEYWORD(shl,   Shl);  INSTKEYWORD(lshr,  LShr); INSTKEYWORD(ashr,  AShr);
diff --git a/lib/AsmParser/LLParser.cpp b/lib/AsmParser/LLParser.cpp
index 4f8be88..b4577ad 100644
--- a/lib/AsmParser/LLParser.cpp
+++ b/lib/AsmParser/LLParser.cpp
@@ -1835,8 +1835,11 @@
       
   // Binary Operators.
   case lltok::kw_add:
+  case lltok::kw_fadd:
   case lltok::kw_sub:
+  case lltok::kw_fsub:
   case lltok::kw_mul:
+  case lltok::kw_fmul:
   case lltok::kw_udiv:
   case lltok::kw_sdiv:
   case lltok::kw_fdiv:
@@ -2400,8 +2403,13 @@
   // Binary Operators.
   case lltok::kw_add:
   case lltok::kw_sub:
-  case lltok::kw_mul:    return ParseArithmetic(Inst, PFS, KeywordVal, 0);
-      
+  case lltok::kw_mul:
+    // API compatibility: Accept either integer or floating-point types.
+    return ParseArithmetic(Inst, PFS, KeywordVal, 0);
+  case lltok::kw_fadd:
+  case lltok::kw_fsub:
+  case lltok::kw_fmul:    return ParseArithmetic(Inst, PFS, KeywordVal, 2);
+
   case lltok::kw_udiv:
   case lltok::kw_sdiv:
   case lltok::kw_urem:
diff --git a/lib/AsmParser/LLToken.h b/lib/AsmParser/LLToken.h
index 2d1cfa5..c2ce560 100644
--- a/lib/AsmParser/LLToken.h
+++ b/lib/AsmParser/LLToken.h
@@ -90,7 +90,8 @@
     kw_ueq, kw_une,
 
     // Instruction Opcodes (Opcode in UIntVal).
-    kw_add,  kw_sub,  kw_mul,  kw_udiv, kw_sdiv, kw_fdiv,
+    kw_add,  kw_fadd, kw_sub,  kw_fsub, kw_mul,  kw_fmul,
+    kw_udiv, kw_sdiv, kw_fdiv,
     kw_urem, kw_srem, kw_frem, kw_shl,  kw_lshr, kw_ashr,
     kw_and,  kw_or,   kw_xor,  kw_icmp, kw_fcmp, kw_vicmp, kw_vfcmp,
 
diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp
index 1dad04b..3b44f56 100644
--- a/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -104,9 +104,12 @@
 static int GetDecodedBinaryOpcode(unsigned Val, const Type *Ty) {
   switch (Val) {
   default: return -1;
-  case bitc::BINOP_ADD:  return Instruction::Add;
-  case bitc::BINOP_SUB:  return Instruction::Sub;
-  case bitc::BINOP_MUL:  return Instruction::Mul;
+  case bitc::BINOP_ADD:
+    return Ty->isFPOrFPVector() ? Instruction::FAdd : Instruction::Add;
+  case bitc::BINOP_SUB:
+    return Ty->isFPOrFPVector() ? Instruction::FSub : Instruction::Sub;
+  case bitc::BINOP_MUL:
+    return Ty->isFPOrFPVector() ? Instruction::FMul : Instruction::Mul;
   case bitc::BINOP_UDIV: return Instruction::UDiv;
   case bitc::BINOP_SDIV:
     return Ty->isFPOrFPVector() ? Instruction::FDiv : Instruction::SDiv;
diff --git a/lib/Bitcode/Writer/BitcodeWriter.cpp b/lib/Bitcode/Writer/BitcodeWriter.cpp
index bfc029c..9f16728 100644
--- a/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -77,9 +77,12 @@
 static unsigned GetEncodedBinaryOpcode(unsigned Opcode) {
   switch (Opcode) {
   default: assert(0 && "Unknown binary instruction!");
-  case Instruction::Add:  return bitc::BINOP_ADD;
-  case Instruction::Sub:  return bitc::BINOP_SUB;
-  case Instruction::Mul:  return bitc::BINOP_MUL;
+  case Instruction::Add:
+  case Instruction::FAdd: return bitc::BINOP_ADD;
+  case Instruction::Sub:
+  case Instruction::FSub: return bitc::BINOP_SUB;
+  case Instruction::Mul:
+  case Instruction::FMul: return bitc::BINOP_MUL;
   case Instruction::UDiv: return bitc::BINOP_UDIV;
   case Instruction::FDiv:
   case Instruction::SDiv: return bitc::BINOP_SDIV;
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index 6becff3..4a7dbeb 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -639,18 +639,18 @@
 bool
 FastISel::SelectOperator(User *I, unsigned Opcode) {
   switch (Opcode) {
-  case Instruction::Add: {
-    ISD::NodeType Opc = I->getType()->isFPOrFPVector() ? ISD::FADD : ISD::ADD;
-    return SelectBinaryOp(I, Opc);
-  }
-  case Instruction::Sub: {
-    ISD::NodeType Opc = I->getType()->isFPOrFPVector() ? ISD::FSUB : ISD::SUB;
-    return SelectBinaryOp(I, Opc);
-  }
-  case Instruction::Mul: {
-    ISD::NodeType Opc = I->getType()->isFPOrFPVector() ? ISD::FMUL : ISD::MUL;
-    return SelectBinaryOp(I, Opc);
-  }
+  case Instruction::Add:
+    return SelectBinaryOp(I, ISD::ADD);
+  case Instruction::FAdd:
+    return SelectBinaryOp(I, ISD::FADD);
+  case Instruction::Sub:
+    return SelectBinaryOp(I, ISD::SUB);
+  case Instruction::FSub:
+    return SelectBinaryOp(I, ISD::FSUB);
+  case Instruction::Mul:
+    return SelectBinaryOp(I, ISD::MUL);
+  case Instruction::FMul:
+    return SelectBinaryOp(I, ISD::FMUL);
   case Instruction::SDiv:
     return SelectBinaryOp(I, ISD::SDIV);
   case Instruction::UDiv:
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 889d7f5..93750d6 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -842,20 +842,6 @@
   }
 }
 
-void SelectionDAGLowering::visitAdd(User &I) {
-  if (I.getType()->isFPOrFPVector())
-    visitBinary(I, ISD::FADD);
-  else
-    visitBinary(I, ISD::ADD);
-}
-
-void SelectionDAGLowering::visitMul(User &I) {
-  if (I.getType()->isFPOrFPVector())
-    visitBinary(I, ISD::FMUL);
-  else
-    visitBinary(I, ISD::MUL);
-}
-
 SDValue SelectionDAGLowering::getValue(const Value *V) {
   SDValue &N = NodeMap[V];
   if (N.getNode()) return N;
@@ -2161,37 +2147,33 @@
 }
 
 
-void SelectionDAGLowering::visitSub(User &I) {
+void SelectionDAGLowering::visitFSub(User &I) {
   // -0.0 - X --> fneg
   const Type *Ty = I.getType();
   if (isa<VectorType>(Ty)) {
     if (ConstantVector *CV = dyn_cast<ConstantVector>(I.getOperand(0))) {
       const VectorType *DestTy = cast<VectorType>(I.getType());
       const Type *ElTy = DestTy->getElementType();
-      if (ElTy->isFloatingPoint()) {
-        unsigned VL = DestTy->getNumElements();
-        std::vector<Constant*> NZ(VL, ConstantFP::getNegativeZero(ElTy));
-        Constant *CNZ = ConstantVector::get(&NZ[0], NZ.size());
-        if (CV == CNZ) {
-          SDValue Op2 = getValue(I.getOperand(1));
-          setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(),
-                                   Op2.getValueType(), Op2));
-          return;
-        }
-      }
-    }
-  }
-  if (Ty->isFloatingPoint()) {
-    if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0)))
-      if (CFP->isExactlyValue(ConstantFP::getNegativeZero(Ty)->getValueAPF())) {
+      unsigned VL = DestTy->getNumElements();
+      std::vector<Constant*> NZ(VL, ConstantFP::getNegativeZero(ElTy));
+      Constant *CNZ = ConstantVector::get(&NZ[0], NZ.size());
+      if (CV == CNZ) {
         SDValue Op2 = getValue(I.getOperand(1));
         setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(),
                                  Op2.getValueType(), Op2));
         return;
       }
+    }
   }
+  if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0)))
+    if (CFP->isExactlyValue(ConstantFP::getNegativeZero(Ty)->getValueAPF())) {
+      SDValue Op2 = getValue(I.getOperand(1));
+      setValue(&I, DAG.getNode(ISD::FNEG, getCurDebugLoc(),
+                               Op2.getValueType(), Op2));
+      return;
+    }
 
-  visitBinary(I, Ty->isFPOrFPVector() ? ISD::FSUB : ISD::SUB);
+  visitBinary(I, ISD::FSUB);
 }
 
 void SelectionDAGLowering::visitBinary(User &I, unsigned OpCode) {
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
index 578aa591..057c841 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
@@ -469,9 +469,12 @@
 
   void visitBinary(User &I, unsigned OpCode);
   void visitShift(User &I, unsigned Opcode);
-  void visitAdd(User &I);
-  void visitSub(User &I);
-  void visitMul(User &I);
+  void visitAdd(User &I)  { visitBinary(I, ISD::ADD); }
+  void visitFAdd(User &I) { visitBinary(I, ISD::FADD); }
+  void visitSub(User &I)  { visitBinary(I, ISD::SUB); }
+  void visitFSub(User &I);
+  void visitMul(User &I)  { visitBinary(I, ISD::MUL); }
+  void visitFMul(User &I) { visitBinary(I, ISD::FMUL); }
   void visitURem(User &I) { visitBinary(I, ISD::UREM); }
   void visitSRem(User &I) { visitBinary(I, ISD::SREM); }
   void visitFRem(User &I) { visitBinary(I, ISD::FREM); }
diff --git a/lib/ExecutionEngine/ExecutionEngine.cpp b/lib/ExecutionEngine/ExecutionEngine.cpp
index 29a05bb..a80513f 100644
--- a/lib/ExecutionEngine/ExecutionEngine.cpp
+++ b/lib/ExecutionEngine/ExecutionEngine.cpp
@@ -573,8 +573,11 @@
       return GV;
     }
     case Instruction::Add:
+    case Instruction::FAdd:
     case Instruction::Sub:
+    case Instruction::FSub:
     case Instruction::Mul:
+    case Instruction::FMul:
     case Instruction::UDiv:
     case Instruction::SDiv:
     case Instruction::URem:
@@ -605,11 +608,11 @@
       case Type::FloatTyID:
         switch (CE->getOpcode()) {
           default: assert(0 && "Invalid float opcode"); abort();
-          case Instruction::Add:  
+          case Instruction::FAdd:
             GV.FloatVal = LHS.FloatVal + RHS.FloatVal; break;
-          case Instruction::Sub:  
+          case Instruction::FSub:
             GV.FloatVal = LHS.FloatVal - RHS.FloatVal; break;
-          case Instruction::Mul:  
+          case Instruction::FMul:
             GV.FloatVal = LHS.FloatVal * RHS.FloatVal; break;
           case Instruction::FDiv: 
             GV.FloatVal = LHS.FloatVal / RHS.FloatVal; break;
@@ -620,11 +623,11 @@
       case Type::DoubleTyID:
         switch (CE->getOpcode()) {
           default: assert(0 && "Invalid double opcode"); abort();
-          case Instruction::Add:  
+          case Instruction::FAdd:
             GV.DoubleVal = LHS.DoubleVal + RHS.DoubleVal; break;
-          case Instruction::Sub:  
+          case Instruction::FSub:
             GV.DoubleVal = LHS.DoubleVal - RHS.DoubleVal; break;
-          case Instruction::Mul:  
+          case Instruction::FMul:
             GV.DoubleVal = LHS.DoubleVal * RHS.DoubleVal; break;
           case Instruction::FDiv: 
             GV.DoubleVal = LHS.DoubleVal / RHS.DoubleVal; break;
@@ -638,15 +641,15 @@
         APFloat apfLHS = APFloat(LHS.IntVal);
         switch (CE->getOpcode()) {
           default: assert(0 && "Invalid long double opcode"); abort();
-          case Instruction::Add:  
+          case Instruction::FAdd:
             apfLHS.add(APFloat(RHS.IntVal), APFloat::rmNearestTiesToEven);
             GV.IntVal = apfLHS.bitcastToAPInt();
             break;
-          case Instruction::Sub:  
+          case Instruction::FSub:
             apfLHS.subtract(APFloat(RHS.IntVal), APFloat::rmNearestTiesToEven);
             GV.IntVal = apfLHS.bitcastToAPInt();
             break;
-          case Instruction::Mul:  
+          case Instruction::FMul:
             apfLHS.multiply(APFloat(RHS.IntVal), APFloat::rmNearestTiesToEven);
             GV.IntVal = apfLHS.bitcastToAPInt();
             break;
diff --git a/lib/ExecutionEngine/Interpreter/Execution.cpp b/lib/ExecutionEngine/Interpreter/Execution.cpp
index 765fed2..7dfeae0 100644
--- a/lib/ExecutionEngine/Interpreter/Execution.cpp
+++ b/lib/ExecutionEngine/Interpreter/Execution.cpp
@@ -64,45 +64,35 @@
      Dest.TY##Val = Src1.TY##Val OP Src2.TY##Val; \
      break
 
-#define IMPLEMENT_INTEGER_BINOP1(OP, TY) \
-   case Type::IntegerTyID: { \
-     Dest.IntVal = Src1.IntVal OP Src2.IntVal; \
-     break; \
-   }
-
-
-static void executeAddInst(GenericValue &Dest, GenericValue Src1, 
-                           GenericValue Src2, const Type *Ty) {
+static void executeFAddInst(GenericValue &Dest, GenericValue Src1,
+                            GenericValue Src2, const Type *Ty) {
   switch (Ty->getTypeID()) {
-    IMPLEMENT_INTEGER_BINOP1(+, Ty);
     IMPLEMENT_BINARY_OPERATOR(+, Float);
     IMPLEMENT_BINARY_OPERATOR(+, Double);
   default:
-    cerr << "Unhandled type for Add instruction: " << *Ty << "\n";
+    cerr << "Unhandled type for FAdd instruction: " << *Ty << "\n";
     abort();
   }
 }
 
-static void executeSubInst(GenericValue &Dest, GenericValue Src1, 
-                           GenericValue Src2, const Type *Ty) {
+static void executeFSubInst(GenericValue &Dest, GenericValue Src1,
+                            GenericValue Src2, const Type *Ty) {
   switch (Ty->getTypeID()) {
-    IMPLEMENT_INTEGER_BINOP1(-, Ty);
     IMPLEMENT_BINARY_OPERATOR(-, Float);
     IMPLEMENT_BINARY_OPERATOR(-, Double);
   default:
-    cerr << "Unhandled type for Sub instruction: " << *Ty << "\n";
+    cerr << "Unhandled type for FSub instruction: " << *Ty << "\n";
     abort();
   }
 }
 
-static void executeMulInst(GenericValue &Dest, GenericValue Src1, 
-                           GenericValue Src2, const Type *Ty) {
+static void executeFMulInst(GenericValue &Dest, GenericValue Src1,
+                            GenericValue Src2, const Type *Ty) {
   switch (Ty->getTypeID()) {
-    IMPLEMENT_INTEGER_BINOP1(*, Ty);
     IMPLEMENT_BINARY_OPERATOR(*, Float);
     IMPLEMENT_BINARY_OPERATOR(*, Double);
   default:
-    cerr << "Unhandled type for Mul instruction: " << *Ty << "\n";
+    cerr << "Unhandled type for FMul instruction: " << *Ty << "\n";
     abort();
   }
 }
@@ -550,11 +540,14 @@
   GenericValue R;   // Result
 
   switch (I.getOpcode()) {
-  case Instruction::Add:   executeAddInst  (R, Src1, Src2, Ty); break;
-  case Instruction::Sub:   executeSubInst  (R, Src1, Src2, Ty); break;
-  case Instruction::Mul:   executeMulInst  (R, Src1, Src2, Ty); break;
-  case Instruction::FDiv:  executeFDivInst (R, Src1, Src2, Ty); break;
-  case Instruction::FRem:  executeFRemInst (R, Src1, Src2, Ty); break;
+  case Instruction::Add:   R.IntVal = Src1.IntVal + Src2.IntVal; break;
+  case Instruction::Sub:   R.IntVal = Src1.IntVal - Src2.IntVal; break;
+  case Instruction::Mul:   R.IntVal = Src1.IntVal * Src2.IntVal; break;
+  case Instruction::FAdd:  executeFAddInst(R, Src1, Src2, Ty); break;
+  case Instruction::FSub:  executeFSubInst(R, Src1, Src2, Ty); break;
+  case Instruction::FMul:  executeFMulInst(R, Src1, Src2, Ty); break;
+  case Instruction::FDiv:  executeFDivInst(R, Src1, Src2, Ty); break;
+  case Instruction::FRem:  executeFRemInst(R, Src1, Src2, Ty); break;
   case Instruction::UDiv:  R.IntVal = Src1.IntVal.udiv(Src2.IntVal); break;
   case Instruction::SDiv:  R.IntVal = Src1.IntVal.sdiv(Src2.IntVal); break;
   case Instruction::URem:  R.IntVal = Src1.IntVal.urem(Src2.IntVal); break;
@@ -1258,18 +1251,21 @@
   GenericValue Dest;
   const Type * Ty = CE->getOperand(0)->getType();
   switch (CE->getOpcode()) {
-  case Instruction::Add:  executeAddInst (Dest, Op0, Op1, Ty); break;
-  case Instruction::Sub:  executeSubInst (Dest, Op0, Op1, Ty); break;
-  case Instruction::Mul:  executeMulInst (Dest, Op0, Op1, Ty); break;
+  case Instruction::Add:  Dest.IntVal = Op0.IntVal + Op1.IntVal; break;
+  case Instruction::Sub:  Dest.IntVal = Op0.IntVal - Op1.IntVal; break;
+  case Instruction::Mul:  Dest.IntVal = Op0.IntVal * Op1.IntVal; break;
+  case Instruction::FAdd: executeFAddInst(Dest, Op0, Op1, Ty); break;
+  case Instruction::FSub: executeFSubInst(Dest, Op0, Op1, Ty); break;
+  case Instruction::FMul: executeFMulInst(Dest, Op0, Op1, Ty); break;
   case Instruction::FDiv: executeFDivInst(Dest, Op0, Op1, Ty); break;
   case Instruction::FRem: executeFRemInst(Dest, Op0, Op1, Ty); break;
   case Instruction::SDiv: Dest.IntVal = Op0.IntVal.sdiv(Op1.IntVal); break;
   case Instruction::UDiv: Dest.IntVal = Op0.IntVal.udiv(Op1.IntVal); break;
   case Instruction::URem: Dest.IntVal = Op0.IntVal.urem(Op1.IntVal); break;
   case Instruction::SRem: Dest.IntVal = Op0.IntVal.srem(Op1.IntVal); break;
-  case Instruction::And:  Dest.IntVal = Op0.IntVal.And(Op1.IntVal); break;
-  case Instruction::Or:   Dest.IntVal = Op0.IntVal.Or(Op1.IntVal); break;
-  case Instruction::Xor:  Dest.IntVal = Op0.IntVal.Xor(Op1.IntVal); break;
+  case Instruction::And:  Dest.IntVal = Op0.IntVal & Op1.IntVal; break;
+  case Instruction::Or:   Dest.IntVal = Op0.IntVal | Op1.IntVal; break;
+  case Instruction::Xor:  Dest.IntVal = Op0.IntVal ^ Op1.IntVal; break;
   case Instruction::Shl:  
     Dest.IntVal = Op0.IntVal.shl(Op1.IntVal.getZExtValue());
     break;
diff --git a/lib/ExecutionEngine/JIT/JITEmitter.cpp b/lib/ExecutionEngine/JIT/JITEmitter.cpp
index d3b0820..43f23e4 100644
--- a/lib/ExecutionEngine/JIT/JITEmitter.cpp
+++ b/lib/ExecutionEngine/JIT/JITEmitter.cpp
@@ -891,8 +891,11 @@
       break;
     }
     case Instruction::Add:
+    case Instruction::FAdd:
     case Instruction::Sub:
+    case Instruction::FSub:
     case Instruction::Mul:
+    case Instruction::FMul:
     case Instruction::UDiv:
     case Instruction::SDiv:
     case Instruction::URem:
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index 4d7b545..ed3ff81 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -1000,8 +1000,11 @@
       Out << ')';
       return;
     case Instruction::Add:
+    case Instruction::FAdd:
     case Instruction::Sub:
+    case Instruction::FSub:
     case Instruction::Mul:
+    case Instruction::FMul:
     case Instruction::SDiv:
     case Instruction::UDiv:
     case Instruction::FDiv:
@@ -1020,9 +1023,12 @@
       bool NeedsClosingParens = printConstExprCast(CE, Static); 
       printConstantWithCast(CE->getOperand(0), CE->getOpcode());
       switch (CE->getOpcode()) {
-      case Instruction::Add: Out << " + "; break;
-      case Instruction::Sub: Out << " - "; break;
-      case Instruction::Mul: Out << " * "; break;
+      case Instruction::Add:
+      case Instruction::FAdd: Out << " + "; break;
+      case Instruction::Sub:
+      case Instruction::FSub: Out << " - "; break;
+      case Instruction::Mul:
+      case Instruction::FMul: Out << " * "; break;
       case Instruction::URem:
       case Instruction::SRem: 
       case Instruction::FRem: Out << " % "; break;
@@ -1322,8 +1328,6 @@
   case Instruction::Mul:
     // We need to cast integer arithmetic so that it is always performed
     // as unsigned, to avoid undefined behavior on overflow.
-    if (!Ty->isIntOrIntVector()) break;
-    // FALL THROUGH
   case Instruction::LShr:
   case Instruction::URem: 
   case Instruction::UDiv: NeedsExplicitCast = true; break;
@@ -1387,8 +1391,6 @@
     case Instruction::Mul:
       // We need to cast integer arithmetic so that it is always performed
       // as unsigned, to avoid undefined behavior on overflow.
-      if (!OpTy->isIntOrIntVector()) break;
-      // FALL THROUGH
     case Instruction::LShr:
     case Instruction::UDiv:
     case Instruction::URem:
@@ -1505,8 +1507,6 @@
   case Instruction::Mul:
     // We need to cast integer arithmetic so that it is always performed
     // as unsigned, to avoid undefined behavior on overflow.
-    if (!Ty->isIntOrIntVector()) break;
-    // FALL THROUGH
   case Instruction::LShr:
   case Instruction::URem: 
   case Instruction::UDiv: 
@@ -1552,8 +1552,6 @@
     case Instruction::Mul:
       // We need to cast integer arithmetic so that it is always performed
       // as unsigned, to avoid undefined behavior on overflow.
-      if (!OpTy->isIntOrIntVector()) break;
-      // FALL THROUGH
     case Instruction::LShr:
     case Instruction::UDiv:
     case Instruction::URem: // Cast to unsigned first
@@ -2602,10 +2600,14 @@
 
   // If this is a negation operation, print it out as such.  For FP, we don't
   // want to print "-0.0 - X".
-  if (BinaryOperator::isNeg(&I)) {
+  if (BinaryOperator::isNeg(&I) || BinaryOperator::isFNeg(&I)) {
     Out << "-(";
     writeOperand(BinaryOperator::getNegArgument(cast<BinaryOperator>(&I)));
     Out << ")";
+  } else if (BinaryOperator::isFNeg(&I)) {
+    Out << "-(";
+    writeOperand(BinaryOperator::getFNegArgument(cast<BinaryOperator>(&I)));
+    Out << ")";
   } else if (I.getOpcode() == Instruction::FRem) {
     // Output a call to fmod/fmodf instead of emitting a%b
     if (I.getType() == Type::FloatTy)
@@ -2630,9 +2632,12 @@
     writeOperandWithCast(I.getOperand(0), I.getOpcode());
 
     switch (I.getOpcode()) {
-    case Instruction::Add:  Out << " + "; break;
-    case Instruction::Sub:  Out << " - "; break;
-    case Instruction::Mul:  Out << " * "; break;
+    case Instruction::Add:
+    case Instruction::FAdd: Out << " + "; break;
+    case Instruction::Sub:
+    case Instruction::FSub: Out << " - "; break;
+    case Instruction::Mul:
+    case Instruction::FMul: Out << " * "; break;
     case Instruction::URem:
     case Instruction::SRem:
     case Instruction::FRem: Out << " % "; break;
diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp
index 4082989..04a6829 100644
--- a/lib/Target/CppBackend/CPPBackend.cpp
+++ b/lib/Target/CppBackend/CPPBackend.cpp
@@ -865,8 +865,11 @@
         Out << "Constant* " << constName << " = ConstantExpr::";
         switch (CE->getOpcode()) {
         case Instruction::Add:    Out << "getAdd(";  break;
+        case Instruction::FAdd:   Out << "getFAdd(";  break;
         case Instruction::Sub:    Out << "getSub("; break;
+        case Instruction::FSub:   Out << "getFSub("; break;
         case Instruction::Mul:    Out << "getMul("; break;
+        case Instruction::FMul:   Out << "getFMul("; break;
         case Instruction::UDiv:   Out << "getUDiv("; break;
         case Instruction::SDiv:   Out << "getSDiv("; break;
         case Instruction::FDiv:   Out << "getFDiv("; break;
@@ -1159,8 +1162,11 @@
       break;
     }
     case Instruction::Add:
+    case Instruction::FAdd:
     case Instruction::Sub:
+    case Instruction::FSub:
     case Instruction::Mul:
+    case Instruction::FMul:
     case Instruction::UDiv:
     case Instruction::SDiv:
     case Instruction::FDiv:
@@ -1176,8 +1182,11 @@
       Out << "BinaryOperator* " << iName << " = BinaryOperator::Create(";
       switch (I->getOpcode()) {
       case Instruction::Add: Out << "Instruction::Add"; break;
+      case Instruction::FAdd: Out << "Instruction::FAdd"; break;
       case Instruction::Sub: Out << "Instruction::Sub"; break;
+      case Instruction::FSub: Out << "Instruction::FSub"; break;
       case Instruction::Mul: Out << "Instruction::Mul"; break;
+      case Instruction::FMul: Out << "Instruction::FMul"; break;
       case Instruction::UDiv:Out << "Instruction::UDiv"; break;
       case Instruction::SDiv:Out << "Instruction::SDiv"; break;
       case Instruction::FDiv:Out << "Instruction::FDiv"; break;
diff --git a/lib/Target/MSIL/MSILWriter.cpp b/lib/Target/MSIL/MSILWriter.cpp
index ada851d..37e5b1e 100644
--- a/lib/Target/MSIL/MSILWriter.cpp
+++ b/lib/Target/MSIL/MSILWriter.cpp
@@ -1060,12 +1060,15 @@
     break;
   // Binary
   case Instruction::Add:
+  case Instruction::FAdd:
     printBinaryInstruction("add",Left,Right);
     break;
   case Instruction::Sub:
+  case Instruction::FSub:
     printBinaryInstruction("sub",Left,Right);
     break;
-  case Instruction::Mul:  
+  case Instruction::Mul:
+  case Instruction::FMul:
     printBinaryInstruction("mul",Left,Right);
     break;
   case Instruction::UDiv:
@@ -1322,12 +1325,15 @@
     printSelectInstruction(CE->getOperand(0),CE->getOperand(1),CE->getOperand(2));
     break;
   case Instruction::Add:
+  case Instruction::FAdd:
     printBinaryInstruction("add",left,right);
     break;
   case Instruction::Sub:
+  case Instruction::FSub:
     printBinaryInstruction("sub",left,right);
     break;
   case Instruction::Mul:
+  case Instruction::FMul:
     printBinaryInstruction("mul",left,right);
     break;
   case Instruction::UDiv:
diff --git a/lib/Transforms/Scalar/GVN.cpp b/lib/Transforms/Scalar/GVN.cpp
index 733dfa9..673d38b 100644
--- a/lib/Transforms/Scalar/GVN.cpp
+++ b/lib/Transforms/Scalar/GVN.cpp
@@ -59,7 +59,8 @@
 /// two values.
 namespace {
   struct VISIBILITY_HIDDEN Expression {
-    enum ExpressionOpcode { ADD, SUB, MUL, UDIV, SDIV, FDIV, UREM, SREM, 
+    enum ExpressionOpcode { ADD, FADD, SUB, FSUB, MUL, FMUL,
+                            UDIV, SDIV, FDIV, UREM, SREM,
                             FREM, SHL, LSHR, ASHR, AND, OR, XOR, ICMPEQ, 
                             ICMPNE, ICMPUGT, ICMPUGE, ICMPULT, ICMPULE, 
                             ICMPSGT, ICMPSGE, ICMPSLT, ICMPSLE, FCMPOEQ, 
@@ -200,8 +201,11 @@
   default: // THIS SHOULD NEVER HAPPEN
     assert(0 && "Binary operator with unknown opcode?");
   case Instruction::Add:  return Expression::ADD;
+  case Instruction::FAdd: return Expression::FADD;
   case Instruction::Sub:  return Expression::SUB;
+  case Instruction::FSub: return Expression::FSUB;
   case Instruction::Mul:  return Expression::MUL;
+  case Instruction::FMul: return Expression::FMUL;
   case Instruction::UDiv: return Expression::UDIV;
   case Instruction::SDiv: return Expression::SDIV;
   case Instruction::FDiv: return Expression::FDIV;
diff --git a/lib/Transforms/Scalar/GVNPRE.cpp b/lib/Transforms/Scalar/GVNPRE.cpp
index e3b0937..0f3153f 100644
--- a/lib/Transforms/Scalar/GVNPRE.cpp
+++ b/lib/Transforms/Scalar/GVNPRE.cpp
@@ -55,7 +55,8 @@
 /// two values.
 
 struct Expression {
-  enum ExpressionOpcode { ADD, SUB, MUL, UDIV, SDIV, FDIV, UREM, SREM, 
+  enum ExpressionOpcode { ADD, FADD, SUB, FSUB, MUL, FMUL,
+                          UDIV, SDIV, FDIV, UREM, SREM,
                           FREM, SHL, LSHR, ASHR, AND, OR, XOR, ICMPEQ, 
                           ICMPNE, ICMPUGT, ICMPUGE, ICMPULT, ICMPULE, 
                           ICMPSGT, ICMPSGE, ICMPSLT, ICMPSLE, FCMPOEQ, 
@@ -202,10 +203,16 @@
   switch(BO->getOpcode()) {
     case Instruction::Add:
       return Expression::ADD;
+    case Instruction::FAdd:
+      return Expression::FADD;
     case Instruction::Sub:
       return Expression::SUB;
+    case Instruction::FSub:
+      return Expression::FSUB;
     case Instruction::Mul:
       return Expression::MUL;
+    case Instruction::FMul:
+      return Expression::FMUL;
     case Instruction::UDiv:
       return Expression::UDIV;
     case Instruction::SDiv:
diff --git a/lib/Transforms/Scalar/IndVarSimplify.cpp b/lib/Transforms/Scalar/IndVarSimplify.cpp
index af61eae..83503fd 100644
--- a/lib/Transforms/Scalar/IndVarSimplify.cpp
+++ b/lib/Transforms/Scalar/IndVarSimplify.cpp
@@ -754,7 +754,7 @@
   BinaryOperator *Incr =
     dyn_cast<BinaryOperator>(PH->getIncomingValue(BackEdge));
   if (!Incr) return;
-  if (Incr->getOpcode() != Instruction::Add) return;
+  if (Incr->getOpcode() != Instruction::FAdd) return;
   ConstantFP *IncrValue = NULL;
   unsigned IncrVIndex = 1;
   if (Incr->getOperand(1) == PH)
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 8bb16f3..97bd34c 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -167,8 +167,11 @@
     //   otherwise    - Change was made, replace I with returned instruction
     //
     Instruction *visitAdd(BinaryOperator &I);
+    Instruction *visitFAdd(BinaryOperator &I);
     Instruction *visitSub(BinaryOperator &I);
+    Instruction *visitFSub(BinaryOperator &I);
     Instruction *visitMul(BinaryOperator &I);
+    Instruction *visitFMul(BinaryOperator &I);
     Instruction *visitURem(BinaryOperator &I);
     Instruction *visitSRem(BinaryOperator &I);
     Instruction *visitFRem(BinaryOperator &I);
@@ -403,7 +406,8 @@
 //   0 -> undef, 1 -> Const, 2 -> Other, 3 -> Arg, 3 -> Unary, 4 -> OtherInst
 static unsigned getComplexity(Value *V) {
   if (isa<Instruction>(V)) {
-    if (BinaryOperator::isNeg(V) || BinaryOperator::isNot(V))
+    if (BinaryOperator::isNeg(V) || BinaryOperator::isFNeg(V) ||
+        BinaryOperator::isNot(V))
       return 3;
     return 4;
   }
@@ -576,6 +580,25 @@
   return 0;
 }
 
+// dyn_castFNegVal - Given a 'fsub' instruction, return the RHS of the
+// instruction if the LHS is a constant negative zero (which is the 'negate'
+// form).
+//
+static inline Value *dyn_castFNegVal(Value *V) {
+  if (BinaryOperator::isFNeg(V))
+    return BinaryOperator::getFNegArgument(V);
+
+  // Constants can be considered to be negated values if they can be folded.
+  if (ConstantFP *C = dyn_cast<ConstantFP>(V))
+    return ConstantExpr::getFNeg(C);
+
+  if (ConstantVector *C = dyn_cast<ConstantVector>(V))
+    if (C->getType()->getElementType()->isFloatingPoint())
+      return ConstantExpr::getFNeg(C);
+
+  return 0;
+}
+
 static inline Value *dyn_castNotVal(Value *V) {
   if (BinaryOperator::isNot(V))
     return BinaryOperator::getNotArgument(V);
@@ -1733,12 +1756,12 @@
           default: assert(0 && "Case stmts out of sync!");
           case Intrinsic::x86_sse_sub_ss:
           case Intrinsic::x86_sse2_sub_sd:
-            TmpV = InsertNewInstBefore(BinaryOperator::CreateSub(LHS, RHS,
+            TmpV = InsertNewInstBefore(BinaryOperator::CreateFSub(LHS, RHS,
                                                         II->getName()), *II);
             break;
           case Intrinsic::x86_sse_mul_ss:
           case Intrinsic::x86_sse2_mul_sd:
-            TmpV = InsertNewInstBefore(BinaryOperator::CreateMul(LHS, RHS,
+            TmpV = InsertNewInstBefore(BinaryOperator::CreateFMul(LHS, RHS,
                                                          II->getName()), *II);
             break;
           }
@@ -2052,14 +2075,8 @@
       return ReplaceInstUsesWith(I, RHS);
 
     // X + 0 --> X
-    if (!I.getType()->isFPOrFPVector()) { // NOTE: -0 + +0 = +0.
-      if (RHSC->isNullValue())
-        return ReplaceInstUsesWith(I, LHS);
-    } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(RHSC)) {
-      if (CFP->isExactlyValue(ConstantFP::getNegativeZero
-                              (I.getType())->getValueAPF()))
-        return ReplaceInstUsesWith(I, LHS);
-    }
+    if (RHSC->isNullValue())
+      return ReplaceInstUsesWith(I, LHS);
 
     if (ConstantInt *CI = dyn_cast<ConstantInt>(RHSC)) {
       // X + (signbit) --> X ^ signbit
@@ -2317,11 +2334,6 @@
         return SelectInst::Create(SI->getCondition(), A, N);
     }
   }
-  
-  // Check for X+0.0.  Simplify it to X if we know X is not -0.0.
-  if (ConstantFP *CFP = dyn_cast<ConstantFP>(RHS))
-    if (CFP->getValueAPF().isPosZero() && CannotBeNegativeZero(LHS))
-      return ReplaceInstUsesWith(I, LHS);
 
   // Check for (add (sext x), y), see if we can merge this into an
   // integer add followed by a sext.
@@ -2359,7 +2371,42 @@
       }
     }
   }
-  
+
+  return Changed ? &I : 0;
+}
+
+Instruction *InstCombiner::visitFAdd(BinaryOperator &I) {
+  bool Changed = SimplifyCommutative(I);
+  Value *LHS = I.getOperand(0), *RHS = I.getOperand(1);
+
+  if (Constant *RHSC = dyn_cast<Constant>(RHS)) {
+    // X + 0 --> X
+    if (ConstantFP *CFP = dyn_cast<ConstantFP>(RHSC)) {
+      if (CFP->isExactlyValue(ConstantFP::getNegativeZero
+                              (I.getType())->getValueAPF()))
+        return ReplaceInstUsesWith(I, LHS);
+    }
+
+    if (isa<PHINode>(LHS))
+      if (Instruction *NV = FoldOpIntoPhi(I))
+        return NV;
+  }
+
+  // -A + B  -->  B - A
+  // -A + -B  -->  -(A + B)
+  if (Value *LHSV = dyn_castFNegVal(LHS))
+    return BinaryOperator::CreateFSub(RHS, LHSV);
+
+  // A + -B  -->  A - B
+  if (!isa<Constant>(RHS))
+    if (Value *V = dyn_castFNegVal(RHS))
+      return BinaryOperator::CreateFSub(LHS, V);
+
+  // Check for X+0.0.  Simplify it to X if we know X is not -0.0.
+  if (ConstantFP *CFP = dyn_cast<ConstantFP>(RHS))
+    if (CFP->getValueAPF().isPosZero() && CannotBeNegativeZero(LHS))
+      return ReplaceInstUsesWith(I, LHS);
+
   // Check for (add double (sitofp x), y), see if we can merge this into an
   // integer add followed by a promotion.
   if (SIToFPInst *LHSConv = dyn_cast<SIToFPInst>(LHS)) {
@@ -2407,8 +2454,7 @@
 Instruction *InstCombiner::visitSub(BinaryOperator &I) {
   Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
 
-  if (Op0 == Op1 &&                        // sub X, X  -> 0
-      !I.getType()->isFPOrFPVector())
+  if (Op0 == Op1)                        // sub X, X  -> 0
     return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));
 
   // If this is a 'B = x-(-A)', change to B = x+A...
@@ -2469,8 +2515,7 @@
     return BinaryOperator::CreateXor(Op0, Op1);
 
   if (BinaryOperator *Op1I = dyn_cast<BinaryOperator>(Op1)) {
-    if (Op1I->getOpcode() == Instruction::Add &&
-        !Op0->getType()->isFPOrFPVector()) {
+    if (Op1I->getOpcode() == Instruction::Add) {
       if (Op1I->getOperand(0) == Op0)              // X-(X+Y) == -Y
         return BinaryOperator::CreateNeg(Op1I->getOperand(1), I.getName());
       else if (Op1I->getOperand(1) == Op0)         // X-(Y+X) == -Y
@@ -2487,8 +2532,7 @@
       // Replace (x - (y - z)) with (x + (z - y)) if the (y - z) subexpression
       // is not used by anyone else...
       //
-      if (Op1I->getOpcode() == Instruction::Sub &&
-          !Op1I->getType()->isFPOrFPVector()) {
+      if (Op1I->getOpcode() == Instruction::Sub) {
         // Swap the two operands of the subexpr...
         Value *IIOp0 = Op1I->getOperand(0), *IIOp1 = Op1I->getOperand(1);
         Op1I->setOperand(0, IIOp1);
@@ -2526,18 +2570,17 @@
     }
   }
 
-  if (!Op0->getType()->isFPOrFPVector())
-    if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) {
-      if (Op0I->getOpcode() == Instruction::Add) {
-        if (Op0I->getOperand(0) == Op1)             // (Y+X)-Y == X
-          return ReplaceInstUsesWith(I, Op0I->getOperand(1));
-        else if (Op0I->getOperand(1) == Op1)        // (X+Y)-Y == X
-          return ReplaceInstUsesWith(I, Op0I->getOperand(0));
-      } else if (Op0I->getOpcode() == Instruction::Sub) {
-        if (Op0I->getOperand(0) == Op1)             // (X-Y)-X == -Y
-          return BinaryOperator::CreateNeg(Op0I->getOperand(1), I.getName());
-      }
+  if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) {
+    if (Op0I->getOpcode() == Instruction::Add) {
+      if (Op0I->getOperand(0) == Op1)             // (Y+X)-Y == X
+        return ReplaceInstUsesWith(I, Op0I->getOperand(1));
+      else if (Op0I->getOperand(1) == Op1)        // (X+Y)-Y == X
+        return ReplaceInstUsesWith(I, Op0I->getOperand(0));
+    } else if (Op0I->getOpcode() == Instruction::Sub) {
+      if (Op0I->getOperand(0) == Op1)             // (X-Y)-X == -Y
+        return BinaryOperator::CreateNeg(Op0I->getOperand(1), I.getName());
     }
+  }
 
   ConstantInt *C1;
   if (Value *X = dyn_castFoldableMul(Op0, C1)) {
@@ -2551,6 +2594,40 @@
   return 0;
 }
 
+Instruction *InstCombiner::visitFSub(BinaryOperator &I) {
+  Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
+
+  // If this is a 'B = x-(-A)', change to B = x+A...
+  if (Value *V = dyn_castFNegVal(Op1))
+    return BinaryOperator::CreateFAdd(Op0, V);
+
+  if (BinaryOperator *Op1I = dyn_cast<BinaryOperator>(Op1)) {
+    if (Op1I->getOpcode() == Instruction::FAdd) {
+      if (Op1I->getOperand(0) == Op0)              // X-(X+Y) == -Y
+        return BinaryOperator::CreateFNeg(Op1I->getOperand(1), I.getName());
+      else if (Op1I->getOperand(1) == Op0)         // X-(Y+X) == -Y
+        return BinaryOperator::CreateFNeg(Op1I->getOperand(0), I.getName());
+    }
+
+    if (Op1I->hasOneUse()) {
+      // Replace (x - (y - z)) with (x + (z - y)) if the (y - z) subexpression
+      // is not used by anyone else...
+      //
+      if (Op1I->getOpcode() == Instruction::FSub) {
+        // Swap the two operands of the subexpr...
+        Value *IIOp0 = Op1I->getOperand(0), *IIOp1 = Op1I->getOperand(1);
+        Op1I->setOperand(0, IIOp1);
+        Op1I->setOperand(1, IIOp0);
+
+        // Create the new top level fadd instruction...
+        return BinaryOperator::CreateFAdd(Op0, Op1);
+      }
+    }
+  }
+
+  return 0;
+}
+
 /// isSignBitCheck - Given an exploded icmp instruction, return true if the
 /// comparison only checks the sign bit.  If it only checks the sign bit, set
 /// TrueIfSigned if the result of the comparison is true when the input value is
@@ -2613,13 +2690,6 @@
         return BinaryOperator::CreateShl(Op0,
                  ConstantInt::get(Op0->getType(), Val.logBase2()));
       }
-    } else if (ConstantFP *Op1F = dyn_cast<ConstantFP>(Op1)) {
-      // TODO: If Op1 is zero and Op0 is finite, return zero.
-
-      // "In IEEE floating point, x*1 is not equivalent to x for nans.  However,
-      // ANSI says we can drop signals, so we can do this anyway." (from GCC)
-      if (Op1F->isExactlyValue(1.0))
-        return ReplaceInstUsesWith(I, Op0);  // Eliminate 'mul double %X, 1.0'
     } else if (isa<VectorType>(Op1->getType())) {
       // TODO: If Op1 is all zeros and Op0 is all finite, return all zeros.
 
@@ -2629,9 +2699,6 @@
 
         // As above, vector X*splat(1.0) -> X in all defined cases.
         if (Constant *Splat = Op1V->getSplatValue()) {
-          if (ConstantFP *F = dyn_cast<ConstantFP>(Splat))
-            if (F->isExactlyValue(1.0))
-              return ReplaceInstUsesWith(I, Op0);
           if (ConstantInt *CI = dyn_cast<ConstantInt>(Splat))
             if (CI->equalsInt(1))
               return ReplaceInstUsesWith(I, Op0);
@@ -2755,6 +2822,45 @@
   return Changed ? &I : 0;
 }
 
+Instruction *InstCombiner::visitFMul(BinaryOperator &I) {
+  bool Changed = SimplifyCommutative(I);
+  Value *Op0 = I.getOperand(0);
+
+  // Simplify mul instructions with a constant RHS...
+  if (Constant *Op1 = dyn_cast<Constant>(I.getOperand(1))) {
+    if (ConstantFP *Op1F = dyn_cast<ConstantFP>(Op1)) {
+      // "In IEEE floating point, x*1 is not equivalent to x for nans.  However,
+      // ANSI says we can drop signals, so we can do this anyway." (from GCC)
+      if (Op1F->isExactlyValue(1.0))
+        return ReplaceInstUsesWith(I, Op0);  // Eliminate 'mul double %X, 1.0'
+    } else if (isa<VectorType>(Op1->getType())) {
+      if (ConstantVector *Op1V = dyn_cast<ConstantVector>(Op1)) {
+        // As above, vector X*splat(1.0) -> X in all defined cases.
+        if (Constant *Splat = Op1V->getSplatValue()) {
+          if (ConstantFP *F = dyn_cast<ConstantFP>(Splat))
+            if (F->isExactlyValue(1.0))
+              return ReplaceInstUsesWith(I, Op0);
+        }
+      }
+    }
+
+    // Try to fold constant mul into select arguments.
+    if (SelectInst *SI = dyn_cast<SelectInst>(Op0))
+      if (Instruction *R = FoldOpIntoSelect(I, SI, this))
+        return R;
+
+    if (isa<PHINode>(Op0))
+      if (Instruction *NV = FoldOpIntoPhi(I))
+        return NV;
+  }
+
+  if (Value *Op0v = dyn_castFNegVal(Op0))     // -X * -Y = X*Y
+    if (Value *Op1v = dyn_castFNegVal(I.getOperand(1)))
+      return BinaryOperator::CreateFMul(Op0v, Op1v);
+
+  return Changed ? &I : 0;
+}
+
 /// SimplifyDivRemOfSelect - Try to fold a divide or remainder of a select
 /// instruction.
 bool InstCombiner::SimplifyDivRemOfSelect(BinaryOperator &I) {
@@ -8562,17 +8668,17 @@
   if (Instruction *I = commonCastTransforms(CI))
     return I;
   
-  // If we have fptrunc(add (fpextend x), (fpextend y)), where x and y are
+  // If we have fptrunc(fadd (fpextend x), (fpextend y)), where x and y are
   // smaller than the destination type, we can eliminate the truncate by doing
-  // the add as the smaller type.  This applies to add/sub/mul/div as well as
+  // the add as the smaller type.  This applies to fadd/fsub/fmul/fdiv as well as
   // many builtins (sqrt, etc).
   BinaryOperator *OpI = dyn_cast<BinaryOperator>(CI.getOperand(0));
   if (OpI && OpI->hasOneUse()) {
     switch (OpI->getOpcode()) {
     default: break;
-    case Instruction::Add:
-    case Instruction::Sub:
-    case Instruction::Mul:
+    case Instruction::FAdd:
+    case Instruction::FSub:
+    case Instruction::FMul:
     case Instruction::FDiv:
     case Instruction::FRem:
       const Type *SrcTy = OpI->getType();
@@ -9322,11 +9428,15 @@
 
         // Turn select C, (X+Y), (X-Y) --> (X+(select C, Y, (-Y))).  This is
         // even legal for FP.
-        if (TI->getOpcode() == Instruction::Sub &&
-            FI->getOpcode() == Instruction::Add) {
+        if ((TI->getOpcode() == Instruction::Sub &&
+             FI->getOpcode() == Instruction::Add) ||
+            (TI->getOpcode() == Instruction::FSub &&
+             FI->getOpcode() == Instruction::FAdd)) {
           AddOp = FI; SubOp = TI;
-        } else if (FI->getOpcode() == Instruction::Sub &&
-                   TI->getOpcode() == Instruction::Add) {
+        } else if ((FI->getOpcode() == Instruction::Sub &&
+                    TI->getOpcode() == Instruction::Add) ||
+                   (FI->getOpcode() == Instruction::FSub &&
+                    TI->getOpcode() == Instruction::FAdd)) {
           AddOp = TI; SubOp = FI;
         }
 
diff --git a/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
index 92270b5..f05afec 100644
--- a/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -2268,7 +2268,8 @@
       /* create new increment. '++d' in above example. */
       ConstantFP *CFP = ConstantFP::get(DestTy, C->getZExtValue());
       BinaryOperator *NewIncr = 
-        BinaryOperator::Create(Incr->getOpcode(),
+        BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ?
+                                 Instruction::FAdd : Instruction::FSub,
                                NewPH, CFP, "IV.S.next.", Incr);
 
       NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry));
diff --git a/lib/Transforms/Scalar/SimplifyLibCalls.cpp b/lib/Transforms/Scalar/SimplifyLibCalls.cpp
index 4b00640..59989c9 100644
--- a/lib/Transforms/Scalar/SimplifyLibCalls.cpp
+++ b/lib/Transforms/Scalar/SimplifyLibCalls.cpp
@@ -1009,7 +1009,7 @@
     if (Op2C->isExactlyValue(1.0))  // pow(x, 1.0) -> x
       return Op1;
     if (Op2C->isExactlyValue(2.0))  // pow(x, 2.0) -> x*x
-      return B.CreateMul(Op1, Op1, "pow2");
+      return B.CreateFMul(Op1, Op1, "pow2");
     if (Op2C->isExactlyValue(-1.0)) // pow(x, -1.0) -> 1.0/x
       return B.CreateFDiv(ConstantFP::get(CI->getType(), 1.0), Op1, "powrecip");
     return 0;
diff --git a/lib/Transforms/Utils/SimplifyCFG.cpp b/lib/Transforms/Utils/SimplifyCFG.cpp
index 2cde765..bcc6b81 100644
--- a/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -419,9 +419,6 @@
       case Instruction::LShr:
       case Instruction::AShr:
       case Instruction::ICmp:
-      case Instruction::FCmp:
-        if (I->getOperand(0)->getType()->isFPOrFPVector())
-          return false;  // FP arithmetic might trap.
         break;   // These are all cheap and non-trapping instructions.
       }
 
@@ -1012,9 +1009,8 @@
   default: return false;  // Not safe / profitable to hoist.
   case Instruction::Add:
   case Instruction::Sub:
-    // FP arithmetic might trap. Not worth doing for vector ops.
-    if (HInst->getType()->isFloatingPoint() 
-        || isa<VectorType>(HInst->getType()))
+    // Not worth doing for vector ops.
+    if (isa<VectorType>(HInst->getType()))
       return false;
     break;
   case Instruction::And:
diff --git a/lib/VMCore/ConstantFold.cpp b/lib/VMCore/ConstantFold.cpp
index 7e4902f..1d293cc 100644
--- a/lib/VMCore/ConstantFold.cpp
+++ b/lib/VMCore/ConstantFold.cpp
@@ -602,10 +602,8 @@
       return Constant::getNullValue(C1->getType());
     case Instruction::UDiv:
     case Instruction::SDiv:
-    case Instruction::FDiv:
     case Instruction::URem:
     case Instruction::SRem:
-    case Instruction::FRem:
       if (!isa<UndefValue>(C2))                    // undef / X -> 0
         return Constant::getNullValue(C1->getType());
       return const_cast<Constant*>(C2);            // X / undef -> undef
@@ -783,13 +781,13 @@
       switch (Opcode) {
       default:                   
         break;
-      case Instruction::Add:
+      case Instruction::FAdd:
         (void)C3V.add(C2V, APFloat::rmNearestTiesToEven);
         return ConstantFP::get(C3V);
-      case Instruction::Sub:     
+      case Instruction::FSub:
         (void)C3V.subtract(C2V, APFloat::rmNearestTiesToEven);
         return ConstantFP::get(C3V);
-      case Instruction::Mul:
+      case Instruction::FMul:
         (void)C3V.multiply(C2V, APFloat::rmNearestTiesToEven);
         return ConstantFP::get(C3V);
       case Instruction::FDiv:
@@ -808,12 +806,18 @@
       switch (Opcode) {
       default:
         break;
-      case Instruction::Add: 
+      case Instruction::Add:
         return EvalVectorOp(CP1, CP2, VTy, ConstantExpr::getAdd);
-      case Instruction::Sub: 
+      case Instruction::FAdd:
+        return EvalVectorOp(CP1, CP2, VTy, ConstantExpr::getFAdd);
+      case Instruction::Sub:
         return EvalVectorOp(CP1, CP2, VTy, ConstantExpr::getSub);
-      case Instruction::Mul: 
+      case Instruction::FSub:
+        return EvalVectorOp(CP1, CP2, VTy, ConstantExpr::getFSub);
+      case Instruction::Mul:
         return EvalVectorOp(CP1, CP2, VTy, ConstantExpr::getMul);
+      case Instruction::FMul:
+        return EvalVectorOp(CP1, CP2, VTy, ConstantExpr::getFMul);
       case Instruction::UDiv:
         return EvalVectorOp(CP1, CP2, VTy, ConstantExpr::getUDiv);
       case Instruction::SDiv:
@@ -851,7 +855,9 @@
     // other way if possible.
     switch (Opcode) {
     case Instruction::Add:
+    case Instruction::FAdd:
     case Instruction::Mul:
+    case Instruction::FMul:
     case Instruction::And:
     case Instruction::Or:
     case Instruction::Xor:
@@ -862,6 +868,7 @@
     case Instruction::LShr:
     case Instruction::AShr:
     case Instruction::Sub:
+    case Instruction::FSub:
     case Instruction::SDiv:
     case Instruction::UDiv:
     case Instruction::FDiv:
diff --git a/lib/VMCore/Constants.cpp b/lib/VMCore/Constants.cpp
index 97f3ac9..69c503d 100644
--- a/lib/VMCore/Constants.cpp
+++ b/lib/VMCore/Constants.cpp
@@ -775,26 +775,46 @@
 /// specify the full Instruction::OPCODE identifier.
 ///
 Constant *ConstantExpr::getNeg(Constant *C) {
+  // API compatibility: Adjust integer opcodes to floating-point opcodes.
+  if (C->getType()->isFPOrFPVector())
+    return getFNeg(C);
+  assert(C->getType()->isIntOrIntVector() &&
+         "Cannot NEG a nonintegral value!");
   return get(Instruction::Sub,
              ConstantExpr::getZeroValueForNegationExpr(C->getType()),
              C);
 }
+Constant *ConstantExpr::getFNeg(Constant *C) {
+  assert(C->getType()->isFPOrFPVector() &&
+         "Cannot FNEG a non-floating-point value!");
+  return get(Instruction::FSub,
+             ConstantExpr::getZeroValueForNegationExpr(C->getType()),
+             C);
+}
 Constant *ConstantExpr::getNot(Constant *C) {
-  assert((isa<IntegerType>(C->getType()) ||
-            cast<VectorType>(C->getType())->getElementType()->isInteger()) &&
-          "Cannot NOT a nonintegral value!");
+  assert(C->getType()->isIntOrIntVector() &&
+         "Cannot NOT a nonintegral value!");
   return get(Instruction::Xor, C,
              Constant::getAllOnesValue(C->getType()));
 }
 Constant *ConstantExpr::getAdd(Constant *C1, Constant *C2) {
   return get(Instruction::Add, C1, C2);
 }
+Constant *ConstantExpr::getFAdd(Constant *C1, Constant *C2) {
+  return get(Instruction::FAdd, C1, C2);
+}
 Constant *ConstantExpr::getSub(Constant *C1, Constant *C2) {
   return get(Instruction::Sub, C1, C2);
 }
+Constant *ConstantExpr::getFSub(Constant *C1, Constant *C2) {
+  return get(Instruction::FSub, C1, C2);
+}
 Constant *ConstantExpr::getMul(Constant *C1, Constant *C2) {
   return get(Instruction::Mul, C1, C2);
 }
+Constant *ConstantExpr::getFMul(Constant *C1, Constant *C2) {
+  return get(Instruction::FMul, C1, C2);
+}
 Constant *ConstantExpr::getUDiv(Constant *C1, Constant *C2) {
   return get(Instruction::UDiv, C1, C2);
 }
@@ -2142,15 +2162,28 @@
 }
 
 Constant *ConstantExpr::get(unsigned Opcode, Constant *C1, Constant *C2) {
+  // API compatibility: Adjust integer opcodes to floating-point opcodes.
+  if (C1->getType()->isFPOrFPVector()) {
+    if (Opcode == Instruction::Add) Opcode = Instruction::FAdd;
+    else if (Opcode == Instruction::Sub) Opcode = Instruction::FSub;
+    else if (Opcode == Instruction::Mul) Opcode = Instruction::FMul;
+  }
 #ifndef NDEBUG
   switch (Opcode) {
-  case Instruction::Add: 
+  case Instruction::Add:
   case Instruction::Sub:
-  case Instruction::Mul: 
+  case Instruction::Mul:
     assert(C1->getType() == C2->getType() && "Op types should be identical!");
-    assert((C1->getType()->isInteger() || C1->getType()->isFloatingPoint() ||
-            isa<VectorType>(C1->getType())) &&
-           "Tried to create an arithmetic operation on a non-arithmetic type!");
+    assert(C1->getType()->isIntOrIntVector() &&
+           "Tried to create an integer operation on a non-integer type!");
+    break;
+  case Instruction::FAdd:
+  case Instruction::FSub:
+  case Instruction::FMul:
+    assert(C1->getType() == C2->getType() && "Op types should be identical!");
+    assert(C1->getType()->isFPOrFPVector() &&
+           "Tried to create a floating-point operation on a "
+           "non-floating-point type!");
     break;
   case Instruction::UDiv: 
   case Instruction::SDiv: 
diff --git a/lib/VMCore/Instruction.cpp b/lib/VMCore/Instruction.cpp
index 9e030b7..7556b8e 100644
--- a/lib/VMCore/Instruction.cpp
+++ b/lib/VMCore/Instruction.cpp
@@ -101,8 +101,11 @@
 
   // Standard binary operators...
   case Add: return "add";
+  case FAdd: return "fadd";
   case Sub: return "sub";
+  case FSub: return "fsub";
   case Mul: return "mul";
+  case FMul: return "fmul";
   case UDiv: return "udiv";
   case SDiv: return "sdiv";
   case FDiv: return "fdiv";
@@ -330,19 +333,13 @@
 
 /// isAssociative - Return true if the instruction is associative:
 ///
-///   Associative operators satisfy:  x op (y op z) === (x op y) op z)
+///   Associative operators satisfy:  x op (y op z) === (x op y) op z
 ///
-/// In LLVM, the Add, Mul, And, Or, and Xor operators are associative, when not
-/// applied to floating point types.
+/// In LLVM, the Add, Mul, And, Or, and Xor operators are associative.
 ///
 bool Instruction::isAssociative(unsigned Opcode, const Type *Ty) {
-  if (Opcode == And || Opcode == Or || Opcode == Xor)
-    return true;
-
-  // Add/Mul reassociate unless they are FP or FP vectors.
-  if (Opcode == Add || Opcode == Mul)
-    return !Ty->isFPOrFPVector();
-  return 0;
+  return Opcode == And || Opcode == Or || Opcode == Xor ||
+         Opcode == Add || Opcode == Mul;
 }
 
 /// isCommutative - Return true if the instruction is commutative:
@@ -355,7 +352,9 @@
 bool Instruction::isCommutative(unsigned op) {
   switch (op) {
   case Add:
+  case FAdd:
   case Mul:
+  case FMul:
   case And:
   case Or:
   case Xor:
diff --git a/lib/VMCore/Instructions.cpp b/lib/VMCore/Instructions.cpp
index fe30271..4c228fe8 100644
--- a/lib/VMCore/Instructions.cpp
+++ b/lib/VMCore/Instructions.cpp
@@ -1502,29 +1502,43 @@
 //                             BinaryOperator Class
 //===----------------------------------------------------------------------===//
 
+/// AdjustIType - Map Add, Sub, and Mul to FAdd, FSub, and FMul when the
+/// type is floating-point, to help provide compatibility with an older API.
+///
+static BinaryOperator::BinaryOps AdjustIType(BinaryOperator::BinaryOps iType,
+                                             const Type *Ty) {
+  // API compatibility: Adjust integer opcodes to floating-point opcodes.
+  if (Ty->isFPOrFPVector()) {
+    if (iType == BinaryOperator::Add) iType = BinaryOperator::FAdd;
+    else if (iType == BinaryOperator::Sub) iType = BinaryOperator::FSub;
+    else if (iType == BinaryOperator::Mul) iType = BinaryOperator::FMul;
+  }
+  return iType;
+}
+
 BinaryOperator::BinaryOperator(BinaryOps iType, Value *S1, Value *S2,
                                const Type *Ty, const std::string &Name,
                                Instruction *InsertBefore)
-  : Instruction(Ty, iType,
+  : Instruction(Ty, AdjustIType(iType, Ty),
                 OperandTraits<BinaryOperator>::op_begin(this),
                 OperandTraits<BinaryOperator>::operands(this),
                 InsertBefore) {
   Op<0>() = S1;
   Op<1>() = S2;
-  init(iType);
+  init(AdjustIType(iType, Ty));
   setName(Name);
 }
 
 BinaryOperator::BinaryOperator(BinaryOps iType, Value *S1, Value *S2, 
                                const Type *Ty, const std::string &Name,
                                BasicBlock *InsertAtEnd)
-  : Instruction(Ty, iType,
+  : Instruction(Ty, AdjustIType(iType, Ty),
                 OperandTraits<BinaryOperator>::op_begin(this),
                 OperandTraits<BinaryOperator>::operands(this),
                 InsertAtEnd) {
   Op<0>() = S1;
   Op<1>() = S2;
-  init(iType);
+  init(AdjustIType(iType, Ty));
   setName(Name);
 }
 
@@ -1537,12 +1551,19 @@
 #ifndef NDEBUG
   switch (iType) {
   case Add: case Sub:
-  case Mul: 
+  case Mul:
     assert(getType() == LHS->getType() &&
            "Arithmetic operation should return same type as operands!");
-    assert((getType()->isInteger() || getType()->isFloatingPoint() ||
-            isa<VectorType>(getType())) &&
-          "Tried to create an arithmetic operation on a non-arithmetic type!");
+    assert(getType()->isIntOrIntVector() &&
+           "Tried to create an integer operation on a non-integer type!");
+    break;
+  case FAdd: case FSub:
+  case FMul:
+    assert(getType() == LHS->getType() &&
+           "Arithmetic operation should return same type as operands!");
+    assert(getType()->isFPOrFPVector() &&
+           "Tried to create a floating-point operation on a "
+           "non-floating-point type!");
     break;
   case UDiv: 
   case SDiv: 
@@ -1631,6 +1652,22 @@
                             Op->getType(), Name, InsertAtEnd);
 }
 
+BinaryOperator *BinaryOperator::CreateFNeg(Value *Op, const std::string &Name,
+                                           Instruction *InsertBefore) {
+  Value *zero = ConstantExpr::getZeroValueForNegationExpr(Op->getType());
+  return new BinaryOperator(Instruction::FSub,
+                            zero, Op,
+                            Op->getType(), Name, InsertBefore);
+}
+
+BinaryOperator *BinaryOperator::CreateFNeg(Value *Op, const std::string &Name,
+                                           BasicBlock *InsertAtEnd) {
+  Value *zero = ConstantExpr::getZeroValueForNegationExpr(Op->getType());
+  return new BinaryOperator(Instruction::FSub,
+                            zero, Op,
+                            Op->getType(), Name, InsertAtEnd);
+}
+
 BinaryOperator *BinaryOperator::CreateNot(Value *Op, const std::string &Name,
                                           Instruction *InsertBefore) {
   Constant *C;
@@ -1679,6 +1716,14 @@
   return false;
 }
 
+bool BinaryOperator::isFNeg(const Value *V) {
+  if (const BinaryOperator *Bop = dyn_cast<BinaryOperator>(V))
+    if (Bop->getOpcode() == Instruction::FSub)
+      return Bop->getOperand(0) ==
+             ConstantExpr::getZeroValueForNegationExpr(Bop->getType());
+  return false;
+}
+
 bool BinaryOperator::isNot(const Value *V) {
   if (const BinaryOperator *Bop = dyn_cast<BinaryOperator>(V))
     return (Bop->getOpcode() == Instruction::Xor &&
@@ -1696,6 +1741,15 @@
   return getNegArgument(const_cast<Value*>(BinOp));
 }
 
+Value *BinaryOperator::getFNegArgument(Value *BinOp) {
+  assert(isFNeg(BinOp) && "getFNegArgument from non-'fneg' instruction!");
+  return cast<BinaryOperator>(BinOp)->getOperand(1);
+}
+
+const Value *BinaryOperator::getFNegArgument(const Value *BinOp) {
+  return getFNegArgument(const_cast<Value*>(BinOp));
+}
+
 Value *BinaryOperator::getNotArgument(Value *BinOp) {
   assert(isNot(BinOp) && "getNotArgument on non-'not' instruction!");
   BinaryOperator *BO = cast<BinaryOperator>(BinOp);
diff --git a/test/Analysis/ScalarEvolution/sext-iv-0.ll b/test/Analysis/ScalarEvolution/sext-iv-0.ll
index 4b2fcea..17f2dff 100644
--- a/test/Analysis/ScalarEvolution/sext-iv-0.ll
+++ b/test/Analysis/ScalarEvolution/sext-iv-0.ll
@@ -18,7 +18,7 @@
 	%2 = sext i9 %1 to i64		; <i64> [#uses=1]
 	%3 = getelementptr double* %x, i64 %2		; <double*> [#uses=1]
 	%4 = load double* %3, align 8		; <double> [#uses=1]
-	%5 = mul double %4, 3.900000e+00		; <double> [#uses=1]
+	%5 = fmul double %4, 3.900000e+00		; <double> [#uses=1]
 	%6 = sext i8 %0 to i64		; <i64> [#uses=1]
 	%7 = getelementptr double* %x, i64 %6		; <double*> [#uses=1]
 	store double %5, double* %7, align 8
diff --git a/test/Analysis/ScalarEvolution/sext-iv-1.ll b/test/Analysis/ScalarEvolution/sext-iv-1.ll
index a9175c3..ca6ad0a 100644
--- a/test/Analysis/ScalarEvolution/sext-iv-1.ll
+++ b/test/Analysis/ScalarEvolution/sext-iv-1.ll
@@ -18,7 +18,7 @@
 	%2 = sext i9 %1 to i64		; <i64> [#uses=1]
 	%3 = getelementptr double* %x, i64 %2		; <double*> [#uses=1]
 	%4 = load double* %3, align 8		; <double> [#uses=1]
-	%5 = mul double %4, 3.900000e+00		; <double> [#uses=1]
+	%5 = fmul double %4, 3.900000e+00		; <double> [#uses=1]
 	%6 = sext i7 %0 to i64		; <i64> [#uses=1]
 	%7 = getelementptr double* %x, i64 %6		; <double*> [#uses=1]
 	store double %5, double* %7, align 8
@@ -41,7 +41,7 @@
 	%2 = sext i9 %1 to i64		; <i64> [#uses=1]
 	%3 = getelementptr double* %x, i64 %2		; <double*> [#uses=1]
 	%4 = load double* %3, align 8		; <double> [#uses=1]
-	%5 = mul double %4, 3.900000e+00		; <double> [#uses=1]
+	%5 = fmul double %4, 3.900000e+00		; <double> [#uses=1]
 	%6 = sext i8 %0 to i64		; <i64> [#uses=1]
 	%7 = getelementptr double* %x, i64 %6		; <double*> [#uses=1]
 	store double %5, double* %7, align 8
@@ -64,7 +64,7 @@
 	%2 = sext i9 %1 to i64		; <i64> [#uses=1]
 	%3 = getelementptr double* %x, i64 %2		; <double*> [#uses=1]
 	%4 = load double* %3, align 8		; <double> [#uses=1]
-	%5 = mul double %4, 3.900000e+00		; <double> [#uses=1]
+	%5 = fmul double %4, 3.900000e+00		; <double> [#uses=1]
 	%6 = sext i8 %0 to i64		; <i64> [#uses=1]
 	%7 = getelementptr double* %x, i64 %6		; <double*> [#uses=1]
 	store double %5, double* %7, align 8
@@ -87,7 +87,7 @@
 	%2 = sext i9 %1 to i64		; <i64> [#uses=1]
 	%3 = getelementptr double* %x, i64 %2		; <double*> [#uses=1]
 	%4 = load double* %3, align 8		; <double> [#uses=1]
-	%5 = mul double %4, 3.900000e+00		; <double> [#uses=1]
+	%5 = fmul double %4, 3.900000e+00		; <double> [#uses=1]
 	%6 = sext i8 %0 to i64		; <i64> [#uses=1]
 	%7 = getelementptr double* %x, i64 %6		; <double*> [#uses=1]
 	store double %5, double* %7, align 8
diff --git a/test/Analysis/ScalarEvolution/trip-count4.ll b/test/Analysis/ScalarEvolution/trip-count4.ll
index a61d5da..49c4e13 100644
--- a/test/Analysis/ScalarEvolution/trip-count4.ll
+++ b/test/Analysis/ScalarEvolution/trip-count4.ll
@@ -13,7 +13,7 @@
 	%indvar.i8 = ashr i64 %s0, 8		; <i64> [#uses=1]
 	%t0 = getelementptr double* %d, i64 %indvar.i8		; <double*> [#uses=2]
 	%t1 = load double* %t0		; <double> [#uses=1]
-	%t2 = mul double %t1, 1.000000e-01		; <double> [#uses=1]
+	%t2 = fmul double %t1, 1.000000e-01		; <double> [#uses=1]
 	store double %t2, double* %t0
 	%indvar.next = sub i64 %indvar, 1		; <i64> [#uses=2]
 	%exitcond = icmp eq i64 %indvar.next, 10		; <i1> [#uses=1]
diff --git a/test/Assembler/2002-04-07-HexFloatConstants.ll b/test/Assembler/2002-04-07-HexFloatConstants.ll
index b9860b3..5c54b39 100644
--- a/test/Assembler/2002-04-07-HexFloatConstants.ll
+++ b/test/Assembler/2002-04-07-HexFloatConstants.ll
@@ -11,6 +11,6 @@
 ; RUN: diff %t.1 %t.2
 
 define double @test() {
-        %tmp = mul double 7.200000e+101, 0x427F4000             ; <double> [#uses=1]
+        %tmp = fmul double 7.200000e+101, 0x427F4000             ; <double> [#uses=1]
         ret double %tmp
 }
diff --git a/test/Assembler/2002-04-07-InfConstant.ll b/test/Assembler/2002-04-07-InfConstant.ll
index 317b8f3..71837c9 100644
--- a/test/Assembler/2002-04-07-InfConstant.ll
+++ b/test/Assembler/2002-04-07-InfConstant.ll
@@ -3,7 +3,7 @@
 ; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep 0x7FF0000000000000
 
 define float @test() {
-        %tmp = mul float 0x7FF0000000000000, 1.000000e+01               ; <float> [#uses=1]
+        %tmp = fmul float 0x7FF0000000000000, 1.000000e+01               ; <float> [#uses=1]
         ret float %tmp
 }
 
diff --git a/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
index 3661c4c..6e11b16 100644
--- a/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
+++ b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
@@ -35,8 +35,8 @@
 	%tmp612 = load i32* null		; <i32> [#uses=1]
 	%tmp629 = load i32* null		; <i32> [#uses=1]
 	%tmp629a = sitofp i32 %tmp629 to double		; <double> [#uses=1]
-	%tmp631 = mul double %tmp629a, 0.000000e+00		; <double> [#uses=1]
-	%tmp632 = add double 0.000000e+00, %tmp631		; <double> [#uses=1]
+	%tmp631 = fmul double %tmp629a, 0.000000e+00		; <double> [#uses=1]
+	%tmp632 = fadd double 0.000000e+00, %tmp631		; <double> [#uses=1]
 	%tmp642 = call fastcc i32 @sign( i32 %tmp576, i32 %tmp561 )		; <i32> [#uses=1]
 	%tmp650 = mul i32 %tmp606, %tmp642		; <i32> [#uses=1]
 	%tmp656 = mul i32 %tmp650, %tmp612		; <i32> [#uses=1]
@@ -46,8 +46,8 @@
 	%tmp666 = sub i32 %tmp660, %tmp496		; <i32> [#uses=1]
 	%tmp667 = sitofp i32 %tmp666 to double		; <double> [#uses=2]
 	call void @levrun_linfo_inter( i32 %tmp576, i32 0, i32* null, i32* null )
-	%tmp671 = mul double %tmp667, %tmp667		; <double> [#uses=1]
-	%tmp675 = add double %tmp671, 0.000000e+00		; <double> [#uses=1]
+	%tmp671 = fmul double %tmp667, %tmp667		; <double> [#uses=1]
+	%tmp675 = fadd double %tmp671, 0.000000e+00		; <double> [#uses=1]
 	%tmp678 = fcmp oeq double %tmp632, %tmp675		; <i1> [#uses=1]
 	br i1 %tmp678, label %cond_true679, label %cond_false693
 
diff --git a/test/CodeGen/ARM/2009-02-27-SpillerBug.ll b/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
index 56e949f..bd5b719 100644
--- a/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
+++ b/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
@@ -11,7 +11,7 @@
 	br label %bb52
 
 bb32:		; preds = %bb52
-	%0 = add double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%0 = fadd double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
 	%1 = add i32 %j.1, 1		; <i32> [#uses=1]
 	br label %bb52
 
@@ -29,14 +29,14 @@
 
 bb55:		; preds = %bb53
 	%4 = load double* @a, align 4		; <double> [#uses=10]
-	%5 = add double %4, 0.000000e+00		; <double> [#uses=16]
+	%5 = fadd double %4, 0.000000e+00		; <double> [#uses=16]
 	%6 = fcmp ogt double %k.4, 0.000000e+00		; <i1> [#uses=1]
-	%.pn404 = mul double %4, %4		; <double> [#uses=4]
-	%.pn402 = mul double %5, %5		; <double> [#uses=5]
+	%.pn404 = fmul double %4, %4		; <double> [#uses=4]
+	%.pn402 = fmul double %5, %5		; <double> [#uses=5]
 	%.pn165.in = load double* @N		; <double> [#uses=5]
-	%.pn198 = mul double 0.000000e+00, %5		; <double> [#uses=1]
-	%.pn185 = sub double -0.000000e+00, 0.000000e+00		; <double> [#uses=1]
-	%.pn147 = sub double -0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%.pn198 = fmul double 0.000000e+00, %5		; <double> [#uses=1]
+	%.pn185 = fsub double -0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%.pn147 = fsub double -0.000000e+00, 0.000000e+00		; <double> [#uses=1]
 	%.pn141 = fdiv double 0.000000e+00, %4		; <double> [#uses=1]
 	%.pn142 = fdiv double 0.000000e+00, %5		; <double> [#uses=1]
 	%.pn136 = fdiv double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
@@ -47,178 +47,178 @@
 	%.pn117 = fdiv double 0.000000e+00, %4		; <double> [#uses=1]
 	%.pn118 = fdiv double %.pn185, %5		; <double> [#uses=1]
 	%.pn88 = fdiv double %.pn147, %5		; <double> [#uses=1]
-	%.pn81 = sub double %.pn141, %.pn142		; <double> [#uses=1]
-	%.pn77 = sub double 0.000000e+00, %.pn136		; <double> [#uses=1]
-	%.pn75 = sub double 0.000000e+00, %.pn132		; <double> [#uses=1]
-	%.pn69 = sub double %.pn123, %.pn124		; <double> [#uses=1]
-	%.pn67 = sub double 0.000000e+00, %.pn120		; <double> [#uses=1]
-	%.pn56 = sub double %.pn117, %.pn118		; <double> [#uses=1]
-	%.pn42 = sub double 0.000000e+00, %.pn88		; <double> [#uses=1]
-	%.pn60 = mul double %.pn81, 0.000000e+00		; <double> [#uses=1]
-	%.pn57 = add double %.pn77, 0.000000e+00		; <double> [#uses=1]
-	%.pn58 = mul double %.pn75, %.pn165.in		; <double> [#uses=1]
-	%.pn32 = add double %.pn69, 0.000000e+00		; <double> [#uses=1]
-	%.pn33 = mul double %.pn67, %.pn165.in		; <double> [#uses=1]
-	%.pn17 = sub double 0.000000e+00, %.pn60		; <double> [#uses=1]
-	%.pn9 = add double %.pn57, %.pn58		; <double> [#uses=1]
-	%.pn30 = mul double 0.000000e+00, %.pn56		; <double> [#uses=1]
-	%.pn24 = mul double 0.000000e+00, %.pn42		; <double> [#uses=1]
-	%.pn1 = add double %.pn32, %.pn33		; <double> [#uses=1]
-	%.pn28 = sub double %.pn30, 0.000000e+00		; <double> [#uses=1]
-	%.pn26 = add double %.pn28, 0.000000e+00		; <double> [#uses=1]
-	%.pn22 = sub double %.pn26, 0.000000e+00		; <double> [#uses=1]
-	%.pn20 = sub double %.pn24, 0.000000e+00		; <double> [#uses=1]
-	%.pn18 = add double %.pn22, 0.000000e+00		; <double> [#uses=1]
-	%.pn16 = add double %.pn20, 0.000000e+00		; <double> [#uses=1]
-	%.pn14 = sub double %.pn18, 0.000000e+00		; <double> [#uses=1]
-	%.pn12 = sub double %.pn16, %.pn17		; <double> [#uses=1]
-	%.pn10 = add double %.pn14, 0.000000e+00		; <double> [#uses=1]
-	%.pn8 = add double %.pn12, 0.000000e+00		; <double> [#uses=1]
-	%.pn6 = sub double %.pn10, 0.000000e+00		; <double> [#uses=1]
-	%.pn4 = sub double %.pn8, %.pn9		; <double> [#uses=1]
-	%.pn2 = add double %.pn6, 0.000000e+00		; <double> [#uses=1]
-	%.pn = add double %.pn4, 0.000000e+00		; <double> [#uses=1]
-	%N1.0 = sub double %.pn2, 0.000000e+00		; <double> [#uses=2]
-	%D1.0 = sub double %.pn, %.pn1		; <double> [#uses=2]
+	%.pn81 = fsub double %.pn141, %.pn142		; <double> [#uses=1]
+	%.pn77 = fsub double 0.000000e+00, %.pn136		; <double> [#uses=1]
+	%.pn75 = fsub double 0.000000e+00, %.pn132		; <double> [#uses=1]
+	%.pn69 = fsub double %.pn123, %.pn124		; <double> [#uses=1]
+	%.pn67 = fsub double 0.000000e+00, %.pn120		; <double> [#uses=1]
+	%.pn56 = fsub double %.pn117, %.pn118		; <double> [#uses=1]
+	%.pn42 = fsub double 0.000000e+00, %.pn88		; <double> [#uses=1]
+	%.pn60 = fmul double %.pn81, 0.000000e+00		; <double> [#uses=1]
+	%.pn57 = fadd double %.pn77, 0.000000e+00		; <double> [#uses=1]
+	%.pn58 = fmul double %.pn75, %.pn165.in		; <double> [#uses=1]
+	%.pn32 = fadd double %.pn69, 0.000000e+00		; <double> [#uses=1]
+	%.pn33 = fmul double %.pn67, %.pn165.in		; <double> [#uses=1]
+	%.pn17 = fsub double 0.000000e+00, %.pn60		; <double> [#uses=1]
+	%.pn9 = fadd double %.pn57, %.pn58		; <double> [#uses=1]
+	%.pn30 = fmul double 0.000000e+00, %.pn56		; <double> [#uses=1]
+	%.pn24 = fmul double 0.000000e+00, %.pn42		; <double> [#uses=1]
+	%.pn1 = fadd double %.pn32, %.pn33		; <double> [#uses=1]
+	%.pn28 = fsub double %.pn30, 0.000000e+00		; <double> [#uses=1]
+	%.pn26 = fadd double %.pn28, 0.000000e+00		; <double> [#uses=1]
+	%.pn22 = fsub double %.pn26, 0.000000e+00		; <double> [#uses=1]
+	%.pn20 = fsub double %.pn24, 0.000000e+00		; <double> [#uses=1]
+	%.pn18 = fadd double %.pn22, 0.000000e+00		; <double> [#uses=1]
+	%.pn16 = fadd double %.pn20, 0.000000e+00		; <double> [#uses=1]
+	%.pn14 = fsub double %.pn18, 0.000000e+00		; <double> [#uses=1]
+	%.pn12 = fsub double %.pn16, %.pn17		; <double> [#uses=1]
+	%.pn10 = fadd double %.pn14, 0.000000e+00		; <double> [#uses=1]
+	%.pn8 = fadd double %.pn12, 0.000000e+00		; <double> [#uses=1]
+	%.pn6 = fsub double %.pn10, 0.000000e+00		; <double> [#uses=1]
+	%.pn4 = fsub double %.pn8, %.pn9		; <double> [#uses=1]
+	%.pn2 = fadd double %.pn6, 0.000000e+00		; <double> [#uses=1]
+	%.pn = fadd double %.pn4, 0.000000e+00		; <double> [#uses=1]
+	%N1.0 = fsub double %.pn2, 0.000000e+00		; <double> [#uses=2]
+	%D1.0 = fsub double %.pn, %.pn1		; <double> [#uses=2]
 	br i1 %6, label %bb62, label %bb64
 
 bb62:		; preds = %bb55
-	%7 = mul double 0.000000e+00, %4		; <double> [#uses=1]
-	%8 = sub double -0.000000e+00, %7		; <double> [#uses=3]
-	%9 = mul double 0.000000e+00, %5		; <double> [#uses=1]
-	%10 = sub double -0.000000e+00, %9		; <double> [#uses=3]
-	%11 = mul double %.pn404, %4		; <double> [#uses=5]
-	%12 = mul double %.pn402, %5		; <double> [#uses=5]
-	%13 = mul double 0.000000e+00, -2.000000e+00		; <double> [#uses=1]
+	%7 = fmul double 0.000000e+00, %4		; <double> [#uses=1]
+	%8 = fsub double -0.000000e+00, %7		; <double> [#uses=3]
+	%9 = fmul double 0.000000e+00, %5		; <double> [#uses=1]
+	%10 = fsub double -0.000000e+00, %9		; <double> [#uses=3]
+	%11 = fmul double %.pn404, %4		; <double> [#uses=5]
+	%12 = fmul double %.pn402, %5		; <double> [#uses=5]
+	%13 = fmul double 0.000000e+00, -2.000000e+00		; <double> [#uses=1]
 	%14 = fdiv double 0.000000e+00, %.pn402		; <double> [#uses=1]
-	%15 = sub double 0.000000e+00, %14		; <double> [#uses=1]
-	%16 = mul double 0.000000e+00, %15		; <double> [#uses=1]
-	%17 = add double %13, %16		; <double> [#uses=1]
-	%18 = mul double %.pn165.in, -2.000000e+00		; <double> [#uses=5]
-	%19 = mul double %18, 0.000000e+00		; <double> [#uses=1]
-	%20 = add double %17, %19		; <double> [#uses=1]
-	%21 = mul double 0.000000e+00, %20		; <double> [#uses=1]
-	%22 = add double 0.000000e+00, %21		; <double> [#uses=1]
+	%15 = fsub double 0.000000e+00, %14		; <double> [#uses=1]
+	%16 = fmul double 0.000000e+00, %15		; <double> [#uses=1]
+	%17 = fadd double %13, %16		; <double> [#uses=1]
+	%18 = fmul double %.pn165.in, -2.000000e+00		; <double> [#uses=5]
+	%19 = fmul double %18, 0.000000e+00		; <double> [#uses=1]
+	%20 = fadd double %17, %19		; <double> [#uses=1]
+	%21 = fmul double 0.000000e+00, %20		; <double> [#uses=1]
+	%22 = fadd double 0.000000e+00, %21		; <double> [#uses=1]
 	%23 = fdiv double 0.000000e+00, %12		; <double> [#uses=1]
-	%24 = sub double 0.000000e+00, %23		; <double> [#uses=0]
-	%25 = mul double %18, 0.000000e+00		; <double> [#uses=1]
-	%26 = add double 0.000000e+00, %25		; <double> [#uses=1]
-	%27 = mul double 0.000000e+00, %26		; <double> [#uses=1]
-	%28 = sub double %22, %27		; <double> [#uses=1]
-	%29 = mul double %11, %4		; <double> [#uses=1]
-	%30 = mul double %12, %5		; <double> [#uses=3]
-	%31 = mul double %.pn165.in, -4.000000e+00		; <double> [#uses=1]
-	%32 = mul double %.pn165.in, 0x3FF5555555555555		; <double> [#uses=1]
-	%33 = mul double %32, 0.000000e+00		; <double> [#uses=2]
-	%34 = add double %28, 0.000000e+00		; <double> [#uses=1]
-	%35 = sub double -0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%24 = fsub double 0.000000e+00, %23		; <double> [#uses=0]
+	%25 = fmul double %18, 0.000000e+00		; <double> [#uses=1]
+	%26 = fadd double 0.000000e+00, %25		; <double> [#uses=1]
+	%27 = fmul double 0.000000e+00, %26		; <double> [#uses=1]
+	%28 = fsub double %22, %27		; <double> [#uses=1]
+	%29 = fmul double %11, %4		; <double> [#uses=1]
+	%30 = fmul double %12, %5		; <double> [#uses=3]
+	%31 = fmul double %.pn165.in, -4.000000e+00		; <double> [#uses=1]
+	%32 = fmul double %.pn165.in, 0x3FF5555555555555		; <double> [#uses=1]
+	%33 = fmul double %32, 0.000000e+00		; <double> [#uses=2]
+	%34 = fadd double %28, 0.000000e+00		; <double> [#uses=1]
+	%35 = fsub double -0.000000e+00, 0.000000e+00		; <double> [#uses=1]
 	%36 = fdiv double %35, %11		; <double> [#uses=1]
 	%37 = fdiv double 0.000000e+00, %12		; <double> [#uses=1]
-	%38 = sub double %36, %37		; <double> [#uses=1]
-	%39 = mul double 0.000000e+00, %38		; <double> [#uses=1]
-	%40 = add double 0.000000e+00, %39		; <double> [#uses=1]
-	%41 = add double %40, 0.000000e+00		; <double> [#uses=1]
-	%42 = add double %41, 0.000000e+00		; <double> [#uses=1]
-	%43 = mul double %42, 0.000000e+00		; <double> [#uses=1]
-	%44 = sub double %34, %43		; <double> [#uses=1]
+	%38 = fsub double %36, %37		; <double> [#uses=1]
+	%39 = fmul double 0.000000e+00, %38		; <double> [#uses=1]
+	%40 = fadd double 0.000000e+00, %39		; <double> [#uses=1]
+	%41 = fadd double %40, 0.000000e+00		; <double> [#uses=1]
+	%42 = fadd double %41, 0.000000e+00		; <double> [#uses=1]
+	%43 = fmul double %42, 0.000000e+00		; <double> [#uses=1]
+	%44 = fsub double %34, %43		; <double> [#uses=1]
 	%45 = tail call double @llvm.exp.f64(double %8) nounwind		; <double> [#uses=1]
-	%46 = sub double -0.000000e+00, %45		; <double> [#uses=2]
+	%46 = fsub double -0.000000e+00, %45		; <double> [#uses=2]
 	%47 = fdiv double %46, 0.000000e+00		; <double> [#uses=1]
-	%48 = mul double %30, %5		; <double> [#uses=1]
+	%48 = fmul double %30, %5		; <double> [#uses=1]
 	%49 = fdiv double 0.000000e+00, %48		; <double> [#uses=1]
-	%50 = sub double %47, %49		; <double> [#uses=1]
-	%51 = mul double %50, -4.000000e+00		; <double> [#uses=1]
-	%52 = add double %51, 0.000000e+00		; <double> [#uses=1]
+	%50 = fsub double %47, %49		; <double> [#uses=1]
+	%51 = fmul double %50, -4.000000e+00		; <double> [#uses=1]
+	%52 = fadd double %51, 0.000000e+00		; <double> [#uses=1]
 	%53 = fdiv double %46, %11		; <double> [#uses=1]
-	%54 = sub double %53, 0.000000e+00		; <double> [#uses=1]
-	%55 = mul double %31, %54		; <double> [#uses=1]
-	%56 = add double %52, %55		; <double> [#uses=1]
-	%57 = add double %56, 0.000000e+00		; <double> [#uses=1]
-	%58 = add double %44, %57		; <double> [#uses=1]
-	%59 = sub double %58, 0.000000e+00		; <double> [#uses=1]
+	%54 = fsub double %53, 0.000000e+00		; <double> [#uses=1]
+	%55 = fmul double %31, %54		; <double> [#uses=1]
+	%56 = fadd double %52, %55		; <double> [#uses=1]
+	%57 = fadd double %56, 0.000000e+00		; <double> [#uses=1]
+	%58 = fadd double %44, %57		; <double> [#uses=1]
+	%59 = fsub double %58, 0.000000e+00		; <double> [#uses=1]
 	%60 = tail call double @llvm.exp.f64(double 0.000000e+00) nounwind		; <double> [#uses=1]
-	%61 = sub double -0.000000e+00, %60		; <double> [#uses=1]
+	%61 = fsub double -0.000000e+00, %60		; <double> [#uses=1]
 	%62 = fdiv double 0.000000e+00, -6.000000e+00		; <double> [#uses=1]
 	%63 = fdiv double %61, %5		; <double> [#uses=1]
-	%64 = sub double 0.000000e+00, %63		; <double> [#uses=1]
-	%65 = mul double %62, %64		; <double> [#uses=1]
-	%66 = sub double 0.000000e+00, %65		; <double> [#uses=1]
-	%67 = sub double -0.000000e+00, 0.000000e+00		; <double> [#uses=2]
+	%64 = fsub double 0.000000e+00, %63		; <double> [#uses=1]
+	%65 = fmul double %62, %64		; <double> [#uses=1]
+	%66 = fsub double 0.000000e+00, %65		; <double> [#uses=1]
+	%67 = fsub double -0.000000e+00, 0.000000e+00		; <double> [#uses=2]
 	%68 = tail call double @llvm.exp.f64(double %10) nounwind		; <double> [#uses=1]
-	%69 = sub double -0.000000e+00, %68		; <double> [#uses=2]
+	%69 = fsub double -0.000000e+00, %68		; <double> [#uses=2]
 	%70 = fdiv double %67, %.pn404		; <double> [#uses=1]
 	%71 = fdiv double %69, %.pn402		; <double> [#uses=1]
-	%72 = sub double %70, %71		; <double> [#uses=1]
-	%73 = mul double %72, -5.000000e-01		; <double> [#uses=1]
+	%72 = fsub double %70, %71		; <double> [#uses=1]
+	%73 = fmul double %72, -5.000000e-01		; <double> [#uses=1]
 	%74 = fdiv double %67, %4		; <double> [#uses=1]
 	%75 = fdiv double %69, %5		; <double> [#uses=1]
-	%76 = sub double %74, %75		; <double> [#uses=1]
-	%77 = mul double %76, 0.000000e+00		; <double> [#uses=1]
-	%78 = add double %73, %77		; <double> [#uses=1]
-	%79 = mul double 0.000000e+00, %78		; <double> [#uses=1]
-	%80 = add double %66, %79		; <double> [#uses=1]
+	%76 = fsub double %74, %75		; <double> [#uses=1]
+	%77 = fmul double %76, 0.000000e+00		; <double> [#uses=1]
+	%78 = fadd double %73, %77		; <double> [#uses=1]
+	%79 = fmul double 0.000000e+00, %78		; <double> [#uses=1]
+	%80 = fadd double %66, %79		; <double> [#uses=1]
 	%81 = fdiv double 0.000000e+00, %.pn404		; <double> [#uses=1]
 	%82 = fdiv double 0.000000e+00, %.pn402		; <double> [#uses=1]
-	%83 = sub double %81, %82		; <double> [#uses=1]
-	%84 = mul double %83, -5.000000e-01		; <double> [#uses=1]
+	%83 = fsub double %81, %82		; <double> [#uses=1]
+	%84 = fmul double %83, -5.000000e-01		; <double> [#uses=1]
 	%85 = fdiv double 0.000000e+00, %4		; <double> [#uses=1]
 	%86 = fdiv double 0.000000e+00, %5		; <double> [#uses=1]
-	%87 = sub double %85, %86		; <double> [#uses=1]
-	%88 = mul double %87, 0.000000e+00		; <double> [#uses=1]
-	%89 = add double %84, %88		; <double> [#uses=1]
-	%90 = mul double 0.000000e+00, %89		; <double> [#uses=1]
-	%91 = sub double %80, %90		; <double> [#uses=1]
+	%87 = fsub double %85, %86		; <double> [#uses=1]
+	%88 = fmul double %87, 0.000000e+00		; <double> [#uses=1]
+	%89 = fadd double %84, %88		; <double> [#uses=1]
+	%90 = fmul double 0.000000e+00, %89		; <double> [#uses=1]
+	%91 = fsub double %80, %90		; <double> [#uses=1]
 	%92 = tail call double @llvm.exp.f64(double %8) nounwind		; <double> [#uses=1]
-	%93 = sub double -0.000000e+00, %92		; <double> [#uses=1]
+	%93 = fsub double -0.000000e+00, %92		; <double> [#uses=1]
 	%94 = tail call double @llvm.exp.f64(double %10) nounwind		; <double> [#uses=1]
-	%95 = sub double -0.000000e+00, %94		; <double> [#uses=3]
+	%95 = fsub double -0.000000e+00, %94		; <double> [#uses=3]
 	%96 = fdiv double %95, %.pn402		; <double> [#uses=1]
-	%97 = sub double 0.000000e+00, %96		; <double> [#uses=1]
-	%98 = mul double 0.000000e+00, %97		; <double> [#uses=1]
+	%97 = fsub double 0.000000e+00, %96		; <double> [#uses=1]
+	%98 = fmul double 0.000000e+00, %97		; <double> [#uses=1]
 	%99 = fdiv double %93, %11		; <double> [#uses=1]
 	%100 = fdiv double %95, %12		; <double> [#uses=1]
-	%101 = sub double %99, %100		; <double> [#uses=1]
-	%102 = sub double %98, %101		; <double> [#uses=1]
+	%101 = fsub double %99, %100		; <double> [#uses=1]
+	%102 = fsub double %98, %101		; <double> [#uses=1]
 	%103 = fdiv double %95, %5		; <double> [#uses=1]
-	%104 = sub double 0.000000e+00, %103		; <double> [#uses=1]
-	%105 = mul double %18, %104		; <double> [#uses=1]
-	%106 = add double %102, %105		; <double> [#uses=1]
-	%107 = mul double %106, %k.4		; <double> [#uses=1]
-	%108 = add double %91, %107		; <double> [#uses=1]
-	%109 = sub double %108, 0.000000e+00		; <double> [#uses=1]
+	%104 = fsub double 0.000000e+00, %103		; <double> [#uses=1]
+	%105 = fmul double %18, %104		; <double> [#uses=1]
+	%106 = fadd double %102, %105		; <double> [#uses=1]
+	%107 = fmul double %106, %k.4		; <double> [#uses=1]
+	%108 = fadd double %91, %107		; <double> [#uses=1]
+	%109 = fsub double %108, 0.000000e+00		; <double> [#uses=1]
 	%110 = tail call double @llvm.exp.f64(double %8) nounwind		; <double> [#uses=1]
-	%111 = sub double -0.000000e+00, %110		; <double> [#uses=2]
+	%111 = fsub double -0.000000e+00, %110		; <double> [#uses=2]
 	%112 = tail call double @llvm.exp.f64(double %10) nounwind		; <double> [#uses=1]
-	%113 = sub double -0.000000e+00, %112		; <double> [#uses=2]
+	%113 = fsub double -0.000000e+00, %112		; <double> [#uses=2]
 	%114 = fdiv double %111, %11		; <double> [#uses=1]
 	%115 = fdiv double %113, %12		; <double> [#uses=1]
-	%116 = sub double %114, %115		; <double> [#uses=1]
-	%117 = mul double 0.000000e+00, %116		; <double> [#uses=1]
+	%116 = fsub double %114, %115		; <double> [#uses=1]
+	%117 = fmul double 0.000000e+00, %116		; <double> [#uses=1]
 	%118 = fdiv double %111, %29		; <double> [#uses=1]
 	%119 = fdiv double %113, %30		; <double> [#uses=1]
-	%120 = sub double %118, %119		; <double> [#uses=1]
-	%121 = sub double %117, %120		; <double> [#uses=1]
-	%122 = mul double %18, 0.000000e+00		; <double> [#uses=1]
-	%123 = add double %121, %122		; <double> [#uses=1]
-	%124 = mul double %33, 0.000000e+00		; <double> [#uses=1]
-	%125 = add double %123, %124		; <double> [#uses=1]
-	%126 = add double %109, %125		; <double> [#uses=1]
+	%120 = fsub double %118, %119		; <double> [#uses=1]
+	%121 = fsub double %117, %120		; <double> [#uses=1]
+	%122 = fmul double %18, 0.000000e+00		; <double> [#uses=1]
+	%123 = fadd double %121, %122		; <double> [#uses=1]
+	%124 = fmul double %33, 0.000000e+00		; <double> [#uses=1]
+	%125 = fadd double %123, %124		; <double> [#uses=1]
+	%126 = fadd double %109, %125		; <double> [#uses=1]
 	%127 = tail call double @llvm.exp.f64(double 0.000000e+00) nounwind		; <double> [#uses=1]
-	%128 = sub double -0.000000e+00, %127		; <double> [#uses=2]
+	%128 = fsub double -0.000000e+00, %127		; <double> [#uses=2]
 	%129 = fdiv double %128, %30		; <double> [#uses=1]
-	%130 = sub double 0.000000e+00, %129		; <double> [#uses=1]
-	%131 = sub double 0.000000e+00, %130		; <double> [#uses=1]
+	%130 = fsub double 0.000000e+00, %129		; <double> [#uses=1]
+	%131 = fsub double 0.000000e+00, %130		; <double> [#uses=1]
 	%132 = fdiv double 0.000000e+00, %.pn404		; <double> [#uses=1]
-	%133 = sub double %132, 0.000000e+00		; <double> [#uses=1]
-	%134 = mul double %18, %133		; <double> [#uses=1]
-	%135 = add double %131, %134		; <double> [#uses=1]
+	%133 = fsub double %132, 0.000000e+00		; <double> [#uses=1]
+	%134 = fmul double %18, %133		; <double> [#uses=1]
+	%135 = fadd double %131, %134		; <double> [#uses=1]
 	%136 = fdiv double %128, %5		; <double> [#uses=1]
-	%137 = sub double 0.000000e+00, %136		; <double> [#uses=1]
-	%138 = mul double %33, %137		; <double> [#uses=1]
-	%139 = add double %135, %138		; <double> [#uses=1]
-	%140 = sub double %126, %139		; <double> [#uses=1]
-	%141 = add double %N1.0, %59		; <double> [#uses=1]
-	%142 = add double %D1.0, %140		; <double> [#uses=1]
+	%137 = fsub double 0.000000e+00, %136		; <double> [#uses=1]
+	%138 = fmul double %33, %137		; <double> [#uses=1]
+	%139 = fadd double %135, %138		; <double> [#uses=1]
+	%140 = fsub double %126, %139		; <double> [#uses=1]
+	%141 = fadd double %N1.0, %59		; <double> [#uses=1]
+	%142 = fadd double %D1.0, %140		; <double> [#uses=1]
 	br label %bb64
 
 bb64:		; preds = %bb62, %bb55
diff --git a/test/CodeGen/ARM/2009-03-07-SpillerBug.ll b/test/CodeGen/ARM/2009-03-07-SpillerBug.ll
index 7556616..399ed30 100644
--- a/test/CodeGen/ARM/2009-03-07-SpillerBug.ll
+++ b/test/CodeGen/ARM/2009-03-07-SpillerBug.ll
@@ -26,39 +26,39 @@
 
 bb3:		; preds = %entry
 	%2 = fdiv double 1.000000e+00, 0.000000e+00		; <double> [#uses=1]
-	%3 = mul double 0.000000e+00, %2		; <double> [#uses=2]
+	%3 = fmul double 0.000000e+00, %2		; <double> [#uses=2]
 	%4 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind		; <double> [#uses=1]
 	%5 = fdiv double 1.000000e+00, %4		; <double> [#uses=2]
-	%6 = mul double %3, %5		; <double> [#uses=2]
-	%7 = mul double 0.000000e+00, %5		; <double> [#uses=2]
-	%8 = mul double %3, %7		; <double> [#uses=1]
-	%9 = sub double %8, 0.000000e+00		; <double> [#uses=1]
-	%10 = mul double 0.000000e+00, %6		; <double> [#uses=1]
-	%11 = sub double 0.000000e+00, %10		; <double> [#uses=1]
-	%12 = sub double -0.000000e+00, %11		; <double> [#uses=1]
-	%13 = mul double %0, %0		; <double> [#uses=2]
-	%14 = sub double %13, 0.000000e+00		; <double> [#uses=1]
+	%6 = fmul double %3, %5		; <double> [#uses=2]
+	%7 = fmul double 0.000000e+00, %5		; <double> [#uses=2]
+	%8 = fmul double %3, %7		; <double> [#uses=1]
+	%9 = fsub double %8, 0.000000e+00		; <double> [#uses=1]
+	%10 = fmul double 0.000000e+00, %6		; <double> [#uses=1]
+	%11 = fsub double 0.000000e+00, %10		; <double> [#uses=1]
+	%12 = fsub double -0.000000e+00, %11		; <double> [#uses=1]
+	%13 = fmul double %0, %0		; <double> [#uses=2]
+	%14 = fsub double %13, 0.000000e+00		; <double> [#uses=1]
 	%15 = call double @llvm.sqrt.f64(double %14)		; <double> [#uses=1]
-	%16 = mul double 0.000000e+00, %15		; <double> [#uses=1]
+	%16 = fmul double 0.000000e+00, %15		; <double> [#uses=1]
 	%17 = fdiv double %16, %0		; <double> [#uses=1]
-	%18 = add double 0.000000e+00, %17		; <double> [#uses=1]
+	%18 = fadd double 0.000000e+00, %17		; <double> [#uses=1]
 	%19 = call double @acos(double %18) nounwind readonly		; <double> [#uses=1]
 	%20 = load double* null, align 4		; <double> [#uses=1]
-	%21 = mul double %20, 0x401921FB54442D18		; <double> [#uses=1]
+	%21 = fmul double %20, 0x401921FB54442D18		; <double> [#uses=1]
 	%22 = call double @sin(double %19) nounwind readonly		; <double> [#uses=2]
-	%23 = mul double %22, 0.000000e+00		; <double> [#uses=2]
-	%24 = mul double %6, %23		; <double> [#uses=1]
-	%25 = mul double %7, %23		; <double> [#uses=1]
+	%23 = fmul double %22, 0.000000e+00		; <double> [#uses=2]
+	%24 = fmul double %6, %23		; <double> [#uses=1]
+	%25 = fmul double %7, %23		; <double> [#uses=1]
 	%26 = call double @sin(double %21) nounwind readonly		; <double> [#uses=1]
-	%27 = mul double %22, %26		; <double> [#uses=2]
-	%28 = mul double %9, %27		; <double> [#uses=1]
-	%29 = mul double %27, %12		; <double> [#uses=1]
-	%30 = add double %24, %28		; <double> [#uses=1]
-	%31 = add double 0.000000e+00, %29		; <double> [#uses=1]
-	%32 = add double %25, 0.000000e+00		; <double> [#uses=1]
-	%33 = add double %30, 0.000000e+00		; <double> [#uses=1]
-	%34 = add double %31, 0.000000e+00		; <double> [#uses=1]
-	%35 = add double %32, 0.000000e+00		; <double> [#uses=1]
+	%27 = fmul double %22, %26		; <double> [#uses=2]
+	%28 = fmul double %9, %27		; <double> [#uses=1]
+	%29 = fmul double %27, %12		; <double> [#uses=1]
+	%30 = fadd double %24, %28		; <double> [#uses=1]
+	%31 = fadd double 0.000000e+00, %29		; <double> [#uses=1]
+	%32 = fadd double %25, 0.000000e+00		; <double> [#uses=1]
+	%33 = fadd double %30, 0.000000e+00		; <double> [#uses=1]
+	%34 = fadd double %31, 0.000000e+00		; <double> [#uses=1]
+	%35 = fadd double %32, 0.000000e+00		; <double> [#uses=1]
 	%36 = bitcast %struct.ggPoint3* %x to i8*		; <i8*> [#uses=1]
 	call void @llvm.memcpy.i32(i8* null, i8* %36, i32 24, i32 4) nounwind
 	store double %33, double* null, align 8
@@ -68,9 +68,9 @@
 	unreachable
 
 _Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit:		; preds = %bb3
-	%37 = sub double %13, 0.000000e+00		; <double> [#uses=0]
-	%38 = sub double -0.000000e+00, %34		; <double> [#uses=0]
-	%39 = sub double -0.000000e+00, %35		; <double> [#uses=0]
+	%37 = fsub double %13, 0.000000e+00		; <double> [#uses=0]
+	%38 = fsub double -0.000000e+00, %34		; <double> [#uses=0]
+	%39 = fsub double -0.000000e+00, %35		; <double> [#uses=0]
 	ret i32 1
 
 bb7:		; preds = %entry
diff --git a/test/CodeGen/ARM/2009-04-08-FloatUndef.ll b/test/CodeGen/ARM/2009-04-08-FloatUndef.ll
index 9dc3b34..f394847 100644
--- a/test/CodeGen/ARM/2009-04-08-FloatUndef.ll
+++ b/test/CodeGen/ARM/2009-04-08-FloatUndef.ll
@@ -4,8 +4,8 @@
 entry:
 	%input2 = load <4 x float>* null, align 16		; <<4 x float>> [#uses=2]
 	%shuffle7 = shufflevector <4 x float> %input2, <4 x float> <float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00>, <4 x i32> <i32 2, i32 2, i32 2, i32 2>		; <<4 x float>> [#uses=1]
-	%mul1 = mul <4 x float> %shuffle7, zeroinitializer		; <<4 x float>> [#uses=1]
-	%add2 = add <4 x float> %mul1, %input2		; <<4 x float>> [#uses=1]
+	%mul1 = fmul <4 x float> %shuffle7, zeroinitializer		; <<4 x float>> [#uses=1]
+	%add2 = fadd <4 x float> %mul1, %input2		; <<4 x float>> [#uses=1]
 	store <4 x float> %add2, <4 x float>* null, align 16
 	ret void
 }
diff --git a/test/CodeGen/ARM/cse-libcalls.ll b/test/CodeGen/ARM/cse-libcalls.ll
index 3b499a4..4f4091a 100644
--- a/test/CodeGen/ARM/cse-libcalls.ll
+++ b/test/CodeGen/ARM/cse-libcalls.ll
@@ -16,7 +16,7 @@
 	br i1 false, label %bb502.loopexit.i, label %bb28.i
 
 bb.nph53.i:		; preds = %bb502.loopexit.i
-	%tmp354.i = sub double -0.000000e+00, %tmp10.i4		; <double> [#uses=0]
+	%tmp354.i = fsub double -0.000000e+00, %tmp10.i4		; <double> [#uses=0]
 	br label %bb244.i
 
 bb244.i:		; preds = %bb244.i, %bb.nph53.i
diff --git a/test/CodeGen/ARM/fixunsdfdi.ll b/test/CodeGen/ARM/fixunsdfdi.ll
index d3038b9..777a3d6 100644
--- a/test/CodeGen/ARM/fixunsdfdi.ll
+++ b/test/CodeGen/ARM/fixunsdfdi.ll
@@ -13,7 +13,7 @@
 	%u.in.mask = and i64 %x14, -4294967296		; <i64> [#uses=1]
 	%.ins = or i64 0, %u.in.mask		; <i64> [#uses=1]
 	%0 = bitcast i64 %.ins to double		; <double> [#uses=1]
-	%1 = sub double %x, %0		; <double> [#uses=1]
+	%1 = fsub double %x, %0		; <double> [#uses=1]
 	%2 = fptosi double %1 to i32		; <i32> [#uses=1]
 	%3 = add i32 %2, 0		; <i32> [#uses=1]
 	%4 = zext i32 %3 to i64		; <i64> [#uses=1]
diff --git a/test/CodeGen/ARM/fnmul.ll b/test/CodeGen/ARM/fnmul.ll
index 87a30c9..7bbda2d 100644
--- a/test/CodeGen/ARM/fnmul.ll
+++ b/test/CodeGen/ARM/fnmul.ll
@@ -4,8 +4,8 @@
 
 define double @t1(double %a, double %b) {
 entry:
-        %tmp2 = sub double -0.000000e+00, %a            ; <double> [#uses=1]
-        %tmp4 = mul double %tmp2, %b            ; <double> [#uses=1]
+        %tmp2 = fsub double -0.000000e+00, %a            ; <double> [#uses=1]
+        %tmp4 = fmul double %tmp2, %b            ; <double> [#uses=1]
         ret double %tmp4
 }
 
diff --git a/test/CodeGen/ARM/fparith.ll b/test/CodeGen/ARM/fparith.ll
index 11933d5..568a6c4 100644
--- a/test/CodeGen/ARM/fparith.ll
+++ b/test/CodeGen/ARM/fparith.ll
@@ -10,49 +10,49 @@
 
 define float @f1(float %a, float %b) {
 entry:
-	%tmp = add float %a, %b		; <float> [#uses=1]
+	%tmp = fadd float %a, %b		; <float> [#uses=1]
 	ret float %tmp
 }
 
 define double @f2(double %a, double %b) {
 entry:
-	%tmp = add double %a, %b		; <double> [#uses=1]
+	%tmp = fadd double %a, %b		; <double> [#uses=1]
 	ret double %tmp
 }
 
 define float @f3(float %a, float %b) {
 entry:
-	%tmp = mul float %a, %b		; <float> [#uses=1]
+	%tmp = fmul float %a, %b		; <float> [#uses=1]
 	ret float %tmp
 }
 
 define double @f4(double %a, double %b) {
 entry:
-	%tmp = mul double %a, %b		; <double> [#uses=1]
+	%tmp = fmul double %a, %b		; <double> [#uses=1]
 	ret double %tmp
 }
 
 define float @f5(float %a, float %b) {
 entry:
-	%tmp = sub float %a, %b		; <float> [#uses=1]
+	%tmp = fsub float %a, %b		; <float> [#uses=1]
 	ret float %tmp
 }
 
 define double @f6(double %a, double %b) {
 entry:
-	%tmp = sub double %a, %b		; <double> [#uses=1]
+	%tmp = fsub double %a, %b		; <double> [#uses=1]
 	ret double %tmp
 }
 
 define float @f7(float %a) {
 entry:
-	%tmp1 = sub float -0.000000e+00, %a		; <float> [#uses=1]
+	%tmp1 = fsub float -0.000000e+00, %a		; <float> [#uses=1]
 	ret float %tmp1
 }
 
 define double @f8(double %a) {
 entry:
-	%tmp1 = sub double -0.000000e+00, %a		; <double> [#uses=1]
+	%tmp1 = fsub double -0.000000e+00, %a		; <double> [#uses=1]
 	ret double %tmp1
 }
 
diff --git a/test/CodeGen/ARM/fpmem.ll b/test/CodeGen/ARM/fpmem.ll
index 48204ec..13653bb 100644
--- a/test/CodeGen/ARM/fpmem.ll
+++ b/test/CodeGen/ARM/fpmem.ll
@@ -11,12 +11,12 @@
 
 define float @f2(float* %v, float %u) {
         %tmp = load float* %v           ; <float> [#uses=1]
-        %tmp1 = add float %tmp, %u              ; <float> [#uses=1]
+        %tmp1 = fadd float %tmp, %u              ; <float> [#uses=1]
         ret float %tmp1
 }
 
 define void @f3(float %a, float %b, float* %v) {
-        %tmp = add float %a, %b         ; <float> [#uses=1]
+        %tmp = fadd float %a, %b         ; <float> [#uses=1]
         store float %tmp, float* %v
         ret void
 }
diff --git a/test/CodeGen/ARM/illegal-vector-bitcast.ll b/test/CodeGen/ARM/illegal-vector-bitcast.ll
index 79f9929..ad24eb5 100644
--- a/test/CodeGen/ARM/illegal-vector-bitcast.ll
+++ b/test/CodeGen/ARM/illegal-vector-bitcast.ll
@@ -3,7 +3,7 @@
 define void @foo(<8 x float>* %f, <8 x float>* %g, <4 x i64>* %y)
 {
   %h = load <8 x float>* %f
-  %i = mul <8 x float> %h, <float 0x3FF19999A0000000, float 0x400A666660000000, float 0x40119999A0000000, float 0x40159999A0000000, float 0.5, float 0x3FE3333340000000, float 0x3FE6666660000000, float 0x3FE99999A0000000>
+  %i = fmul <8 x float> %h, <float 0x3FF19999A0000000, float 0x400A666660000000, float 0x40119999A0000000, float 0x40159999A0000000, float 0.5, float 0x3FE3333340000000, float 0x3FE6666660000000, float 0x3FE99999A0000000>
   %m = bitcast <8 x float> %i to <4 x i64>
   %z = load <4 x i64>* %y
   %n = mul <4 x i64> %z, %m
diff --git a/test/CodeGen/ARM/vfp.ll b/test/CodeGen/ARM/vfp.ll
index 2acb33f..f58da44 100644
--- a/test/CodeGen/ARM/vfp.ll
+++ b/test/CodeGen/ARM/vfp.ll
@@ -39,10 +39,10 @@
 
 define void @test_add(float* %P, double* %D) {
 	%a = load float* %P		; <float> [#uses=2]
-	%b = add float %a, %a		; <float> [#uses=1]
+	%b = fadd float %a, %a		; <float> [#uses=1]
 	store float %b, float* %P
 	%A = load double* %D		; <double> [#uses=2]
-	%B = add double %A, %A		; <double> [#uses=1]
+	%B = fadd double %A, %A		; <double> [#uses=1]
 	store double %B, double* %D
 	ret void
 }
@@ -61,8 +61,8 @@
 	%a1 = load float* %P1		; <float> [#uses=1]
 	%a2 = load float* %P2		; <float> [#uses=1]
 	%a3 = load float* %P3		; <float> [#uses=1]
-	%X = mul float %a1, %a2		; <float> [#uses=1]
-	%Y = sub float %X, %a3		; <float> [#uses=1]
+	%X = fmul float %a1, %a2		; <float> [#uses=1]
+	%Y = fsub float %X, %a3		; <float> [#uses=1]
 	store float %Y, float* %P1
 	ret void
 }
diff --git a/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll b/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll
index ca4e48e..f8393a3 100644
--- a/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll
+++ b/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll
@@ -23,7 +23,7 @@
 
 define double @test5(double %D) {
         %X = bitcast double %D to double                ; <double> [#uses=1]
-        %Y = add double %X, 2.000000e+00                ; <double> [#uses=1]
+        %Y = fadd double %X, 2.000000e+00                ; <double> [#uses=1]
         %Z = bitcast double %Y to i64           ; <i64> [#uses=1]
         %res = bitcast i64 %Z to double         ; <double> [#uses=1]
         ret double %res
@@ -31,7 +31,7 @@
 
 define float @test6(float %F) {
         %X = bitcast float %F to float          ; <float> [#uses=1]
-        %Y = add float %X, 2.000000e+00         ; <float> [#uses=1]
+        %Y = fadd float %X, 2.000000e+00         ; <float> [#uses=1]
         %Z = bitcast float %Y to i32            ; <i32> [#uses=1]
         %res = bitcast i32 %Z to float          ; <float> [#uses=1]
         ret float %res
diff --git a/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll b/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll
index afcac99..32d635a 100644
--- a/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll
+++ b/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll
@@ -20,7 +20,7 @@
 	br label %bb4
 
 bb4:		; preds = %bb5.split, %bb4, %entry
-	%0 = fcmp ogt ppc_fp128 0xM00000000000000000000000000000000, select (i1 fcmp olt (ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128), ppc_fp128 mul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000)), ppc_fp128 mul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000), ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128))		; <i1> [#uses=1]
+	%0 = fcmp ogt ppc_fp128 0xM00000000000000000000000000000000, select (i1 fcmp olt (ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128), ppc_fp128 fmul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000)), ppc_fp128 fmul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000), ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128))		; <i1> [#uses=1]
 	br i1 %0, label %bb4, label %bb5.split
 
 bb5.split:		; preds = %bb4
diff --git a/test/CodeGen/CBackend/vectors.ll b/test/CodeGen/CBackend/vectors.ll
index de78975..d01e992 100644
--- a/test/CodeGen/CBackend/vectors.ll
+++ b/test/CodeGen/CBackend/vectors.ll
@@ -14,7 +14,7 @@
 }
 
 define <4 x float> @test3(<4 x float> %Y) {
-	%Z = add <4 x float> %Y, %Y
+	%Z = fadd <4 x float> %Y, %Y
 	%X = shufflevector <4 x float> zeroinitializer, <4 x float> %Z, <4 x i32> < i32 0, i32 5, i32 6, i32 7 >
 	ret <4 x float> %X
 }
diff --git a/test/CodeGen/CellSPU/dp_farith.ll b/test/CodeGen/CellSPU/dp_farith.ll
index 2579a40..d4802ae 100644
--- a/test/CodeGen/CellSPU/dp_farith.ll
+++ b/test/CodeGen/CellSPU/dp_farith.ll
@@ -11,88 +11,88 @@
 target triple = "spu"
 
 define double @fadd(double %arg1, double %arg2) {
-        %A = add double %arg1, %arg2
+        %A = fadd double %arg1, %arg2
         ret double %A
 }
 
 define <2 x double> @fadd_vec(<2 x double> %arg1, <2 x double> %arg2) {
-        %A = add <2 x double> %arg1, %arg2
+        %A = fadd <2 x double> %arg1, %arg2
         ret <2 x double> %A
 }
 
 define double @fsub(double %arg1, double %arg2) {
-        %A = sub double %arg1,  %arg2
+        %A = fsub double %arg1,  %arg2
         ret double %A
 }
 
 define <2 x double> @fsub_vec(<2 x double> %arg1, <2 x double> %arg2) {
-        %A = sub <2 x double> %arg1,  %arg2
+        %A = fsub <2 x double> %arg1,  %arg2
         ret <2 x double> %A
 }
 
 define double @fmul(double %arg1, double %arg2) {
-        %A = mul double %arg1,  %arg2
+        %A = fmul double %arg1,  %arg2
         ret double %A
 }
 
 define <2 x double> @fmul_vec(<2 x double> %arg1, <2 x double> %arg2) {
-        %A = mul <2 x double> %arg1,  %arg2
+        %A = fmul <2 x double> %arg1,  %arg2
         ret <2 x double> %A
 }
 
 define double @fma(double %arg1, double %arg2, double %arg3) {
-        %A = mul double %arg1,  %arg2
-        %B = add double %A, %arg3
+        %A = fmul double %arg1,  %arg2
+        %B = fadd double %A, %arg3
         ret double %B
 }
 
 define <2 x double> @fma_vec(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
-        %A = mul <2 x double> %arg1,  %arg2
-        %B = add <2 x double> %A, %arg3
+        %A = fmul <2 x double> %arg1,  %arg2
+        %B = fadd <2 x double> %A, %arg3
         ret <2 x double> %B
 }
 
 define double @fms(double %arg1, double %arg2, double %arg3) {
-        %A = mul double %arg1,  %arg2
-        %B = sub double %A, %arg3
+        %A = fmul double %arg1,  %arg2
+        %B = fsub double %A, %arg3
         ret double %B
 }
 
 define <2 x double> @fms_vec(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
-        %A = mul <2 x double> %arg1,  %arg2
-        %B = sub <2 x double> %A, %arg3
+        %A = fmul <2 x double> %arg1,  %arg2
+        %B = fsub <2 x double> %A, %arg3
         ret <2 x double> %B
 }
 
 ; - (a * b - c)
 define double @d_fnms_1(double %arg1, double %arg2, double %arg3) {
-        %A = mul double %arg1,  %arg2
-        %B = sub double %A, %arg3
-        %C = sub double -0.000000e+00, %B               ; <double> [#uses=1]
+        %A = fmul double %arg1,  %arg2
+        %B = fsub double %A, %arg3
+        %C = fsub double -0.000000e+00, %B               ; <double> [#uses=1]
         ret double %C
 }
 
 ; Annother way of getting fnms
 ; - ( a * b ) + c => c - (a * b)
 define double @d_fnms_2(double %arg1, double %arg2, double %arg3) {
-        %A = mul double %arg1,  %arg2
-        %B = sub double %arg3, %A
+        %A = fmul double %arg1,  %arg2
+        %B = fsub double %arg3, %A
         ret double %B
 }
 
 ; FNMS: - (a * b - c) => c - (a * b)
 define <2 x double> @d_fnms_vec_1(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
-        %A = mul <2 x double> %arg1,  %arg2
-        %B = sub <2 x double> %arg3, %A ;
+        %A = fmul <2 x double> %arg1,  %arg2
+        %B = fsub <2 x double> %arg3, %A ;
         ret <2 x double> %B
 }
 
 ; Another way to get fnms using a constant vector
 ; - ( a * b - c)
 define <2 x double> @d_fnms_vec_2(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
-        %A = mul <2 x double> %arg1,  %arg2     ; <<2 x double>> [#uses=1]
-        %B = sub <2 x double> %A, %arg3 ; <<2 x double>> [#uses=1]
-        %C = sub <2 x double> < double -0.00000e+00, double -0.00000e+00 >, %B
+        %A = fmul <2 x double> %arg1,  %arg2     ; <<2 x double>> [#uses=1]
+        %B = fsub <2 x double> %A, %arg3 ; <<2 x double>> [#uses=1]
+        %C = fsub <2 x double> < double -0.00000e+00, double -0.00000e+00 >, %B
         ret <2 x double> %C
 }
 
diff --git a/test/CodeGen/CellSPU/fneg-fabs.ll b/test/CodeGen/CellSPU/fneg-fabs.ll
index 4c6fbb9..5bd66f4 100644
--- a/test/CodeGen/CellSPU/fneg-fabs.ll
+++ b/test/CodeGen/CellSPU/fneg-fabs.ll
@@ -7,22 +7,22 @@
 target triple = "spu"
 
 define double @fneg_dp(double %X) {
-        %Y = sub double -0.000000e+00, %X
+        %Y = fsub double -0.000000e+00, %X
         ret double %Y
 }
 
 define <2 x double> @fneg_dp_vec(<2 x double> %X) {
-        %Y = sub <2 x double> < double -0.0000e+00, double -0.0000e+00 >, %X
+        %Y = fsub <2 x double> < double -0.0000e+00, double -0.0000e+00 >, %X
         ret <2 x double> %Y
 }
 
 define float @fneg_sp(float %X) {
-        %Y = sub float -0.000000e+00, %X
+        %Y = fsub float -0.000000e+00, %X
         ret float %Y
 }
 
 define <4 x float> @fneg_sp_vec(<4 x float> %X) {
-        %Y = sub <4 x float> <float -0.000000e+00, float -0.000000e+00,
+        %Y = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00,
                               float -0.000000e+00, float -0.000000e+00>, %X
         ret <4 x float> %Y
 }
diff --git a/test/CodeGen/CellSPU/sp_farith.ll b/test/CodeGen/CellSPU/sp_farith.ll
index df3baef..d77dd92 100644
--- a/test/CodeGen/CellSPU/sp_farith.ll
+++ b/test/CodeGen/CellSPU/sp_farith.ll
@@ -12,79 +12,79 @@
 target triple = "spu"
 
 define float @fp_add(float %arg1, float %arg2) {
-        %A = add float %arg1, %arg2     ; <float> [#uses=1]
+        %A = fadd float %arg1, %arg2     ; <float> [#uses=1]
         ret float %A
 }
 
 define <4 x float> @fp_add_vec(<4 x float> %arg1, <4 x float> %arg2) {
-        %A = add <4 x float> %arg1, %arg2       ; <<4 x float>> [#uses=1]
+        %A = fadd <4 x float> %arg1, %arg2       ; <<4 x float>> [#uses=1]
         ret <4 x float> %A
 }
 
 define float @fp_sub(float %arg1, float %arg2) {
-        %A = sub float %arg1,  %arg2    ; <float> [#uses=1]
+        %A = fsub float %arg1,  %arg2    ; <float> [#uses=1]
         ret float %A
 }
 
 define <4 x float> @fp_sub_vec(<4 x float> %arg1, <4 x float> %arg2) {
-        %A = sub <4 x float> %arg1,  %arg2      ; <<4 x float>> [#uses=1]
+        %A = fsub <4 x float> %arg1,  %arg2      ; <<4 x float>> [#uses=1]
         ret <4 x float> %A
 }
 
 define float @fp_mul(float %arg1, float %arg2) {
-        %A = mul float %arg1,  %arg2    ; <float> [#uses=1]
+        %A = fmul float %arg1,  %arg2    ; <float> [#uses=1]
         ret float %A
 }
 
 define <4 x float> @fp_mul_vec(<4 x float> %arg1, <4 x float> %arg2) {
-        %A = mul <4 x float> %arg1,  %arg2      ; <<4 x float>> [#uses=1]
+        %A = fmul <4 x float> %arg1,  %arg2      ; <<4 x float>> [#uses=1]
         ret <4 x float> %A
 }
 
 define float @fp_mul_add(float %arg1, float %arg2, float %arg3) {
-        %A = mul float %arg1,  %arg2    ; <float> [#uses=1]
-        %B = add float %A, %arg3        ; <float> [#uses=1]
+        %A = fmul float %arg1,  %arg2    ; <float> [#uses=1]
+        %B = fadd float %A, %arg3        ; <float> [#uses=1]
         ret float %B
 }
 
 define <4 x float> @fp_mul_add_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) {
-        %A = mul <4 x float> %arg1,  %arg2      ; <<4 x float>> [#uses=1]
-        %B = add <4 x float> %A, %arg3  ; <<4 x float>> [#uses=1]
+        %A = fmul <4 x float> %arg1,  %arg2      ; <<4 x float>> [#uses=1]
+        %B = fadd <4 x float> %A, %arg3  ; <<4 x float>> [#uses=1]
         ret <4 x float> %B
 }
 
 define float @fp_mul_sub(float %arg1, float %arg2, float %arg3) {
-        %A = mul float %arg1,  %arg2    ; <float> [#uses=1]
-        %B = sub float %A, %arg3        ; <float> [#uses=1]
+        %A = fmul float %arg1,  %arg2    ; <float> [#uses=1]
+        %B = fsub float %A, %arg3        ; <float> [#uses=1]
         ret float %B
 }
 
 define <4 x float> @fp_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) {
-        %A = mul <4 x float> %arg1,  %arg2      ; <<4 x float>> [#uses=1]
-        %B = sub <4 x float> %A, %arg3  ; <<4 x float>> [#uses=1]
+        %A = fmul <4 x float> %arg1,  %arg2      ; <<4 x float>> [#uses=1]
+        %B = fsub <4 x float> %A, %arg3  ; <<4 x float>> [#uses=1]
         ret <4 x float> %B
 }
 
 ; Test the straightforward way of getting fnms
 ; c - a * b
 define float @fp_neg_mul_sub_1(float %arg1, float %arg2, float %arg3) {
-        %A = mul float %arg1,  %arg2
-        %B = sub float %arg3, %A
+        %A = fmul float %arg1,  %arg2
+        %B = fsub float %arg3, %A
         ret float %B
 }
 
 ; Test another way of getting fnms
 ; - ( a *b -c ) = c - a * b
 define float @fp_neg_mul_sub_2(float %arg1, float %arg2, float %arg3) {
-        %A = mul float %arg1,  %arg2
-        %B = sub float %A, %arg3 
-        %C = sub float -0.0, %B
+        %A = fmul float %arg1,  %arg2
+        %B = fsub float %A, %arg3
+        %C = fsub float -0.0, %B
         ret float %C
 }
 
 define <4 x float> @fp_neg_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) {
-        %A = mul <4 x float> %arg1,  %arg2
-        %B = sub <4 x float> %A, %arg3
-        %D = sub <4 x float> < float -0.0, float -0.0, float -0.0, float -0.0 >, %B
+        %A = fmul <4 x float> %arg1,  %arg2
+        %B = fsub <4 x float> %A, %arg3
+        %D = fsub <4 x float> < float -0.0, float -0.0, float -0.0, float -0.0 >, %B
         ret <4 x float> %D
 }
diff --git a/test/CodeGen/Generic/2006-07-03-schedulers.ll b/test/CodeGen/Generic/2006-07-03-schedulers.ll
index 4c4481c..597ee56 100644
--- a/test/CodeGen/Generic/2006-07-03-schedulers.ll
+++ b/test/CodeGen/Generic/2006-07-03-schedulers.ll
@@ -12,13 +12,13 @@
 	br label %bb1
 
 bb1:		; preds = %bb1, %0
-	%x1 = mul float %x, %y		; <float> [#uses=1]
-	%y1 = mul float %y, 7.500000e-01		; <float> [#uses=1]
-	%z1 = add float %x1, %y1		; <float> [#uses=1]
-	%x2 = mul float %x, 5.000000e-01		; <float> [#uses=1]
-	%y2 = mul float %y, 0x3FECCCCCC0000000		; <float> [#uses=1]
-	%z2 = add float %x2, %y2		; <float> [#uses=1]
-	%z3 = add float %z1, %z2		; <float> [#uses=1]
+	%x1 = fmul float %x, %y		; <float> [#uses=1]
+	%y1 = fmul float %y, 7.500000e-01		; <float> [#uses=1]
+	%z1 = fadd float %x1, %y1		; <float> [#uses=1]
+	%x2 = fmul float %x, 5.000000e-01		; <float> [#uses=1]
+	%y2 = fmul float %y, 0x3FECCCCCC0000000		; <float> [#uses=1]
+	%z2 = fadd float %x2, %y2		; <float> [#uses=1]
+	%z3 = fadd float %z1, %z2		; <float> [#uses=1]
 	%i1 = shl i32 %i, 3		; <i32> [#uses=1]
 	%j1 = add i32 %i, 7		; <i32> [#uses=1]
 	%m1 = add i32 %i1, %j1		; <i32> [#uses=2]
diff --git a/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll b/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll
index 7495795..a61108a 100644
--- a/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll
+++ b/test/CodeGen/Generic/2007-05-15-InfiniteRecursion.ll
@@ -71,10 +71,10 @@
 	%tmp178.i = add i32 %tmp116117.i, -128		; <i32> [#uses=2]
 	%tmp181.i = mul i32 %tmp178.i, %tmp178.i		; <i32> [#uses=1]
 	%tmp181182.i = sitofp i32 %tmp181.i to float		; <float> [#uses=1]
-	%tmp199200.pn.in.i = mul float %tmp181182.i, 0.000000e+00		; <float> [#uses=1]
+	%tmp199200.pn.in.i = fmul float %tmp181182.i, 0.000000e+00		; <float> [#uses=1]
 	%tmp199200.pn.i = fpext float %tmp199200.pn.in.i to double		; <double> [#uses=1]
-	%tmp201.pn.i = sub double 1.000000e+00, %tmp199200.pn.i		; <double> [#uses=1]
-	%factor.2.in.i = mul double 0.000000e+00, %tmp201.pn.i		; <double> [#uses=1]
+	%tmp201.pn.i = fsub double 1.000000e+00, %tmp199200.pn.i		; <double> [#uses=1]
+	%factor.2.in.i = fmul double 0.000000e+00, %tmp201.pn.i		; <double> [#uses=1]
 	%factor.2.i = fptrunc double %factor.2.in.i to float		; <float> [#uses=1]
 	br i1 false, label %cond_next312.i, label %cond_false222.i
 
diff --git a/test/CodeGen/Generic/2008-02-04-ExtractSubvector.ll b/test/CodeGen/Generic/2008-02-04-ExtractSubvector.ll
index 1cf822b..9acb852 100644
--- a/test/CodeGen/Generic/2008-02-04-ExtractSubvector.ll
+++ b/test/CodeGen/Generic/2008-02-04-ExtractSubvector.ll
@@ -5,7 +5,7 @@
 	br label %bb15
 
 bb15:		; preds = %bb15, %entry
-	%tmp21 = add <8 x double> zeroinitializer, zeroinitializer		; <<8 x double>> [#uses=1]
+	%tmp21 = fadd <8 x double> zeroinitializer, zeroinitializer		; <<8 x double>> [#uses=1]
 	br i1 false, label %bb30, label %bb15
 
 bb30:		; preds = %bb15
diff --git a/test/CodeGen/Generic/2008-02-25-NegateZero.ll b/test/CodeGen/Generic/2008-02-25-NegateZero.ll
index e5a5274..0169307 100644
--- a/test/CodeGen/Generic/2008-02-25-NegateZero.ll
+++ b/test/CodeGen/Generic/2008-02-25-NegateZero.ll
@@ -5,8 +5,8 @@
 entry:
 	%tmp98 = load float* null, align 4		; <float> [#uses=1]
 	%tmp106 = load float* null, align 4		; <float> [#uses=1]
-	%tmp113 = add float %tmp98, %tmp106		; <float> [#uses=1]
-	%tmp119 = sub float %tmp113, 0.000000e+00		; <float> [#uses=1]
+	%tmp113 = fadd float %tmp98, %tmp106		; <float> [#uses=1]
+	%tmp119 = fsub float %tmp113, 0.000000e+00		; <float> [#uses=1]
 	call void (i32, ...)* @foo( i32 0, float 0.000000e+00, float %tmp119 ) nounwind 
 	ret void
 }
diff --git a/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll b/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll
index 7fe19d9..b2112f3 100644
--- a/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll
+++ b/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll
@@ -30,16 +30,16 @@
 	br i1 false, label %bb471, label %bb505
 
 bb471:		; preds = %bb471, %bb.nph1770
-	%tmp487 = add double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%tmp487 = fadd double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
 	br i1 false, label %bb505, label %bb471
 
 bb505:		; preds = %bb471, %bb.nph1770
 	%xy.0.lcssa = phi double [ 0.000000e+00, %bb.nph1770 ], [ %tmp487, %bb471 ]		; <double> [#uses=1]
-	%tmp507 = sub double -0.000000e+00, %xy.0.lcssa		; <double> [#uses=1]
+	%tmp507 = fsub double -0.000000e+00, %xy.0.lcssa		; <double> [#uses=1]
 	%tmp509 = fdiv double %tmp507, 0.000000e+00		; <double> [#uses=1]
-	%tmp510 = mul double %tmp509, 1.024000e+03		; <double> [#uses=1]
+	%tmp510 = fmul double %tmp509, 1.024000e+03		; <double> [#uses=1]
 	%tmp516 = fdiv double %tmp510, 0.000000e+00		; <double> [#uses=1]
-	%tmp517 = add double %tmp516, 5.000000e-01		; <double> [#uses=1]
+	%tmp517 = fadd double %tmp516, 5.000000e-01		; <double> [#uses=1]
 	%tmp518 = tail call double @floor( double %tmp517 ) nounwind readnone 		; <double> [#uses=0]
 	ret i32 0
 
diff --git a/test/CodeGen/Generic/fneg-fabs.ll b/test/CodeGen/Generic/fneg-fabs.ll
index f9580b1..2709fa1 100644
--- a/test/CodeGen/Generic/fneg-fabs.ll
+++ b/test/CodeGen/Generic/fneg-fabs.ll
@@ -1,12 +1,12 @@
 ; RUN: llvm-as < %s | llc
 
 define double @fneg(double %X) {
-        %Y = sub double -0.000000e+00, %X               ; <double> [#uses=1]
+        %Y = fsub double -0.000000e+00, %X               ; <double> [#uses=1]
         ret double %Y
 }
 
 define float @fnegf(float %X) {
-        %Y = sub float -0.000000e+00, %X                ; <float> [#uses=1]
+        %Y = fsub float -0.000000e+00, %X                ; <float> [#uses=1]
         ret float %Y
 }
 
diff --git a/test/CodeGen/Generic/print-arith-fp.ll b/test/CodeGen/Generic/print-arith-fp.ll
index 87aa1a0..1e27061 100644
--- a/test/CodeGen/Generic/print-arith-fp.ll
+++ b/test/CodeGen/Generic/print-arith-fp.ll
@@ -24,9 +24,9 @@
 	%b_s = getelementptr [8 x i8]* @b_str, i64 0, i64 0		; <i8*> [#uses=1]
 	call i32 (i8*, ...)* @printf( i8* %a_s, double %a )		; <i32>:1 [#uses=0]
 	call i32 (i8*, ...)* @printf( i8* %b_s, double %b )		; <i32>:2 [#uses=0]
-	%add_r = add double %a, %b		; <double> [#uses=1]
-	%sub_r = sub double %a, %b		; <double> [#uses=1]
-	%mul_r = mul double %a, %b		; <double> [#uses=1]
+	%add_r = fadd double %a, %b		; <double> [#uses=1]
+	%sub_r = fsub double %a, %b		; <double> [#uses=1]
+	%mul_r = fmul double %a, %b		; <double> [#uses=1]
 	%div_r = fdiv double %b, %a		; <double> [#uses=1]
 	%rem_r = frem double %b, %a		; <double> [#uses=1]
 	%add_s = getelementptr [12 x i8]* @add_str, i64 0, i64 0		; <i8*> [#uses=1]
diff --git a/test/CodeGen/Generic/select.ll b/test/CodeGen/Generic/select.ll
index fc573f3..a532703 100644
--- a/test/CodeGen/Generic/select.ll
+++ b/test/CodeGen/Generic/select.ll
@@ -9,8 +9,8 @@
         %a = add i32 %N, 1              ; <i32> [#uses=0]
         %i = add i32 %N, 12345678               ; <i32> [#uses=0]
         %b = add i16 4, 3               ; <i16> [#uses=0]
-        %c = add float %X, 0.000000e+00         ; <float> [#uses=0]
-        %d = add float %X, 0x400921CAC0000000           ; <float> [#uses=0]
+        %c = fadd float %X, 0.000000e+00         ; <float> [#uses=0]
+        %d = fadd float %X, 0x400921CAC0000000           ; <float> [#uses=0]
         %f = add i32 -1, 10             ; <i32> [#uses=0]
         %g = add i16 20, -1             ; <i16> [#uses=0]
         %j = add i16 -1, 30             ; <i16> [#uses=0]
@@ -126,8 +126,8 @@
         br label %Top
 
 Top:            ; preds = %Top, %0
-        %p = add float %x, %y           ; <float> [#uses=1]
-        %z = sub float %x, %y           ; <float> [#uses=1]
+        %p = fadd float %x, %y           ; <float> [#uses=1]
+        %z = fsub float %x, %y           ; <float> [#uses=1]
         %b = fcmp ole float %p, %z              ; <i1> [#uses=2]
         %c = xor i1 %b, true            ; <i1> [#uses=0]
         br i1 %b, label %Top, label %goon
diff --git a/test/CodeGen/Generic/storetrunc-fp.ll b/test/CodeGen/Generic/storetrunc-fp.ll
index 710a990..0f7bb0b 100644
--- a/test/CodeGen/Generic/storetrunc-fp.ll
+++ b/test/CodeGen/Generic/storetrunc-fp.ll
@@ -1,7 +1,7 @@
 ; RUN: llvm-as < %s | llc
 
 define void @foo(double %a, double %b, float* %fp) {
-	%c = add double %a, %b
+	%c = fadd double %a, %b
 	%d = fptrunc double %c to float
 	store float %d, float* %fp
 	ret void
diff --git a/test/CodeGen/Generic/v-split.ll b/test/CodeGen/Generic/v-split.ll
index a312492..44601d0 100644
--- a/test/CodeGen/Generic/v-split.ll
+++ b/test/CodeGen/Generic/v-split.ll
@@ -4,7 +4,7 @@
 define void @test_f8(%f8 *%P, %f8* %Q, %f8 *%S) {
   %p = load %f8* %P
   %q = load %f8* %Q
-  %R = add %f8 %p, %q
+  %R = fadd %f8 %p, %q
   store %f8 %R, %f8 *%S
   ret void
 }
diff --git a/test/CodeGen/Generic/vector.ll b/test/CodeGen/Generic/vector.ll
index 9105757..f283256 100644
--- a/test/CodeGen/Generic/vector.ll
+++ b/test/CodeGen/Generic/vector.ll
@@ -14,7 +14,7 @@
 define void @test_f1(%f1* %P, %f1* %Q, %f1* %S) {
 	%p = load %f1* %P		; <%f1> [#uses=1]
 	%q = load %f1* %Q		; <%f1> [#uses=1]
-	%R = add %f1 %p, %q		; <%f1> [#uses=1]
+	%R = fadd %f1 %p, %q		; <%f1> [#uses=1]
 	store %f1 %R, %f1* %S
 	ret void
 }
@@ -22,7 +22,7 @@
 define void @test_f2(%f2* %P, %f2* %Q, %f2* %S) {
 	%p = load %f2* %P		; <%f2> [#uses=1]
 	%q = load %f2* %Q		; <%f2> [#uses=1]
-	%R = add %f2 %p, %q		; <%f2> [#uses=1]
+	%R = fadd %f2 %p, %q		; <%f2> [#uses=1]
 	store %f2 %R, %f2* %S
 	ret void
 }
@@ -30,7 +30,7 @@
 define void @test_f4(%f4* %P, %f4* %Q, %f4* %S) {
 	%p = load %f4* %P		; <%f4> [#uses=1]
 	%q = load %f4* %Q		; <%f4> [#uses=1]
-	%R = add %f4 %p, %q		; <%f4> [#uses=1]
+	%R = fadd %f4 %p, %q		; <%f4> [#uses=1]
 	store %f4 %R, %f4* %S
 	ret void
 }
@@ -38,7 +38,7 @@
 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
 	%p = load %f8* %P		; <%f8> [#uses=1]
 	%q = load %f8* %Q		; <%f8> [#uses=1]
-	%R = add %f8 %p, %q		; <%f8> [#uses=1]
+	%R = fadd %f8 %p, %q		; <%f8> [#uses=1]
 	store %f8 %R, %f8* %S
 	ret void
 }
@@ -46,7 +46,7 @@
 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
 	%p = load %f8* %P		; <%f8> [#uses=1]
 	%q = load %f8* %Q		; <%f8> [#uses=1]
-	%R = mul %f8 %p, %q		; <%f8> [#uses=1]
+	%R = fmul %f8 %p, %q		; <%f8> [#uses=1]
 	store %f8 %R, %f8* %S
 	ret void
 }
@@ -64,21 +64,21 @@
 
 define void @test_cst(%f4* %P, %f4* %S) {
 	%p = load %f4* %P		; <%f4> [#uses=1]
-	%R = add %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float 2.000000e+00, float 4.500000e+00 >		; <%f4> [#uses=1]
+	%R = fadd %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float 2.000000e+00, float 4.500000e+00 >		; <%f4> [#uses=1]
 	store %f4 %R, %f4* %S
 	ret void
 }
 
 define void @test_zero(%f4* %P, %f4* %S) {
 	%p = load %f4* %P		; <%f4> [#uses=1]
-	%R = add %f4 %p, zeroinitializer		; <%f4> [#uses=1]
+	%R = fadd %f4 %p, zeroinitializer		; <%f4> [#uses=1]
 	store %f4 %R, %f4* %S
 	ret void
 }
 
 define void @test_undef(%f4* %P, %f4* %S) {
 	%p = load %f4* %P		; <%f4> [#uses=1]
-	%R = add %f4 %p, undef		; <%f4> [#uses=1]
+	%R = fadd %f4 %p, undef		; <%f4> [#uses=1]
 	store %f4 %R, %f4* %S
 	ret void
 }
@@ -115,7 +115,7 @@
 
 define void @test_cast_1(%f4* %b, %i4* %a) {
 	%tmp = load %f4* %b		; <%f4> [#uses=1]
-	%tmp2 = add %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >		; <%f4> [#uses=1]
+	%tmp2 = fadd %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >		; <%f4> [#uses=1]
 	%tmp3 = bitcast %f4 %tmp2 to %i4		; <%i4> [#uses=1]
 	%tmp4 = add %i4 %tmp3, < i32 1, i32 2, i32 3, i32 4 >		; <%i4> [#uses=1]
 	store %i4 %tmp4, %i4* %a
@@ -137,7 +137,7 @@
 	%tmp4 = insertelement %f4 %tmp2, float %X, i32 2		; <%f4> [#uses=1]
 	%tmp6 = insertelement %f4 %tmp4, float %X, i32 3		; <%f4> [#uses=1]
 	%q = load %f4* %Q		; <%f4> [#uses=1]
-	%R = add %f4 %q, %tmp6		; <%f4> [#uses=1]
+	%R = fadd %f4 %q, %tmp6		; <%f4> [#uses=1]
 	store %f4 %R, %f4* %P
 	ret void
 }
diff --git a/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll b/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll
index 20050e9..70f1d99 100644
--- a/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll
+++ b/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll
@@ -2,7 +2,7 @@
 
 define i16 @test(double %d) nounwind {
 entry:
-        %add = add double %d, 1.000000e+00
+        %add = fadd double %d, 1.000000e+00
         %call = tail call i16 @funct(double %add) nounwind
         ret i16 %call
 }
diff --git a/test/CodeGen/Mips/2008-07-06-fadd64.ll b/test/CodeGen/Mips/2008-07-06-fadd64.ll
index 95792ff..f8eca85 100644
--- a/test/CodeGen/Mips/2008-07-06-fadd64.ll
+++ b/test/CodeGen/Mips/2008-07-06-fadd64.ll
@@ -5,6 +5,6 @@
 
 define double @dofloat(double %a, double %b) nounwind {
 entry:
-	add double %a, %b		; <double>:0 [#uses=1]
+	fadd double %a, %b		; <double>:0 [#uses=1]
 	ret double %0
 }
diff --git a/test/CodeGen/Mips/2008-07-22-Cstpool.ll b/test/CodeGen/Mips/2008-07-22-Cstpool.ll
index 99eccf5..2af7ab1 100644
--- a/test/CodeGen/Mips/2008-07-22-Cstpool.ll
+++ b/test/CodeGen/Mips/2008-07-22-Cstpool.ll
@@ -6,7 +6,7 @@
 
 define float @F(float %a) nounwind {
 entry:
-	add float %a, 0x4011333340000000		; <float>:0 [#uses=1]
-	add float %0, 0x4010666660000000		; <float>:1 [#uses=1]
+	fadd float %a, 0x4011333340000000		; <float>:0 [#uses=1]
+	fadd float %0, 0x4010666660000000		; <float>:1 [#uses=1]
 	ret float %1
 }
diff --git a/test/CodeGen/Mips/2008-07-23-fpcmp.ll b/test/CodeGen/Mips/2008-07-23-fpcmp.ll
index 7bc1f42..4580215 100644
--- a/test/CodeGen/Mips/2008-07-23-fpcmp.ll
+++ b/test/CodeGen/Mips/2008-07-23-fpcmp.ll
@@ -11,7 +11,7 @@
 	br i1 %0, label %bb, label %bb2
 
 bb:		; preds = %entry
-	add float %a, 1.000000e+00		; <float>:1 [#uses=1]
+	fadd float %a, 1.000000e+00		; <float>:1 [#uses=1]
 	ret float %1
 
 bb2:		; preds = %entry
diff --git a/test/CodeGen/Mips/2008-08-03-fabs64.ll b/test/CodeGen/Mips/2008-08-03-fabs64.ll
index 8495bfe..9d18f47 100644
--- a/test/CodeGen/Mips/2008-08-03-fabs64.ll
+++ b/test/CodeGen/Mips/2008-08-03-fabs64.ll
@@ -9,7 +9,7 @@
 entry:
 	tail call double @fabs( double %c ) nounwind readnone 		; <double>:0 [#uses=1]
 	tail call double @fabs( double %d ) nounwind readnone 		; <double>:0 [#uses=1]
-  add double %0, %1
+  fadd double %0, %1
   ret double %2
 }
 
diff --git a/test/CodeGen/Mips/2008-11-10-xint_to_fp.ll b/test/CodeGen/Mips/2008-11-10-xint_to_fp.ll
index c9ee2cf..1f7440a 100644
--- a/test/CodeGen/Mips/2008-11-10-xint_to_fp.ll
+++ b/test/CodeGen/Mips/2008-11-10-xint_to_fp.ll
@@ -21,12 +21,12 @@
 	load i16* %3, align 2		; <i16>:4 [#uses=1]
 	uitofp i16 %4 to double		; <double>:5 [#uses=1]
 	tail call double @ldexp( double %5, i32 -32 ) nounwind		; <double>:6 [#uses=1]
-	add double %2, %6		; <double>:7 [#uses=1]
+	fadd double %2, %6		; <double>:7 [#uses=1]
 	getelementptr i16* %xseed, i32 2		; <i16*>:8 [#uses=1]
 	load i16* %8, align 2		; <i16>:9 [#uses=1]
 	uitofp i16 %9 to double		; <double>:10 [#uses=1]
 	tail call double @ldexp( double %10, i32 -16 ) nounwind		; <double>:11 [#uses=1]
-	add double %7, %11		; <double>:12 [#uses=1]
+	fadd double %7, %11		; <double>:12 [#uses=1]
 	ret double %12
 }
 
@@ -45,11 +45,11 @@
 	load i16* %4, align 2		; <i16>:5 [#uses=1]
 	uitofp i16 %5 to double		; <double>:6 [#uses=1]
 	tail call double @ldexp( double %6, i32 -32 ) nounwind		; <double>:7 [#uses=1]
-	add double %3, %7		; <double>:8 [#uses=1]
+	fadd double %3, %7		; <double>:8 [#uses=1]
 	getelementptr i16* %xseed, i32 2		; <i16*>:9 [#uses=1]
 	load i16* %9, align 2		; <i16>:10 [#uses=1]
 	uitofp i16 %10 to double		; <double>:11 [#uses=1]
 	tail call double @ldexp( double %11, i32 -16 ) nounwind		; <double>:12 [#uses=1]
-	add double %8, %12		; <double>:13 [#uses=1]
+	fadd double %8, %12		; <double>:13 [#uses=1]
 	ret double %13
 }
diff --git a/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
index e2f06f5..1b3bde8 100644
--- a/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
+++ b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
@@ -5,6 +5,6 @@
 
 ; Dead argument should reserve an FP register.
 define double @bar(double %DEAD, double %X, double %Y) {
-        %tmp.2 = add double %X, %Y              ; <double> [#uses=1]
+        %tmp.2 = fadd double %X, %Y              ; <double> [#uses=1]
         ret double %tmp.2
 }
diff --git a/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll
index a58cd16..7a65c00 100644
--- a/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll
+++ b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll
@@ -9,15 +9,15 @@
 entry:
         %tmp = getelementptr %struct.Point* %pt, i32 0, i32 0           ; <double*> [#uses=2]
         %tmp.upgrd.1 = load double* %tmp                ; <double> [#uses=1]
-        %tmp2 = add double %tmp.upgrd.1, %x             ; <double> [#uses=1]
+        %tmp2 = fadd double %tmp.upgrd.1, %x             ; <double> [#uses=1]
         store double %tmp2, double* %tmp
         %tmp6 = getelementptr %struct.Point* %pt, i32 0, i32 1          ; <double*> [#uses=2]
         %tmp7 = load double* %tmp6              ; <double> [#uses=1]
-        %tmp9 = add double %tmp7, %y            ; <double> [#uses=1]
+        %tmp9 = fadd double %tmp7, %y            ; <double> [#uses=1]
         store double %tmp9, double* %tmp6
         %tmp13 = getelementptr %struct.Point* %pt, i32 0, i32 2         ; <double*> [#uses=2]
         %tmp14 = load double* %tmp13            ; <double> [#uses=1]
-        %tmp16 = add double %tmp14, %z          ; <double> [#uses=1]
+        %tmp16 = fadd double %tmp14, %z          ; <double> [#uses=1]
         store double %tmp16, double* %tmp13
         ret void
 }
diff --git a/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll
index 04ca3bb..637208b 100644
--- a/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll
+++ b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll
@@ -604,10 +604,10 @@
 	shufflevector <4 x float> %583, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 >		; <<4 x float>>:589 [#uses=1]
 	shufflevector <4 x float> %585, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 >		; <<4 x float>>:590 [#uses=1]
 	shufflevector <4 x float> %588, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 >		; <<4 x float>>:591 [#uses=1]
-	mul <4 x float> zeroinitializer, %589		; <<4 x float>>:592 [#uses=0]
-	mul <4 x float> zeroinitializer, %590		; <<4 x float>>:593 [#uses=0]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:594 [#uses=1]
-	mul <4 x float> zeroinitializer, %591		; <<4 x float>>:595 [#uses=0]
+	fmul <4 x float> zeroinitializer, %589		; <<4 x float>>:592 [#uses=0]
+	fmul <4 x float> zeroinitializer, %590		; <<4 x float>>:593 [#uses=0]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:594 [#uses=1]
+	fmul <4 x float> zeroinitializer, %591		; <<4 x float>>:595 [#uses=0]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0		; <<4 x float>*>:596 [#uses=2]
 	load <4 x float>* %596		; <<4 x float>>:597 [#uses=0]
 	store <4 x float> zeroinitializer, <4 x float>* %596
@@ -621,8 +621,8 @@
 	load <4 x float>* null		; <<4 x float>>:604 [#uses=1]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2		; <<4 x float>*>:605 [#uses=1]
 	load <4 x float>* %605		; <<4 x float>>:606 [#uses=1]
-	sub <4 x float> zeroinitializer, %604		; <<4 x float>>:607 [#uses=2]
-	sub <4 x float> zeroinitializer, %606		; <<4 x float>>:608 [#uses=2]
+	fsub <4 x float> zeroinitializer, %604		; <<4 x float>>:607 [#uses=2]
+	fsub <4 x float> zeroinitializer, %606		; <<4 x float>>:608 [#uses=2]
 	call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer )		; <i32>:609 [#uses=0]
 	br i1 false, label %617, label %610
 
@@ -672,21 +672,21 @@
 	load <4 x float>* null		; <<4 x float>>:638 [#uses=2]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2		; <<4 x float>*>:639 [#uses=0]
 	load <4 x float>* null		; <<4 x float>>:640 [#uses=2]
-	mul <4 x float> %638, %638		; <<4 x float>>:641 [#uses=1]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:642 [#uses=0]
-	mul <4 x float> %640, %640		; <<4 x float>>:643 [#uses=2]
+	fmul <4 x float> %638, %638		; <<4 x float>>:641 [#uses=1]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:642 [#uses=0]
+	fmul <4 x float> %640, %640		; <<4 x float>>:643 [#uses=2]
 	shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >		; <<4 x float>>:644 [#uses=0]
 	shufflevector <4 x float> %643, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >		; <<4 x float>>:645 [#uses=1]
-	add <4 x float> %645, %643		; <<4 x float>>:646 [#uses=0]
+	fadd <4 x float> %645, %643		; <<4 x float>>:646 [#uses=0]
 	shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 >		; <<4 x float>>:647 [#uses=1]
 	shufflevector <4 x float> %641, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 >		; <<4 x float>>:648 [#uses=1]
-	add <4 x float> zeroinitializer, %647		; <<4 x float>>:649 [#uses=2]
-	add <4 x float> zeroinitializer, %648		; <<4 x float>>:650 [#uses=0]
-	add <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:651 [#uses=2]
+	fadd <4 x float> zeroinitializer, %647		; <<4 x float>>:649 [#uses=2]
+	fadd <4 x float> zeroinitializer, %648		; <<4 x float>>:650 [#uses=0]
+	fadd <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:651 [#uses=2]
 	call <4 x float> @llvm.ppc.altivec.vrsqrtefp( <4 x float> %649 )		; <<4 x float>>:652 [#uses=1]
-	mul <4 x float> %652, %649		; <<4 x float>>:653 [#uses=1]
+	fmul <4 x float> %652, %649		; <<4 x float>>:653 [#uses=1]
 	call <4 x float> @llvm.ppc.altivec.vrsqrtefp( <4 x float> %651 )		; <<4 x float>>:654 [#uses=1]
-	mul <4 x float> %654, %651		; <<4 x float>>:655 [#uses=0]
+	fmul <4 x float> %654, %651		; <<4 x float>>:655 [#uses=0]
 	icmp eq i32 0, 0		; <i1>:656 [#uses=1]
 	br i1 %656, label %665, label %657
 
@@ -721,9 +721,9 @@
 	load <4 x float>* null		; <<4 x float>>:676 [#uses=0]
 	shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:677 [#uses=1]
 	shufflevector <4 x float> %675, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:678 [#uses=1]
-	mul <4 x float> zeroinitializer, %677		; <<4 x float>>:679 [#uses=0]
-	mul <4 x float> zeroinitializer, %678		; <<4 x float>>:680 [#uses=0]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:681 [#uses=1]
+	fmul <4 x float> zeroinitializer, %677		; <<4 x float>>:679 [#uses=0]
+	fmul <4 x float> zeroinitializer, %678		; <<4 x float>>:680 [#uses=0]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:681 [#uses=1]
 	icmp eq i32 0, 0		; <i1>:682 [#uses=1]
 	br i1 %682, label %689, label %683
 
@@ -750,7 +750,7 @@
 	load <4 x float>* null		; <<4 x float>>:698 [#uses=0]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2		; <<4 x float>*>:699 [#uses=0]
 	shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:700 [#uses=1]
-	add <4 x float> zeroinitializer, %700		; <<4 x float>>:701 [#uses=0]
+	fadd <4 x float> zeroinitializer, %700		; <<4 x float>>:701 [#uses=0]
 	load <4 x i32>* %.sub7896		; <<4 x i32>>:702 [#uses=1]
 	call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %702, <4 x i32> zeroinitializer )		; <i32>:703 [#uses=0]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1		; <<4 x float>*>:704 [#uses=2]
@@ -769,7 +769,7 @@
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2		; <<4 x float>*>:714 [#uses=1]
 	load <4 x float>* %714		; <<4 x float>>:715 [#uses=0]
 	shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:716 [#uses=0]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:717 [#uses=1]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:717 [#uses=1]
 	load <4 x i32>* %.sub7896		; <<4 x i32>>:718 [#uses=0]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 0		; <<4 x float>*>:719 [#uses=1]
 	store <4 x float> zeroinitializer, <4 x float>* %719
@@ -791,10 +791,10 @@
 	load <4 x float>* %732		; <<4 x float>>:733 [#uses=0]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3		; <<4 x float>*>:734 [#uses=0]
 	shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:735 [#uses=1]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:736 [#uses=1]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:737 [#uses=1]
-	mul <4 x float> zeroinitializer, %735		; <<4 x float>>:738 [#uses=1]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:739 [#uses=1]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:736 [#uses=1]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:737 [#uses=1]
+	fmul <4 x float> zeroinitializer, %735		; <<4 x float>>:738 [#uses=1]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:739 [#uses=1]
 	call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer )		; <i32>:740 [#uses=1]
 	icmp eq i32 %740, 0		; <i1>:741 [#uses=0]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0		; <<4 x float>*>:742 [#uses=2]
@@ -821,9 +821,9 @@
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3		; <<4 x float>*>:761 [#uses=0]
 	shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:762 [#uses=0]
 	shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:763 [#uses=1]
-	add <4 x float> %757, zeroinitializer		; <<4 x float>>:764 [#uses=0]
-	add <4 x float> %758, %763		; <<4 x float>>:765 [#uses=0]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:766 [#uses=1]
+	fadd <4 x float> %757, zeroinitializer		; <<4 x float>>:764 [#uses=0]
+	fadd <4 x float> %758, %763		; <<4 x float>>:765 [#uses=0]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:766 [#uses=1]
 	br i1 false, label %773, label %767
 
 ; <label>:767		; preds = %xST.exit405
@@ -841,7 +841,7 @@
 xST.exit422:		; preds = %773, %767
 	%.07267 = phi <4 x float> [ %766, %767 ], [ undef, %773 ]		; <<4 x float>> [#uses=0]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3		; <<4 x float>*>:774 [#uses=0]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:775 [#uses=0]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:775 [#uses=0]
 	icmp eq i32 0, 0		; <i1>:776 [#uses=1]
 	br i1 %776, label %780, label %777
 
@@ -1295,7 +1295,7 @@
 	%.07489 = phi <4 x float> [ %1002, %1005 ], [ %.17490, %1027 ], [ %.17490, %1025 ]		; <<4 x float>> [#uses=1]
 	load <4 x float>* null		; <<4 x float>>:1029 [#uses=0]
 	load <4 x float>* null		; <<4 x float>>:1030 [#uses=0]
-	sub <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1031 [#uses=1]
+	fsub <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1031 [#uses=1]
 	br i1 false, label %1037, label %1032
 
 ; <label>:1032		; preds = %xST.exit469
@@ -1368,8 +1368,8 @@
 
 xST.exit474:		; preds = %1059, %1058, %1051
 	load <4 x float>* null		; <<4 x float>>:1060 [#uses=1]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1061 [#uses=1]
-	mul <4 x float> %1060, zeroinitializer		; <<4 x float>>:1062 [#uses=2]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1061 [#uses=1]
+	fmul <4 x float> %1060, zeroinitializer		; <<4 x float>>:1062 [#uses=2]
 	br i1 false, label %1065, label %1063
 
 ; <label>:1063		; preds = %xST.exit474
@@ -1556,8 +1556,8 @@
 
 xST.exit492:		; preds = %1118, %1117, %1110
 	load <4 x float>* null		; <<4 x float>>:1119 [#uses=1]
-	mul <4 x float> %1119, zeroinitializer		; <<4 x float>>:1120 [#uses=1]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1121 [#uses=1]
+	fmul <4 x float> %1119, zeroinitializer		; <<4 x float>>:1120 [#uses=1]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1121 [#uses=1]
 	br i1 false, label %1123, label %1122
 
 ; <label>:1122		; preds = %xST.exit492
@@ -1591,8 +1591,8 @@
 	%.07582 = phi <4 x float> [ %1121, %1122 ], [ %.17583, %1130 ], [ %.17583, %1129 ]		; <<4 x float>> [#uses=1]
 	%.07590 = phi <4 x float> [ %1120, %1122 ], [ %.17591, %1130 ], [ %.17591, %1129 ]		; <<4 x float>> [#uses=1]
 	load <4 x float>* null		; <<4 x float>>:1131 [#uses=1]
-	add <4 x float> %1131, zeroinitializer		; <<4 x float>>:1132 [#uses=1]
-	add <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1133 [#uses=1]
+	fadd <4 x float> %1131, zeroinitializer		; <<4 x float>>:1132 [#uses=1]
+	fadd <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1133 [#uses=1]
 	br i1 false, label %1135, label %1134
 
 ; <label>:1134		; preds = %xST.exit495
@@ -1633,10 +1633,10 @@
 	shufflevector <4 x float> %1143, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:1148 [#uses=1]
 	shufflevector <4 x float> %1145, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:1149 [#uses=1]
 	shufflevector <4 x float> %1147, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:1150 [#uses=1]
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1151 [#uses=1]
-	mul <4 x float> zeroinitializer, %1148		; <<4 x float>>:1152 [#uses=1]
-	mul <4 x float> zeroinitializer, %1149		; <<4 x float>>:1153 [#uses=1]
-	mul <4 x float> zeroinitializer, %1150		; <<4 x float>>:1154 [#uses=1]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1151 [#uses=1]
+	fmul <4 x float> zeroinitializer, %1148		; <<4 x float>>:1152 [#uses=1]
+	fmul <4 x float> zeroinitializer, %1149		; <<4 x float>>:1153 [#uses=1]
+	fmul <4 x float> zeroinitializer, %1150		; <<4 x float>>:1154 [#uses=1]
 	br i1 false, label %1156, label %1155
 
 ; <label>:1155		; preds = %xST.exit498
@@ -1676,10 +1676,10 @@
 	load <4 x float>* %1165		; <<4 x float>>:1166 [#uses=1]
 	getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3		; <<4 x float>*>:1167 [#uses=1]
 	load <4 x float>* %1167		; <<4 x float>>:1168 [#uses=1]
-	add <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1169 [#uses=1]
-	add <4 x float> zeroinitializer, %1164		; <<4 x float>>:1170 [#uses=1]
-	add <4 x float> zeroinitializer, %1166		; <<4 x float>>:1171 [#uses=1]
-	add <4 x float> zeroinitializer, %1168		; <<4 x float>>:1172 [#uses=1]
+	fadd <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1169 [#uses=1]
+	fadd <4 x float> zeroinitializer, %1164		; <<4 x float>>:1170 [#uses=1]
+	fadd <4 x float> zeroinitializer, %1166		; <<4 x float>>:1171 [#uses=1]
+	fadd <4 x float> zeroinitializer, %1168		; <<4 x float>>:1172 [#uses=1]
 	br i1 false, label %1174, label %1173
 
 ; <label>:1173		; preds = %xST.exit501
@@ -1714,7 +1714,7 @@
 	%.07726 = phi <4 x float> [ %1171, %1173 ], [ %.17727, %1181 ], [ %.17727, %1180 ]		; <<4 x float>> [#uses=1]
 	%.07730 = phi <4 x float> [ %1170, %1173 ], [ %.17731, %1181 ], [ %.17731, %1180 ]		; <<4 x float>> [#uses=1]
 	%.07734 = phi <4 x float> [ %1169, %1173 ], [ %.17735, %1181 ], [ %.17735, %1180 ]		; <<4 x float>> [#uses=1]
-	add <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1182 [#uses=1]
+	fadd <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:1182 [#uses=1]
 	br i1 false, label %1184, label %1183
 
 ; <label>:1183		; preds = %xST.exit504
diff --git a/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll b/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll
index 5cccd31..aca0faa 100644
--- a/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll
+++ b/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll
@@ -9,8 +9,8 @@
         %input2 = load <4 x float>* null, align 16               ; <<4 x float>>
        	%shuffle7 = shufflevector <4 x float> %input2, <4 x float> < float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 2, i32 2, i32 2, i32 2 >		; <<4 x float>> [#uses=1]
 
-        %mul1 = mul <4 x float> %shuffle7, zeroinitializer              ; <<4 x
-        %add2 = add <4 x float> %mul1, %input2          ; <<4 x float>>
+        %mul1 = fmul <4 x float> %shuffle7, zeroinitializer              ; <<4 x
+        %add2 = fadd <4 x float> %mul1, %input2          ; <<4 x float>>
         store <4 x float> %add2, <4 x float>* null, align 16
         ret void
 }
diff --git a/test/CodeGen/PowerPC/2008-07-15-Fabs.ll b/test/CodeGen/PowerPC/2008-07-15-Fabs.ll
index 7d86434..f55ffac 100644
--- a/test/CodeGen/PowerPC/2008-07-15-Fabs.ll
+++ b/test/CodeGen/PowerPC/2008-07-15-Fabs.ll
@@ -7,11 +7,11 @@
 	call ppc_fp128 @fabsl( ppc_fp128 %d ) nounwind readnone 		; <ppc_fp128>:0 [#uses=1]
 	fcmp olt ppc_fp128 0xM00000000000000000000000000000000, %0		; <i1>:1 [#uses=1]
 	%.pn106 = select i1 %1, ppc_fp128 %a, ppc_fp128 0xM00000000000000000000000000000000		; <ppc_fp128> [#uses=1]
-	%.pn = sub ppc_fp128 0xM00000000000000000000000000000000, %.pn106		; <ppc_fp128> [#uses=1]
+	%.pn = fsub ppc_fp128 0xM00000000000000000000000000000000, %.pn106		; <ppc_fp128> [#uses=1]
 	%y.0 = fdiv ppc_fp128 %.pn, 0xM00000000000000000000000000000000		; <ppc_fp128> [#uses=1]
-	mul ppc_fp128 %y.0, 0xM3FF00000000000000000000000000000		; <ppc_fp128>:2 [#uses=1]
-	add ppc_fp128 %2, mul (ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128 0xM00000000000000000000000000000000)		; <ppc_fp128>:3 [#uses=1]
-	%tmpi = add ppc_fp128 %3, 0xM00000000000000000000000000000000		; <ppc_fp128> [#uses=1]
+	fmul ppc_fp128 %y.0, 0xM3FF00000000000000000000000000000		; <ppc_fp128>:2 [#uses=1]
+	fadd ppc_fp128 %2, fmul (ppc_fp128 0xM00000000000000000000000000000000, ppc_fp128 0xM00000000000000000000000000000000)		; <ppc_fp128>:3 [#uses=1]
+	%tmpi = fadd ppc_fp128 %3, 0xM00000000000000000000000000000000		; <ppc_fp128> [#uses=1]
 	store ppc_fp128 %tmpi, ppc_fp128* null, align 16
 	ret i256 0
 }
diff --git a/test/CodeGen/PowerPC/2008-07-17-Fneg.ll b/test/CodeGen/PowerPC/2008-07-17-Fneg.ll
index 54bb4b3..a7f8181 100644
--- a/test/CodeGen/PowerPC/2008-07-17-Fneg.ll
+++ b/test/CodeGen/PowerPC/2008-07-17-Fneg.ll
@@ -7,7 +7,7 @@
 	br i1 false, label %bb3, label %bb4
 
 bb3:		; preds = %entry
-	sub ppc_fp128 0xM80000000000000000000000000000000, 0xM00000000000000000000000000000000		; <ppc_fp128>:0 [#uses=1]
+	fsub ppc_fp128 0xM80000000000000000000000000000000, 0xM00000000000000000000000000000000		; <ppc_fp128>:0 [#uses=1]
 	fptoui ppc_fp128 %0 to i32		; <i32>:1 [#uses=1]
 	zext i32 %1 to i64		; <i64>:2 [#uses=1]
 	sub i64 0, %2		; <i64>:3 [#uses=1]
diff --git a/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll b/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll
index c181b1c..b625ceb 100644
--- a/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll
+++ b/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll
@@ -29,10 +29,10 @@
 	%10 = load float* %9, align 4		; <float> [#uses=1]
 	%11 = getelementptr float* null, i32 3		; <float*> [#uses=1]
 	%12 = load float* %11, align 4		; <float> [#uses=1]
-	%13 = mul float %10, 6.553500e+04		; <float> [#uses=1]
-	%14 = add float %13, 5.000000e-01		; <float> [#uses=1]
-	%15 = mul float %12, 6.553500e+04		; <float> [#uses=1]
-	%16 = add float %15, 5.000000e-01		; <float> [#uses=3]
+	%13 = fmul float %10, 6.553500e+04		; <float> [#uses=1]
+	%14 = fadd float %13, 5.000000e-01		; <float> [#uses=1]
+	%15 = fmul float %12, 6.553500e+04		; <float> [#uses=1]
+	%16 = fadd float %15, 5.000000e-01		; <float> [#uses=3]
 	%17 = fcmp olt float %14, 0.000000e+00		; <i1> [#uses=0]
 	%18 = fcmp olt float %16, 0.000000e+00		; <i1> [#uses=1]
 	br i1 %18, label %bb2265, label %bb2262
@@ -68,10 +68,10 @@
 	%37 = load float* %36, align 4		; <float> [#uses=1]
 	%38 = getelementptr float* %36, i32 1		; <float*> [#uses=1]
 	%39 = load float* %38, align 4		; <float> [#uses=1]
-	%40 = mul float %37, 6.553500e+04		; <float> [#uses=1]
-	%41 = add float %40, 5.000000e-01		; <float> [#uses=1]
-	%42 = mul float %39, 6.553500e+04		; <float> [#uses=1]
-	%43 = add float %42, 5.000000e-01		; <float> [#uses=3]
+	%40 = fmul float %37, 6.553500e+04		; <float> [#uses=1]
+	%41 = fadd float %40, 5.000000e-01		; <float> [#uses=1]
+	%42 = fmul float %39, 6.553500e+04		; <float> [#uses=1]
+	%43 = fadd float %42, 5.000000e-01		; <float> [#uses=3]
 	%44 = fcmp olt float %41, 0.000000e+00		; <i1> [#uses=0]
 	%45 = fcmp olt float %43, 0.000000e+00		; <i1> [#uses=1]
 	br i1 %45, label %bb2277, label %bb2274
@@ -88,10 +88,10 @@
 	%50 = load float* %49, align 4		; <float> [#uses=1]
 	%51 = getelementptr float* %36, i32 3		; <float*> [#uses=1]
 	%52 = load float* %51, align 4		; <float> [#uses=1]
-	%53 = mul float %50, 6.553500e+04		; <float> [#uses=1]
-	%54 = add float %53, 5.000000e-01		; <float> [#uses=1]
-	%55 = mul float %52, 6.553500e+04		; <float> [#uses=1]
-	%56 = add float %55, 5.000000e-01		; <float> [#uses=1]
+	%53 = fmul float %50, 6.553500e+04		; <float> [#uses=1]
+	%54 = fadd float %53, 5.000000e-01		; <float> [#uses=1]
+	%55 = fmul float %52, 6.553500e+04		; <float> [#uses=1]
+	%56 = fadd float %55, 5.000000e-01		; <float> [#uses=1]
 	%57 = fcmp olt float %54, 0.000000e+00		; <i1> [#uses=0]
 	%58 = fcmp olt float %56, 0.000000e+00		; <i1> [#uses=0]
 	%59 = fptosi float 0.000000e+00 to i32		; <i32> [#uses=1]
@@ -111,10 +111,10 @@
 	%73 = load float* %72, align 4		; <float> [#uses=1]
 	%74 = getelementptr float* %72, i32 1		; <float*> [#uses=1]
 	%75 = load float* %74, align 4		; <float> [#uses=1]
-	%76 = mul float %73, 6.553500e+04		; <float> [#uses=1]
-	%77 = add float %76, 5.000000e-01		; <float> [#uses=3]
-	%78 = mul float %75, 6.553500e+04		; <float> [#uses=1]
-	%79 = add float %78, 5.000000e-01		; <float> [#uses=1]
+	%76 = fmul float %73, 6.553500e+04		; <float> [#uses=1]
+	%77 = fadd float %76, 5.000000e-01		; <float> [#uses=3]
+	%78 = fmul float %75, 6.553500e+04		; <float> [#uses=1]
+	%79 = fadd float %78, 5.000000e-01		; <float> [#uses=1]
 	%80 = fcmp olt float %77, 0.000000e+00		; <i1> [#uses=1]
 	br i1 %80, label %bb2295, label %bb2292
 
@@ -134,10 +134,10 @@
 	%86 = load float* %85, align 4		; <float> [#uses=1]
 	%87 = getelementptr float* %72, i32 3		; <float*> [#uses=1]
 	%88 = load float* %87, align 4		; <float> [#uses=1]
-	%89 = mul float %86, 6.553500e+04		; <float> [#uses=1]
-	%90 = add float %89, 5.000000e-01		; <float> [#uses=1]
-	%91 = mul float %88, 6.553500e+04		; <float> [#uses=1]
-	%92 = add float %91, 5.000000e-01		; <float> [#uses=1]
+	%89 = fmul float %86, 6.553500e+04		; <float> [#uses=1]
+	%90 = fadd float %89, 5.000000e-01		; <float> [#uses=1]
+	%91 = fmul float %88, 6.553500e+04		; <float> [#uses=1]
+	%92 = fadd float %91, 5.000000e-01		; <float> [#uses=1]
 	%93 = fcmp olt float %90, 0.000000e+00		; <i1> [#uses=0]
 	%94 = fcmp olt float %92, 0.000000e+00		; <i1> [#uses=0]
 	%95 = fptosi float 0.000000e+00 to i32		; <i32> [#uses=1]
diff --git a/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll b/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
index 0283082..c760b41 100644
--- a/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
+++ b/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll
@@ -3,9 +3,9 @@
 define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
 entry:
         %imag59 = load ppc_fp128* null, align 8         ; <ppc_fp128> [#uses=1]
-        %0 = mul ppc_fp128 0xM00000000000000000000000000000000, %imag59         ; <ppc_fp128> [#uses=1]
-        %1 = mul ppc_fp128 0xM00000000000000000000000000000000, 0xM00000000000000000000000000000000             ; <ppc_fp128> [#uses=1]
-        %2 = add ppc_fp128 %0, %1               ; <ppc_fp128> [#uses=1]
+        %0 = fmul ppc_fp128 0xM00000000000000000000000000000000, %imag59         ; <ppc_fp128> [#uses=1]
+        %1 = fmul ppc_fp128 0xM00000000000000000000000000000000, 0xM00000000000000000000000000000000             ; <ppc_fp128> [#uses=1]
+        %2 = fadd ppc_fp128 %0, %1               ; <ppc_fp128> [#uses=1]
         store ppc_fp128 %2, ppc_fp128* null, align 16
         unreachable
 }
diff --git a/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll b/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
index 4db5773..071c788 100644
--- a/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
+++ b/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
@@ -6,17 +6,17 @@
 	br i1 %0, label %bb5, label %bb1
 
 bb1:		; preds = %entry
-	%1 = mul ppc_fp128 %a, 0xM3DF00000000000000000000000000000		; <ppc_fp128> [#uses=1]
+	%1 = fmul ppc_fp128 %a, 0xM3DF00000000000000000000000000000		; <ppc_fp128> [#uses=1]
 	%2 = fptoui ppc_fp128 %1 to i32		; <i32> [#uses=1]
 	%3 = zext i32 %2 to i64		; <i64> [#uses=1]
 	%4 = shl i64 %3, 32		; <i64> [#uses=3]
 	%5 = uitofp i64 %4 to ppc_fp128		; <ppc_fp128> [#uses=1]
-	%6 = sub ppc_fp128 %a, %5		; <ppc_fp128> [#uses=3]
+	%6 = fsub ppc_fp128 %a, %5		; <ppc_fp128> [#uses=3]
 	%7 = fcmp olt ppc_fp128 %6, 0xM00000000000000000000000000000000		; <i1> [#uses=1]
 	br i1 %7, label %bb2, label %bb3
 
 bb2:		; preds = %bb1
-	%8 = sub ppc_fp128 0xM80000000000000000000000000000000, %6		; <ppc_fp128> [#uses=1]
+	%8 = fsub ppc_fp128 0xM80000000000000000000000000000000, %6		; <ppc_fp128> [#uses=1]
 	%9 = fptoui ppc_fp128 %8 to i32		; <i32> [#uses=1]
 	%10 = zext i32 %9 to i64		; <i64> [#uses=1]
 	%11 = sub i64 %4, %10		; <i64> [#uses=1]
diff --git a/test/CodeGen/PowerPC/buildvec_canonicalize.ll b/test/CodeGen/PowerPC/buildvec_canonicalize.ll
index 66428c7..20ff3db 100644
--- a/test/CodeGen/PowerPC/buildvec_canonicalize.ll
+++ b/test/CodeGen/PowerPC/buildvec_canonicalize.ll
@@ -11,7 +11,7 @@
 define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) {
         %tmp = load <4 x float>* %P3            ; <<4 x float>> [#uses=1]
         %tmp3 = load <4 x float>* %P1           ; <<4 x float>> [#uses=1]
-        %tmp4 = mul <4 x float> %tmp, %tmp3             ; <<4 x float>> [#uses=1]
+        %tmp4 = fmul <4 x float> %tmp, %tmp3             ; <<4 x float>> [#uses=1]
         store <4 x float> %tmp4, <4 x float>* %P3
         store <4 x float> zeroinitializer, <4 x float>* %P1
         store <4 x i32> zeroinitializer, <4 x i32>* %P2
diff --git a/test/CodeGen/PowerPC/fma.ll b/test/CodeGen/PowerPC/fma.ll
index fd9bd74..4a6fe70 100644
--- a/test/CodeGen/PowerPC/fma.ll
+++ b/test/CodeGen/PowerPC/fma.ll
@@ -2,53 +2,53 @@
 ; RUN:   egrep {fn?madd|fn?msub} | count 8
 
 define double @test_FMADD1(double %A, double %B, double %C) {
-	%D = mul double %A, %B		; <double> [#uses=1]
-	%E = add double %D, %C		; <double> [#uses=1]
+	%D = fmul double %A, %B		; <double> [#uses=1]
+	%E = fadd double %D, %C		; <double> [#uses=1]
 	ret double %E
 }
 
 define double @test_FMADD2(double %A, double %B, double %C) {
-	%D = mul double %A, %B		; <double> [#uses=1]
-	%E = add double %D, %C		; <double> [#uses=1]
+	%D = fmul double %A, %B		; <double> [#uses=1]
+	%E = fadd double %D, %C		; <double> [#uses=1]
 	ret double %E
 }
 
 define double @test_FMSUB(double %A, double %B, double %C) {
-	%D = mul double %A, %B		; <double> [#uses=1]
-	%E = sub double %D, %C		; <double> [#uses=1]
+	%D = fmul double %A, %B		; <double> [#uses=1]
+	%E = fsub double %D, %C		; <double> [#uses=1]
 	ret double %E
 }
 
 define double @test_FNMADD1(double %A, double %B, double %C) {
-	%D = mul double %A, %B		; <double> [#uses=1]
-	%E = add double %D, %C		; <double> [#uses=1]
-	%F = sub double -0.000000e+00, %E		; <double> [#uses=1]
+	%D = fmul double %A, %B		; <double> [#uses=1]
+	%E = fadd double %D, %C		; <double> [#uses=1]
+	%F = fsub double -0.000000e+00, %E		; <double> [#uses=1]
 	ret double %F
 }
 
 define double @test_FNMADD2(double %A, double %B, double %C) {
-	%D = mul double %A, %B		; <double> [#uses=1]
-	%E = add double %C, %D		; <double> [#uses=1]
-	%F = sub double -0.000000e+00, %E		; <double> [#uses=1]
+	%D = fmul double %A, %B		; <double> [#uses=1]
+	%E = fadd double %C, %D		; <double> [#uses=1]
+	%F = fsub double -0.000000e+00, %E		; <double> [#uses=1]
 	ret double %F
 }
 
 define double @test_FNMSUB1(double %A, double %B, double %C) {
-	%D = mul double %A, %B		; <double> [#uses=1]
-	%E = sub double %C, %D		; <double> [#uses=1]
+	%D = fmul double %A, %B		; <double> [#uses=1]
+	%E = fsub double %C, %D		; <double> [#uses=1]
 	ret double %E
 }
 
 define double @test_FNMSUB2(double %A, double %B, double %C) {
-	%D = mul double %A, %B		; <double> [#uses=1]
-	%E = sub double %D, %C		; <double> [#uses=1]
-	%F = sub double -0.000000e+00, %E		; <double> [#uses=1]
+	%D = fmul double %A, %B		; <double> [#uses=1]
+	%E = fsub double %D, %C		; <double> [#uses=1]
+	%F = fsub double -0.000000e+00, %E		; <double> [#uses=1]
 	ret double %F
 }
 
 define float @test_FNMSUBS(float %A, float %B, float %C) {
-	%D = mul float %A, %B		; <float> [#uses=1]
-	%E = sub float %D, %C		; <float> [#uses=1]
-	%F = sub float -0.000000e+00, %E		; <float> [#uses=1]
+	%D = fmul float %A, %B		; <float> [#uses=1]
+	%E = fsub float %D, %C		; <float> [#uses=1]
+	%F = fsub float -0.000000e+00, %E		; <float> [#uses=1]
 	ret float %F
 }
diff --git a/test/CodeGen/PowerPC/fnabs.ll b/test/CodeGen/PowerPC/fnabs.ll
index b9517de..6c10dfb 100644
--- a/test/CodeGen/PowerPC/fnabs.ll
+++ b/test/CodeGen/PowerPC/fnabs.ll
@@ -4,7 +4,7 @@
 
 define double @test(double %X) {
         %Y = call double @fabs( double %X )             ; <double> [#uses=1]
-        %Z = sub double -0.000000e+00, %Y               ; <double> [#uses=1]
+        %Z = fsub double -0.000000e+00, %Y               ; <double> [#uses=1]
         ret double %Z
 }
 
diff --git a/test/CodeGen/PowerPC/fneg.ll b/test/CodeGen/PowerPC/fneg.ll
index a4f49f7..9579a74 100644
--- a/test/CodeGen/PowerPC/fneg.ll
+++ b/test/CodeGen/PowerPC/fneg.ll
@@ -2,10 +2,10 @@
 
 define double @test1(double %a, double %b, double %c, double %d) {
 entry:
-        %tmp2 = sub double -0.000000e+00, %c            ; <double> [#uses=1]
-        %tmp4 = mul double %tmp2, %d            ; <double> [#uses=1]
-        %tmp7 = mul double %a, %b               ; <double> [#uses=1]
-        %tmp9 = sub double %tmp7, %tmp4         ; <double> [#uses=1]
+        %tmp2 = fsub double -0.000000e+00, %c            ; <double> [#uses=1]
+        %tmp4 = fmul double %tmp2, %d            ; <double> [#uses=1]
+        %tmp7 = fmul double %a, %b               ; <double> [#uses=1]
+        %tmp9 = fsub double %tmp7, %tmp4         ; <double> [#uses=1]
         ret double %tmp9
 }
 
diff --git a/test/CodeGen/PowerPC/int-fp-conv-1.ll b/test/CodeGen/PowerPC/int-fp-conv-1.ll
index 3d66675..583408c 100644
--- a/test/CodeGen/PowerPC/int-fp-conv-1.ll
+++ b/test/CodeGen/PowerPC/int-fp-conv-1.ll
@@ -3,7 +3,7 @@
 define i64 @__fixunstfdi(ppc_fp128 %a) nounwind  {
 entry:
 	%tmp1213 = uitofp i64 0 to ppc_fp128		; <ppc_fp128> [#uses=1]
-	%tmp15 = sub ppc_fp128 %a, %tmp1213		; <ppc_fp128> [#uses=1]
+	%tmp15 = fsub ppc_fp128 %a, %tmp1213		; <ppc_fp128> [#uses=1]
 	%tmp2829 = fptoui ppc_fp128 %tmp15 to i32		; <i32> [#uses=1]
 	%tmp282930 = zext i32 %tmp2829 to i64		; <i64> [#uses=1]
 	%tmp32 = add i64 %tmp282930, 0		; <i64> [#uses=1]
diff --git a/test/CodeGen/PowerPC/itofp128.ll b/test/CodeGen/PowerPC/itofp128.ll
index 91119e9..4d74511 100644
--- a/test/CodeGen/PowerPC/itofp128.ll
+++ b/test/CodeGen/PowerPC/itofp128.ll
@@ -6,7 +6,7 @@
 define i128 @__fixunstfti(ppc_fp128 %a) nounwind  {
 entry:
         %tmp1213 = uitofp i128 0 to ppc_fp128           ; <ppc_fp128> [#uses=1]
-        %tmp15 = sub ppc_fp128 %a, %tmp1213             ; <ppc_fp128> [#uses=1]
+        %tmp15 = fsub ppc_fp128 %a, %tmp1213             ; <ppc_fp128> [#uses=1]
         %tmp2829 = fptoui ppc_fp128 %tmp15 to i64               ; <i64> [#uses=1]
         %tmp282930 = zext i64 %tmp2829 to i128          ; <i128> [#uses=1]
         %tmp32 = add i128 %tmp282930, 0         ; <i128> [#uses=1]
diff --git a/test/CodeGen/PowerPC/mem-rr-addr-mode.ll b/test/CodeGen/PowerPC/mem-rr-addr-mode.ll
index d5484bd..fd0e1d4 100644
--- a/test/CodeGen/PowerPC/mem-rr-addr-mode.ll
+++ b/test/CodeGen/PowerPC/mem-rr-addr-mode.ll
@@ -9,9 +9,9 @@
         %tmp = load <4 x float>* %tmp1          ; <<4 x float>> [#uses=1]
         %tmp3 = getelementptr <4 x float>* %a, i32 1            ; <<4 x float>*> [#uses=1]
         %tmp4 = load <4 x float>* %tmp3         ; <<4 x float>> [#uses=1]
-        %tmp5 = mul <4 x float> %tmp, %tmp4             ; <<4 x float>> [#uses=1]
+        %tmp5 = fmul <4 x float> %tmp, %tmp4             ; <<4 x float>> [#uses=1]
         %tmp8 = load <4 x float>* %b            ; <<4 x float>> [#uses=1]
-        %tmp9 = add <4 x float> %tmp5, %tmp8            ; <<4 x float>> [#uses=1]
+        %tmp9 = fadd <4 x float> %tmp5, %tmp8            ; <<4 x float>> [#uses=1]
         store <4 x float> %tmp9, <4 x float>* %a
         ret void
 }
diff --git a/test/CodeGen/PowerPC/multiple-return-values.ll b/test/CodeGen/PowerPC/multiple-return-values.ll
index b72b148..3f75f7d 100644
--- a/test/CodeGen/PowerPC/multiple-return-values.ll
+++ b/test/CodeGen/PowerPC/multiple-return-values.ll
@@ -3,7 +3,7 @@
 
 define {i64, float} @bar(i64 %a, float %b) {
         %y = add i64 %a, 7
-        %z = add float %b, 7.0
+        %z = fadd float %b, 7.0
 	ret i64 %y, float %z
 }
 
diff --git a/test/CodeGen/PowerPC/ppcf128-1-opt.ll b/test/CodeGen/PowerPC/ppcf128-1-opt.ll
index 5c059b4..e3c5ab1 100644
--- a/test/CodeGen/PowerPC/ppcf128-1-opt.ll
+++ b/test/CodeGen/PowerPC/ppcf128-1-opt.ll
@@ -5,19 +5,19 @@
 
 define ppc_fp128 @plus(ppc_fp128 %x, ppc_fp128 %y) {
 entry:
-	%tmp3 = add ppc_fp128 %x, %y		; <ppc_fp128> [#uses=1]
+	%tmp3 = fadd ppc_fp128 %x, %y		; <ppc_fp128> [#uses=1]
 	ret ppc_fp128 %tmp3
 }
 
 define ppc_fp128 @minus(ppc_fp128 %x, ppc_fp128 %y) {
 entry:
-	%tmp3 = sub ppc_fp128 %x, %y		; <ppc_fp128> [#uses=1]
+	%tmp3 = fsub ppc_fp128 %x, %y		; <ppc_fp128> [#uses=1]
 	ret ppc_fp128 %tmp3
 }
 
 define ppc_fp128 @times(ppc_fp128 %x, ppc_fp128 %y) {
 entry:
-	%tmp3 = mul ppc_fp128 %x, %y		; <ppc_fp128> [#uses=1]
+	%tmp3 = fmul ppc_fp128 %x, %y		; <ppc_fp128> [#uses=1]
 	ret ppc_fp128 %tmp3
 }
 
diff --git a/test/CodeGen/PowerPC/ppcf128-1.ll b/test/CodeGen/PowerPC/ppcf128-1.ll
index ea8dd37..a487de7 100644
--- a/test/CodeGen/PowerPC/ppcf128-1.ll
+++ b/test/CodeGen/PowerPC/ppcf128-1.ll
@@ -14,7 +14,7 @@
 	store ppc_fp128 %y, ppc_fp128* %y_addr
 	%tmp1 = load ppc_fp128* %x_addr, align 16		; <ppc_fp128> [#uses=1]
 	%tmp2 = load ppc_fp128* %y_addr, align 16		; <ppc_fp128> [#uses=1]
-	%tmp3 = add ppc_fp128 %tmp1, %tmp2		; <ppc_fp128> [#uses=1]
+	%tmp3 = fadd ppc_fp128 %tmp1, %tmp2		; <ppc_fp128> [#uses=1]
 	store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16
 	%tmp4 = load ppc_fp128* %tmp, align 16		; <ppc_fp128> [#uses=1]
 	store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16
@@ -36,7 +36,7 @@
 	store ppc_fp128 %y, ppc_fp128* %y_addr
 	%tmp1 = load ppc_fp128* %x_addr, align 16		; <ppc_fp128> [#uses=1]
 	%tmp2 = load ppc_fp128* %y_addr, align 16		; <ppc_fp128> [#uses=1]
-	%tmp3 = sub ppc_fp128 %tmp1, %tmp2		; <ppc_fp128> [#uses=1]
+	%tmp3 = fsub ppc_fp128 %tmp1, %tmp2		; <ppc_fp128> [#uses=1]
 	store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16
 	%tmp4 = load ppc_fp128* %tmp, align 16		; <ppc_fp128> [#uses=1]
 	store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16
@@ -58,7 +58,7 @@
 	store ppc_fp128 %y, ppc_fp128* %y_addr
 	%tmp1 = load ppc_fp128* %x_addr, align 16		; <ppc_fp128> [#uses=1]
 	%tmp2 = load ppc_fp128* %y_addr, align 16		; <ppc_fp128> [#uses=1]
-	%tmp3 = mul ppc_fp128 %tmp1, %tmp2		; <ppc_fp128> [#uses=1]
+	%tmp3 = fmul ppc_fp128 %tmp1, %tmp2		; <ppc_fp128> [#uses=1]
 	store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16
 	%tmp4 = load ppc_fp128* %tmp, align 16		; <ppc_fp128> [#uses=1]
 	store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16
diff --git a/test/CodeGen/PowerPC/ppcf128-2.ll b/test/CodeGen/PowerPC/ppcf128-2.ll
index b4f61f8..4318226 100644
--- a/test/CodeGen/PowerPC/ppcf128-2.ll
+++ b/test/CodeGen/PowerPC/ppcf128-2.ll
@@ -4,7 +4,7 @@
 entry:
         br i1 false, label %bb, label %bb8
 bb:             ; preds = %entry
-        %tmp5 = sub ppc_fp128 0xM80000000000000000000000000000000, %a           ; <ppc_fp128> [#uses=1]
+        %tmp5 = fsub ppc_fp128 0xM80000000000000000000000000000000, %a           ; <ppc_fp128> [#uses=1]
         %tmp6 = tail call i64 @__fixunstfdi( ppc_fp128 %tmp5 ) nounwind                 ; <i64> [#uses=0]
         ret i64 0
 bb8:            ; preds = %entry
diff --git a/test/CodeGen/PowerPC/ppcf128-4.ll b/test/CodeGen/PowerPC/ppcf128-4.ll
index 8921dfc..16d6178 100644
--- a/test/CodeGen/PowerPC/ppcf128-4.ll
+++ b/test/CodeGen/PowerPC/ppcf128-4.ll
@@ -2,9 +2,9 @@
 
 define ppc_fp128 @__floatditf(i64 %u) nounwind  {
 entry:
-        %tmp6 = mul ppc_fp128 0xM00000000000000000000000000000000, 0xM41F00000000000000000000000000000
+        %tmp6 = fmul ppc_fp128 0xM00000000000000000000000000000000, 0xM41F00000000000000000000000000000
         %tmp78 = trunc i64 %u to i32
         %tmp789 = uitofp i32 %tmp78 to ppc_fp128
-        %tmp11 = add ppc_fp128 %tmp789, %tmp6
+        %tmp11 = fadd ppc_fp128 %tmp789, %tmp6
         ret ppc_fp128 %tmp11
 }
diff --git a/test/CodeGen/PowerPC/return-val-i128.ll b/test/CodeGen/PowerPC/return-val-i128.ll
index 6e68ee3..27a5004 100644
--- a/test/CodeGen/PowerPC/return-val-i128.ll
+++ b/test/CodeGen/PowerPC/return-val-i128.ll
@@ -14,7 +14,7 @@
 	br i1 %toBool, label %bb, label %bb8
 bb:		; preds = %entry
 	%tmp4 = load float* %a_addr, align 4		; <float> [#uses=1]
-	%tmp5 = sub float -0.000000e+00, %tmp4		; <float> [#uses=1]
+	%tmp5 = fsub float -0.000000e+00, %tmp4		; <float> [#uses=1]
 	%tmp6 = call i128 @__fixunssfDI( float %tmp5 ) nounwind 		; <i128> [#uses=1]
 	%tmp7 = sub i128 0, %tmp6		; <i128> [#uses=1]
 	store i128 %tmp7, i128* %tmp, align 16
diff --git a/test/CodeGen/PowerPC/unsafe-math.ll b/test/CodeGen/PowerPC/unsafe-math.ll
index 3d52d0c..d211b3b 100644
--- a/test/CodeGen/PowerPC/unsafe-math.ll
+++ b/test/CodeGen/PowerPC/unsafe-math.ll
@@ -3,8 +3,8 @@
 ; RUN:   grep fmul | count 1
 
 define double @foo(double %X) {
-        %tmp1 = mul double %X, 1.23
-        %tmp2 = mul double %tmp1, 4.124
+        %tmp1 = fmul double %X, 1.23
+        %tmp2 = fmul double %tmp1, 4.124
         ret double %tmp2
 }
 
diff --git a/test/CodeGen/PowerPC/vec_fneg.ll b/test/CodeGen/PowerPC/vec_fneg.ll
index 2ef2099..9fdbffd 100644
--- a/test/CodeGen/PowerPC/vec_fneg.ll
+++ b/test/CodeGen/PowerPC/vec_fneg.ll
@@ -2,7 +2,7 @@
 
 define void @t(<4 x float>* %A) {
 	%tmp2 = load <4 x float>* %A
-	%tmp3 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp2
+	%tmp3 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp2
 	store <4 x float> %tmp3, <4 x float>* %A
 	ret void
 }
diff --git a/test/CodeGen/PowerPC/vec_splat.ll b/test/CodeGen/PowerPC/vec_splat.ll
index a631137..7b7e4fe 100644
--- a/test/CodeGen/PowerPC/vec_splat.ll
+++ b/test/CodeGen/PowerPC/vec_splat.ll
@@ -15,7 +15,7 @@
         %tmp4 = insertelement %f4 %tmp2, float %X, i32 2                ; <%f4> [#uses=1]
         %tmp6 = insertelement %f4 %tmp4, float %X, i32 3                ; <%f4> [#uses=1]
         %q = load %f4* %Q               ; <%f4> [#uses=1]
-        %R = add %f4 %q, %tmp6          ; <%f4> [#uses=1]
+        %R = fadd %f4 %q, %tmp6          ; <%f4> [#uses=1]
         store %f4 %R, %f4* %P
         ret void
 }
diff --git a/test/CodeGen/PowerPC/vec_zero.ll b/test/CodeGen/PowerPC/vec_zero.ll
index 8d06a7d..7350e91 100644
--- a/test/CodeGen/PowerPC/vec_zero.ll
+++ b/test/CodeGen/PowerPC/vec_zero.ll
@@ -2,7 +2,7 @@
 
 define void @foo(<4 x float>* %P) {
         %T = load <4 x float>* %P               ; <<4 x float>> [#uses=1]
-        %S = add <4 x float> zeroinitializer, %T                ; <<4 x float>> [#uses=1]
+        %S = fadd <4 x float> zeroinitializer, %T                ; <<4 x float>> [#uses=1]
         store <4 x float> %S, <4 x float>* %P
         ret void
 }
diff --git a/test/CodeGen/PowerPC/vector.ll b/test/CodeGen/PowerPC/vector.ll
index 679e69e..a6c17b4 100644
--- a/test/CodeGen/PowerPC/vector.ll
+++ b/test/CodeGen/PowerPC/vector.ll
@@ -14,7 +14,7 @@
 define void @test_f1(%f1* %P, %f1* %Q, %f1* %S) {
         %p = load %f1* %P               ; <%f1> [#uses=1]
         %q = load %f1* %Q               ; <%f1> [#uses=1]
-        %R = add %f1 %p, %q             ; <%f1> [#uses=1]
+        %R = fadd %f1 %p, %q             ; <%f1> [#uses=1]
         store %f1 %R, %f1* %S
         ret void
 }
@@ -22,7 +22,7 @@
 define void @test_f2(%f2* %P, %f2* %Q, %f2* %S) {
         %p = load %f2* %P               ; <%f2> [#uses=1]
         %q = load %f2* %Q               ; <%f2> [#uses=1]
-        %R = add %f2 %p, %q             ; <%f2> [#uses=1]
+        %R = fadd %f2 %p, %q             ; <%f2> [#uses=1]
         store %f2 %R, %f2* %S
         ret void
 }
@@ -30,7 +30,7 @@
 define void @test_f4(%f4* %P, %f4* %Q, %f4* %S) {
         %p = load %f4* %P               ; <%f4> [#uses=1]
         %q = load %f4* %Q               ; <%f4> [#uses=1]
-        %R = add %f4 %p, %q             ; <%f4> [#uses=1]
+        %R = fadd %f4 %p, %q             ; <%f4> [#uses=1]
         store %f4 %R, %f4* %S
         ret void
 }
@@ -38,7 +38,7 @@
 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
         %p = load %f8* %P               ; <%f8> [#uses=1]
         %q = load %f8* %Q               ; <%f8> [#uses=1]
-        %R = add %f8 %p, %q             ; <%f8> [#uses=1]
+        %R = fadd %f8 %p, %q             ; <%f8> [#uses=1]
         store %f8 %R, %f8* %S
         ret void
 }
@@ -46,7 +46,7 @@
 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
         %p = load %f8* %P               ; <%f8> [#uses=1]
         %q = load %f8* %Q               ; <%f8> [#uses=1]
-        %R = mul %f8 %p, %q             ; <%f8> [#uses=1]
+        %R = fmul %f8 %p, %q             ; <%f8> [#uses=1]
         store %f8 %R, %f8* %S
         ret void
 }
@@ -63,7 +63,7 @@
 
 define void @test_cst(%f4* %P, %f4* %S) {
         %p = load %f4* %P               ; <%f4> [#uses=1]
-        %R = add %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float
+        %R = fadd %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float
  2.000000e+00, float 4.500000e+00 >             ; <%f4> [#uses=1]
         store %f4 %R, %f4* %S
         ret void
@@ -71,14 +71,14 @@
 
 define void @test_zero(%f4* %P, %f4* %S) {
         %p = load %f4* %P               ; <%f4> [#uses=1]
-        %R = add %f4 %p, zeroinitializer                ; <%f4> [#uses=1]
+        %R = fadd %f4 %p, zeroinitializer                ; <%f4> [#uses=1]
         store %f4 %R, %f4* %S
         ret void
 }
 
 define void @test_undef(%f4* %P, %f4* %S) {
         %p = load %f4* %P               ; <%f4> [#uses=1]
-        %R = add %f4 %p, undef          ; <%f4> [#uses=1]
+        %R = fadd %f4 %p, undef          ; <%f4> [#uses=1]
         store %f4 %R, %f4* %S
         ret void
 }
@@ -116,7 +116,7 @@
 
 define void @test_cast_1(%f4* %b, %i4* %a) {
         %tmp = load %f4* %b             ; <%f4> [#uses=1]
-        %tmp2 = add %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float 
+        %tmp2 = fadd %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float
 3.000000e+00, float 4.000000e+00 >              ; <%f4> [#uses=1]
         %tmp3 = bitcast %f4 %tmp2 to %i4                ; <%i4> [#uses=1]
         %tmp4 = add %i4 %tmp3, < i32 1, i32 2, i32 3, i32 4 >           
@@ -140,7 +140,7 @@
         %tmp4 = insertelement %f4 %tmp2, float %X, i32 2    
         %tmp6 = insertelement %f4 %tmp4, float %X, i32 3   
         %q = load %f4* %Q               ; <%f4> [#uses=1]
-        %R = add %f4 %q, %tmp6          ; <%f4> [#uses=1]
+        %R = fadd %f4 %q, %tmp6          ; <%f4> [#uses=1]
         store %f4 %R, %f4* %P
         ret void
 }
diff --git a/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll b/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll
index 15af046..76f140c 100644
--- a/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll
+++ b/test/CodeGen/SPARC/2006-01-22-BitConvertLegalize.ll
@@ -2,8 +2,8 @@
 
 define void @execute_list() {
         %tmp.33.i = fdiv float 0.000000e+00, 0.000000e+00               ; <float> [#uses=1]
-        %tmp.37.i = mul float 0.000000e+00, %tmp.33.i           ; <float> [#uses=1]
-        %tmp.42.i = add float %tmp.37.i, 0.000000e+00           ; <float> [#uses=1]
+        %tmp.37.i = fmul float 0.000000e+00, %tmp.33.i           ; <float> [#uses=1]
+        %tmp.42.i = fadd float %tmp.37.i, 0.000000e+00           ; <float> [#uses=1]
         call void @gl_EvalCoord1f( float %tmp.42.i )
         ret void
 }
diff --git a/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
index b5d215b..04035ac 100644
--- a/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
+++ b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
@@ -13,7 +13,7 @@
 loopexit.16.loopexit:           ; preds = %no_exit.16
         br label %no_exit.18
 no_exit.18:             ; preds = %loopexit.20, %loopexit.16.loopexit
-        %tmp.882 = add float 0.000000e+00, 0.000000e+00         ; <float> [#uses=2]
+        %tmp.882 = fadd float 0.000000e+00, 0.000000e+00         ; <float> [#uses=2]
         br i1 false, label %loopexit.19, label %no_exit.19.preheader
 no_exit.19.preheader:           ; preds = %no_exit.18
         ret void
@@ -21,9 +21,9 @@
         br i1 false, label %loopexit.20, label %no_exit.20
 no_exit.20:             ; preds = %loopexit.21, %loopexit.19
         %ai2.1122.tmp.3 = phi float [ %tmp.958, %loopexit.21 ], [ %tmp.882, %loopexit.19 ]              ; <float> [#uses=1]
-        %tmp.950 = mul float %tmp.882, %ai2.1122.tmp.3          ; <float> [#uses=1]
-        %tmp.951 = sub float 0.000000e+00, %tmp.950             ; <float> [#uses=1]
-        %tmp.958 = add float 0.000000e+00, 0.000000e+00         ; <float> [#uses=1]
+        %tmp.950 = fmul float %tmp.882, %ai2.1122.tmp.3          ; <float> [#uses=1]
+        %tmp.951 = fsub float 0.000000e+00, %tmp.950             ; <float> [#uses=1]
+        %tmp.958 = fadd float 0.000000e+00, 0.000000e+00         ; <float> [#uses=1]
         br i1 false, label %loopexit.21, label %no_exit.21.preheader
 no_exit.21.preheader:           ; preds = %no_exit.20
         ret void
diff --git a/test/CodeGen/X86/2006-05-25-CycleInDAG.ll b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
index c9a0049..78838d1 100644
--- a/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
+++ b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
@@ -11,7 +11,7 @@
 	%tmp58.i = or i32 0, %tmp61.i.upgrd.1		; <i32> [#uses=1]
 	%tmp62.i = or i32 %tmp58.i, 0		; <i32> [#uses=1]
 	%tmp62.i.upgrd.2 = sitofp i32 %tmp62.i to double		; <double> [#uses=1]
-	%tmp64.i = add double %tmp62.i.upgrd.2, %tmp44.i		; <double> [#uses=1]
+	%tmp64.i = fadd double %tmp62.i.upgrd.2, %tmp44.i		; <double> [#uses=1]
 	%tmp68.i = call double @foo( double %tmp64.i, i32 0 )		; <double> [#uses=0]
 	ret i32 0
 }
diff --git a/test/CodeGen/X86/2007-01-08-InstrSched.ll b/test/CodeGen/X86/2007-01-08-InstrSched.ll
index 811e9ac..3b365f3 100644
--- a/test/CodeGen/X86/2007-01-08-InstrSched.ll
+++ b/test/CodeGen/X86/2007-01-08-InstrSched.ll
@@ -3,12 +3,12 @@
 ; RUN:   %prcontext {mulss	LCPI1_3} 1 | grep mulss | count 1
 
 define float @foo(float %x) {
-    %tmp1 = mul float %x, 3.000000e+00
-    %tmp3 = mul float %x, 5.000000e+00
-    %tmp5 = mul float %x, 7.000000e+00
-    %tmp7 = mul float %x, 1.100000e+01
-    %tmp10 = add float %tmp1, %tmp3
-    %tmp12 = add float %tmp10, %tmp5
-    %tmp14 = add float %tmp12, %tmp7
+    %tmp1 = fmul float %x, 3.000000e+00
+    %tmp3 = fmul float %x, 5.000000e+00
+    %tmp5 = fmul float %x, 7.000000e+00
+    %tmp7 = fmul float %x, 1.100000e+01
+    %tmp10 = fadd float %tmp1, %tmp3
+    %tmp12 = fadd float %tmp10, %tmp5
+    %tmp14 = fadd float %tmp12, %tmp7
     ret float %tmp14
 }
diff --git a/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
index d1d0ea8..c03d982 100644
--- a/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
+++ b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
@@ -139,7 +139,7 @@
 	%r353 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r352
 	%r354 = load float* %r353
 	%r362 = load float* bitcast ([128 x i64]* @i6000 to float*)
-	%r363 = add float 0.000000e+00, %r362
+	%r363 = fadd float 0.000000e+00, %r362
 	%r370 = load float* bitcast ([128 x i64]* @i6000 to float*)
 	%r376 = icmp slt i64 %r16, 0
 	br i1 %r376, label %b377, label %a35b
@@ -155,11 +155,11 @@
 	%e785 = shl i64 %w1865, 0
 	%b1877 = mul i64 %w1865, 0
 	%s795 = add i64 %b1877, 0
-	%r399 = add float %r354, 0.000000e+00
-	%r402 = add float %r370, 0.000000e+00
-	%r403 = add float %r348, 0.000000e+00
+	%r399 = fadd float %r354, 0.000000e+00
+	%r402 = fadd float %r370, 0.000000e+00
+	%r403 = fadd float %r348, 0.000000e+00
 	%r411 = add i64 %s795, 0
-	%r431 = add float %r362, 0.000000e+00
+	%r431 = fadd float %r362, 0.000000e+00
 	%r454 = add i64 %e785, 0
 	%r457 = add i64 %e785, 0
 	%r459 = icmp slt i64 %r457, 0
@@ -230,21 +230,21 @@
 	%r750 = add i64 %r717, 0
 	%r751 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r750
 	%r752 = load float* %r751
-	%r753 = add float %r752, %r746
-	%r754 = add float %r728, %r722
-	%r755 = add float %r734, %r754
-	%r756 = add float %r755, %r740
-	%r757 = add float %r753, %r756
-	%r759 = add float %r757, %r540
+	%r753 = fadd float %r752, %r746
+	%r754 = fadd float %r728, %r722
+	%r755 = fadd float %r734, %r754
+	%r756 = fadd float %r755, %r740
+	%r757 = fadd float %r753, %r756
+	%r759 = fadd float %r757, %r540
 	%r770 = add i64 %r717, 0
 	%r771 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r770
 	%r772 = load float* %r771
 	%r776 = add i64 %r717, 0
 	%r777 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r776
 	%r778 = load float* %r777
-	%r781 = add float %r363, %r772
-	%r782 = add float %r781, %r778
-	%r783 = add float %r551, %r782
+	%r781 = fadd float %r363, %r772
+	%r782 = fadd float %r781, %r778
+	%r783 = fadd float %r551, %r782
 	br label %b712
 a57b:
 	br i1 %r335, label %a66b, label %b1086
@@ -310,10 +310,10 @@
 	%r1035 = load float* %r1034
 	%r1037 = bitcast i8* %c22010 to float*
 	%r1040 = getelementptr float* %r1037, i64 %r1025
-	%r1044 = add float %r864, %r1035
-	%r1046 = add float %r870, %r1027
-	%r1047 = add float %r1044, %r1046
-	%r1048 = add float %r851, %r1047
+	%r1044 = fadd float %r864, %r1035
+	%r1046 = fadd float %r870, %r1027
+	%r1047 = fadd float %r1044, %r1046
+	%r1048 = fadd float %r851, %r1047
 	%v1886 = add i64 %w1885, 0
 	%u1890 = icmp slt i64 %v1886, %b1889
 	br i1 %u1890, label %b1016, label %a53b1019
@@ -341,7 +341,7 @@
 	%r1132 = bitcast i8* %c22012 to float*
 	%r1134 = getelementptr float* %r1132, i64 %w1915
 	%r1135 = load float* %r1134
-	%r1136 = add float %r1123, %r1135
+	%r1136 = fadd float %r1123, %r1135
 	%r1138 = icmp slt i64 %r1114, 0
 	br i1 %r1138, label %b1139, label %a63b
 b1139:
@@ -387,7 +387,7 @@
 a63b1266:
 	%w1944 = phi i64 [ 0, %a63b1266q ], [ %v1945, %a63b1266 ]
 	%s1377 = phi i64 [ %s1374, %a63b1266q ], [ %r1297, %a63b1266 ]
-	%r1282 = add float %r1136, 0.000000e+00
+	%r1282 = fadd float %r1136, 0.000000e+00
 	%r1297 = add i64 %s1377, 0
 	%v1945 = add i64 %w1944, 0
 	%u1949 = icmp slt i64 %v1945, %b1948
@@ -418,7 +418,7 @@
 	%r1379 = add i64 %s1543, 0
 	%r1403 = add i64 %r1355, 0
 	%r1422 = add i64 %r1348, 0
-	%r1526 = add float %r1372, 0.000000e+00
+	%r1526 = fadd float %r1372, 0.000000e+00
 	%r1573 = add i64 %w1958, 0
 	%r1581 = icmp slt i64 %r1573, 0
 	%v1959 = add i64 %w1958, 0
@@ -448,10 +448,10 @@
 	%r1763 = load float* %r1762
 	%r1767 = add i64 %r1622, 0
 	%r1768 = getelementptr float* bitcast ([128 x i64]* @i6000 to float*), i64 %r1767
-	%r1772 = add float %r1763, 0.000000e+00
-	%r1773 = add float %r1772, 0.000000e+00
-	%r1809 = add float %r1757, 0.000000e+00
-	%r1810 = add float %r1773, %r1809
+	%r1772 = fadd float %r1763, 0.000000e+00
+	%r1773 = fadd float %r1772, 0.000000e+00
+	%r1809 = fadd float %r1757, 0.000000e+00
+	%r1810 = fadd float %r1773, %r1809
 	store float %r1810, float* %r1768
 	%r1818 = add i64 %w1970, 0
 	%r1826 = icmp slt i64 %r1818, 0
diff --git a/test/CodeGen/X86/2007-03-01-SpillerCrash.ll b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll
index d4176f1..721b6e7 100644
--- a/test/CodeGen/X86/2007-03-01-SpillerCrash.ll
+++ b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll
@@ -3,12 +3,12 @@
 
 define void @test() nounwind {
 test.exit:
-	mul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:0 [#uses=4]
+	fmul <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>>:0 [#uses=4]
 	load <4 x float>* null		; <<4 x float>>:1 [#uses=1]
 	shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 >		; <<4 x float>>:2 [#uses=1]
-	mul <4 x float> %0, %2		; <<4 x float>>:3 [#uses=1]
-	sub <4 x float> zeroinitializer, %3		; <<4 x float>>:4 [#uses=1]
-	mul <4 x float> %4, zeroinitializer		; <<4 x float>>:5 [#uses=2]
+	fmul <4 x float> %0, %2		; <<4 x float>>:3 [#uses=1]
+	fsub <4 x float> zeroinitializer, %3		; <<4 x float>>:4 [#uses=1]
+	fmul <4 x float> %4, zeroinitializer		; <<4 x float>>:5 [#uses=2]
 	bitcast <4 x float> zeroinitializer to <4 x i32>		; <<4 x i32>>:6 [#uses=1]
 	and <4 x i32> %6, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 >		; <<4 x i32>>:7 [#uses=1]
 	bitcast <4 x i32> %7 to <4 x float>		; <<4 x float>>:8 [#uses=2]
@@ -23,13 +23,13 @@
 	br i1 false, label %19, label %13
 
 ; <label>:13		; preds = %12
-	sub float -0.000000e+00, 0.000000e+00		; <float>:14 [#uses=1]
+	fsub float -0.000000e+00, 0.000000e+00		; <float>:14 [#uses=1]
 	%tmp207 = extractelement <4 x float> zeroinitializer, i32 0		; <float> [#uses=1]
 	%tmp208 = extractelement <4 x float> zeroinitializer, i32 2		; <float> [#uses=1]
-	sub float -0.000000e+00, %tmp208		; <float>:15 [#uses=1]
+	fsub float -0.000000e+00, %tmp208		; <float>:15 [#uses=1]
 	%tmp155 = extractelement <4 x float> zeroinitializer, i32 0		; <float> [#uses=1]
 	%tmp156 = extractelement <4 x float> zeroinitializer, i32 2		; <float> [#uses=1]
-	sub float -0.000000e+00, %tmp156		; <float>:16 [#uses=1]
+	fsub float -0.000000e+00, %tmp156		; <float>:16 [#uses=1]
 	br label %19
 
 ; <label>:17		; preds = %11
@@ -54,7 +54,7 @@
 	insertelement <4 x float> %31, float %25, i32 2		; <<4 x float>>:32 [#uses=1]
 	insertelement <4 x float> %32, float %25, i32 3		; <<4 x float>>:33 [#uses=1]
 	fdiv <4 x float> %33, zeroinitializer		; <<4 x float>>:34 [#uses=1]
-	mul <4 x float> %34, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 >		; <<4 x float>>:35 [#uses=1]
+	fmul <4 x float> %34, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 >		; <<4 x float>>:35 [#uses=1]
 	insertelement <4 x float> undef, float %22, i32 0		; <<4 x float>>:36 [#uses=1]
 	insertelement <4 x float> %36, float %21, i32 1		; <<4 x float>>:37 [#uses=0]
 	br i1 false, label %foo.exit, label %38
@@ -64,17 +64,17 @@
 	fcmp ogt float %39, 0.000000e+00		; <i1>:40 [#uses=1]
 	extractelement <4 x float> %0, i32 2		; <float>:41 [#uses=1]
 	extractelement <4 x float> %0, i32 1		; <float>:42 [#uses=1]
-	sub float -0.000000e+00, %42		; <float>:43 [#uses=2]
+	fsub float -0.000000e+00, %42		; <float>:43 [#uses=2]
 	%tmp189 = extractelement <4 x float> %5, i32 2		; <float> [#uses=1]
 	br i1 %40, label %44, label %46
 
 ; <label>:44		; preds = %38
-	sub float -0.000000e+00, %tmp189		; <float>:45 [#uses=0]
+	fsub float -0.000000e+00, %tmp189		; <float>:45 [#uses=0]
 	br label %foo.exit
 
 ; <label>:46		; preds = %38
 	%tmp192 = extractelement <4 x float> %5, i32 1		; <float> [#uses=1]
-	sub float -0.000000e+00, %tmp192		; <float>:47 [#uses=1]
+	fsub float -0.000000e+00, %tmp192		; <float>:47 [#uses=1]
 	br label %foo.exit
 
 foo.exit:		; preds = %46, %44, %19
diff --git a/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
index ed5a194..514d665 100644
--- a/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
+++ b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
@@ -11,7 +11,7 @@
 	%tmp52 = bitcast <4 x float> %tmp49 to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%tmp53 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp52, <4 x i32> < i32 8, i32 undef, i32 undef, i32 undef > )		; <<4 x i32>> [#uses=1]
 	%tmp105 = bitcast <4 x i32> %tmp53 to <4 x float>		; <<4 x float>> [#uses=1]
-	%tmp108 = sub <4 x float> zeroinitializer, %tmp105		; <<4 x float>> [#uses=0]
+	%tmp108 = fsub <4 x float> zeroinitializer, %tmp105		; <<4 x float>> [#uses=0]
 	br label %bb
 
 return:		; preds = %entry
diff --git a/test/CodeGen/X86/2007-04-24-VectorCrash.ll b/test/CodeGen/X86/2007-04-24-VectorCrash.ll
index ce23da0..3e08e50 100644
--- a/test/CodeGen/X86/2007-04-24-VectorCrash.ll
+++ b/test/CodeGen/X86/2007-04-24-VectorCrash.ll
@@ -8,8 +8,8 @@
 entry:
 	or <4 x i32> zeroinitializer, and (<4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer) to <4 x i32>), <4 x i32> < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 >)		; <<4 x i32>>:0 [#uses=1]
 	bitcast <4 x i32> %0 to <4 x float>		; <<4 x float>>:1 [#uses=1]
-	sub <4 x float> %1, zeroinitializer		; <<4 x float>>:2 [#uses=1]
-	sub <4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer), %2		; <<4 x float>>:3 [#uses=1]
+	fsub <4 x float> %1, zeroinitializer		; <<4 x float>>:2 [#uses=1]
+	fsub <4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer), %2		; <<4 x float>>:3 [#uses=1]
 	shufflevector <4 x float> zeroinitializer, <4 x float> %3, <4 x i32> < i32 0, i32 5, i32 6, i32 7 >		; <<4 x float>>:4 [#uses=1]
 	shufflevector <4 x float> zeroinitializer, <4 x float> %4, <4 x i32> < i32 0, i32 5, i32 6, i32 7 >		; <<4 x float>>:5 [#uses=1]
 	shufflevector <4 x float> zeroinitializer, <4 x float> %5, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >		; <<4 x float>>:6 [#uses=1]
@@ -29,19 +29,19 @@
 	shufflevector <4 x float> zeroinitializer, <4 x float> %19, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >		; <<4 x float>>:20 [#uses=1]
 	shufflevector <4 x float> %20, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >		; <<4 x float>>:21 [#uses=1]
 	shufflevector <4 x float> %21, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >		; <<4 x float>>:22 [#uses=1]
-	mul <4 x float> %22, zeroinitializer		; <<4 x float>>:23 [#uses=1]
+	fmul <4 x float> %22, zeroinitializer		; <<4 x float>>:23 [#uses=1]
 	shufflevector <4 x float> %23, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 >		; <<4 x float>>:24 [#uses=1]
 	call <4 x float> @llvm.x86.sse.add.ss( <4 x float> zeroinitializer, <4 x float> %24 )		; <<4 x float>>:25 [#uses=1]
 	shufflevector <4 x float> %25, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>>:26 [#uses=1]
 	shufflevector <4 x float> %26, <4 x float> zeroinitializer, <4 x i32> zeroinitializer		; <<4 x float>>:27 [#uses=1]
 	shufflevector <4 x float> %27, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 1, i32 6, i32 7 >		; <<4 x float>>:28 [#uses=1]
-	mul <4 x float> zeroinitializer, %28		; <<4 x float>>:29 [#uses=1]
-	add <4 x float> %29, zeroinitializer		; <<4 x float>>:30 [#uses=1]
-	mul <4 x float> zeroinitializer, %30		; <<4 x float>>:31 [#uses=1]
+	fmul <4 x float> zeroinitializer, %28		; <<4 x float>>:29 [#uses=1]
+	fadd <4 x float> %29, zeroinitializer		; <<4 x float>>:30 [#uses=1]
+	fmul <4 x float> zeroinitializer, %30		; <<4 x float>>:31 [#uses=1]
 	shufflevector <4 x float> zeroinitializer, <4 x float> %31, <4 x i32> < i32 0, i32 5, i32 6, i32 7 >		; <<4 x float>>:32 [#uses=1]
-	mul <4 x float> zeroinitializer, %32		; <<4 x float>>:33 [#uses=1]
+	fmul <4 x float> zeroinitializer, %32		; <<4 x float>>:33 [#uses=1]
 	shufflevector <4 x float> %33, <4 x float> zeroinitializer, <4 x i32> zeroinitializer		; <<4 x float>>:34 [#uses=1]
-	mul <4 x float> zeroinitializer, %34		; <<4 x float>>:35 [#uses=1]
+	fmul <4 x float> zeroinitializer, %34		; <<4 x float>>:35 [#uses=1]
 	shufflevector <4 x float> zeroinitializer, <4 x float> %35, <4 x i32> < i32 0, i32 1, i32 6, i32 7 >		; <<4 x float>>:36 [#uses=1]
 	shufflevector <4 x float> zeroinitializer, <4 x float> %36, <4 x i32> < i32 0, i32 5, i32 6, i32 7 >		; <<4 x float>>:37 [#uses=1]
 	shufflevector <4 x float> zeroinitializer, <4 x float> %37, <4 x i32> < i32 0, i32 5, i32 6, i32 7 >		; <<4 x float>>:38 [#uses=1]
@@ -56,7 +56,7 @@
 	shufflevector <4 x float> zeroinitializer, <4 x float> %46, <4 x i32> < i32 0, i32 5, i32 6, i32 7 >		; <<4 x float>>:47 [#uses=1]
 	shufflevector <4 x float> zeroinitializer, <4 x float> %47, <4 x i32> < i32 0, i32 5, i32 6, i32 7 >		; <<4 x float>>:48 [#uses=1]
 	shufflevector <4 x float> %48, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >		; <<4 x float>>:49 [#uses=1]
-	add <4 x float> %49, zeroinitializer		; <<4 x float>>:50 [#uses=1]
+	fadd <4 x float> %49, zeroinitializer		; <<4 x float>>:50 [#uses=1]
 	%tmp5845 = extractelement <4 x float> %50, i32 2		; <float> [#uses=1]
 	store float %tmp5845, float* %P
 	ret void
diff --git a/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
index 11fb8e3..66a58c7 100644
--- a/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
+++ b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
@@ -2,10 +2,10 @@
 
 define void @test(<4 x float>* %arg) {
 	%tmp89 = getelementptr <4 x float>* %arg, i64 3
-	%tmp1144 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, zeroinitializer
+	%tmp1144 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, zeroinitializer
 	store <4 x float> %tmp1144, <4 x float>* null
 	%tmp1149 = load <4 x float>* %tmp89
-	%tmp1150 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp1149
+	%tmp1150 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp1149
 	store <4 x float> %tmp1150, <4 x float>* %tmp89
 	ret void
 }
diff --git a/test/CodeGen/X86/2007-07-10-StackerAssert.ll b/test/CodeGen/X86/2007-07-10-StackerAssert.ll
index 120284f..7f09b52 100644
--- a/test/CodeGen/X86/2007-07-10-StackerAssert.ll
+++ b/test/CodeGen/X86/2007-07-10-StackerAssert.ll
@@ -27,7 +27,7 @@
 
 cond_true425:		; preds = %bb383
 	%tmp430 = load float* null		; <float> [#uses=1]
-	%tmp432 = sub float %tmp430, %tmp408		; <float> [#uses=1]
+	%tmp432 = fsub float %tmp430, %tmp408		; <float> [#uses=1]
 	%tmp432433 = fpext float %tmp432 to double		; <double> [#uses=1]
 	%tmp434435 = fpext float %tmp408 to double		; <double> [#uses=1]
 	call void (i8*, ...)* @PR_LogPrint( i8* getelementptr ([56 x i8]* @.str97, i32 0, i32 0), double 0.000000e+00, double %tmp434435, double %tmp432433 )
diff --git a/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll b/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
index 142bcd3..835e4ca 100644
--- a/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
+++ b/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
@@ -22,7 +22,7 @@
 
 	%tmp1406.i1367.i = shufflevector <4 x float> %tmp2723.i1170.i, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 >		; <<4 x float>> [#uses=1]
 	%tmp84.i1413.i = load <4 x float>* %.sub6235.i		; <<4 x float>> [#uses=1]
-	%tmp89.i1415.i = mul <4 x float> %tmp84.i1413.i, %tmp1406.i1367.i		; <<4 x float>> [#uses=1]
+	%tmp89.i1415.i = fmul <4 x float> %tmp84.i1413.i, %tmp1406.i1367.i		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp89.i1415.i, <4 x float>* %.sub.i
         ret i16 0
 }
diff --git a/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll b/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
index 3a3c113..fd914a1 100644
--- a/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
+++ b/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
@@ -5,38 +5,38 @@
 	br i1 true, label %bb171.preheader, label %bb431
 
 bb171.preheader:		; preds = %entry
-	%tmp176 = add float 0.000000e+00, 1.000000e+00		; <float> [#uses=2]
+	%tmp176 = fadd float 0.000000e+00, 1.000000e+00		; <float> [#uses=2]
 	%gi.1 = getelementptr float* %fz, i32 0		; <float*> [#uses=2]
 	%tmp240 = load float* %gi.1, align 4		; <float> [#uses=1]
-	%tmp242 = sub float %tmp240, 0.000000e+00		; <float> [#uses=2]
+	%tmp242 = fsub float %tmp240, 0.000000e+00		; <float> [#uses=2]
 	%tmp251 = getelementptr float* %fz, i32 0		; <float*> [#uses=1]
 	%tmp252 = load float* %tmp251, align 4		; <float> [#uses=1]
 	%tmp258 = getelementptr float* %fz, i32 0		; <float*> [#uses=2]
 	%tmp259 = load float* %tmp258, align 4		; <float> [#uses=2]
-	%tmp261 = mul float %tmp259, %tmp176		; <float> [#uses=1]
-	%tmp262 = sub float 0.000000e+00, %tmp261		; <float> [#uses=2]
-	%tmp269 = mul float %tmp252, %tmp176		; <float> [#uses=1]
-	%tmp276 = mul float %tmp259, 0.000000e+00		; <float> [#uses=1]
-	%tmp277 = add float %tmp269, %tmp276		; <float> [#uses=2]
+	%tmp261 = fmul float %tmp259, %tmp176		; <float> [#uses=1]
+	%tmp262 = fsub float 0.000000e+00, %tmp261		; <float> [#uses=2]
+	%tmp269 = fmul float %tmp252, %tmp176		; <float> [#uses=1]
+	%tmp276 = fmul float %tmp259, 0.000000e+00		; <float> [#uses=1]
+	%tmp277 = fadd float %tmp269, %tmp276		; <float> [#uses=2]
 	%tmp281 = getelementptr float* %fz, i32 0		; <float*> [#uses=1]
 	%tmp282 = load float* %tmp281, align 4		; <float> [#uses=2]
-	%tmp284 = sub float %tmp282, %tmp277		; <float> [#uses=1]
-	%tmp291 = add float %tmp282, %tmp277		; <float> [#uses=1]
-	%tmp298 = sub float 0.000000e+00, %tmp262		; <float> [#uses=1]
-	%tmp305 = add float 0.000000e+00, %tmp262		; <float> [#uses=1]
-	%tmp315 = mul float 0.000000e+00, %tmp291		; <float> [#uses=1]
-	%tmp318 = mul float 0.000000e+00, %tmp298		; <float> [#uses=1]
-	%tmp319 = add float %tmp315, %tmp318		; <float> [#uses=1]
-	%tmp329 = add float 0.000000e+00, %tmp319		; <float> [#uses=1]
+	%tmp284 = fsub float %tmp282, %tmp277		; <float> [#uses=1]
+	%tmp291 = fadd float %tmp282, %tmp277		; <float> [#uses=1]
+	%tmp298 = fsub float 0.000000e+00, %tmp262		; <float> [#uses=1]
+	%tmp305 = fadd float 0.000000e+00, %tmp262		; <float> [#uses=1]
+	%tmp315 = fmul float 0.000000e+00, %tmp291		; <float> [#uses=1]
+	%tmp318 = fmul float 0.000000e+00, %tmp298		; <float> [#uses=1]
+	%tmp319 = fadd float %tmp315, %tmp318		; <float> [#uses=1]
+	%tmp329 = fadd float 0.000000e+00, %tmp319		; <float> [#uses=1]
 	store float %tmp329, float* null, align 4
-	%tmp336 = sub float %tmp242, 0.000000e+00		; <float> [#uses=1]
+	%tmp336 = fsub float %tmp242, 0.000000e+00		; <float> [#uses=1]
 	store float %tmp336, float* %tmp258, align 4
-	%tmp343 = add float %tmp242, 0.000000e+00		; <float> [#uses=1]
+	%tmp343 = fadd float %tmp242, 0.000000e+00		; <float> [#uses=1]
 	store float %tmp343, float* null, align 4
-	%tmp355 = mul float 0.000000e+00, %tmp305		; <float> [#uses=1]
-	%tmp358 = mul float 0.000000e+00, %tmp284		; <float> [#uses=1]
-	%tmp359 = add float %tmp355, %tmp358		; <float> [#uses=1]
-	%tmp369 = add float 0.000000e+00, %tmp359		; <float> [#uses=1]
+	%tmp355 = fmul float 0.000000e+00, %tmp305		; <float> [#uses=1]
+	%tmp358 = fmul float 0.000000e+00, %tmp284		; <float> [#uses=1]
+	%tmp359 = fadd float %tmp355, %tmp358		; <float> [#uses=1]
+	%tmp369 = fadd float 0.000000e+00, %tmp359		; <float> [#uses=1]
 	store float %tmp369, float* %gi.1, align 4
 	ret void
 
diff --git a/test/CodeGen/X86/2007-11-02-BadAsm.ll b/test/CodeGen/X86/2007-11-02-BadAsm.ll
index 7fe8eaf..4ae4d2f 100644
--- a/test/CodeGen/X86/2007-11-02-BadAsm.ll
+++ b/test/CodeGen/X86/2007-11-02-BadAsm.ll
@@ -45,7 +45,7 @@
 cond_next.i79.i:		; preds = %xit.i
 	%phitmp167.i = fptosi double 0.000000e+00 to i64		; <i64> [#uses=1]
 	%tmp142143.i = fpext float %tmp6162.i.i to double		; <double> [#uses=1]
-	%tmp2.i139.i = add double %tmp142143.i, 5.000000e-01		; <double> [#uses=1]
+	%tmp2.i139.i = fadd double %tmp142143.i, 5.000000e-01		; <double> [#uses=1]
 	%tmp23.i140.i = fptosi double %tmp2.i139.i to i64		; <i64> [#uses=1]
 	br i1 false, label %cond_true.i143.i, label %round_coord.exit148.i
 
@@ -60,7 +60,7 @@
 	%tmp144149.i = phi i32 [ 32767, %cond_next.i79.i ], [ -32767, %cond_true.i143.i ]		; <i32> [#uses=1]
 	store i32 %tmp144149.i, i32* null, align 8
 	%tmp147148.i = fpext float %tmp67.i15.i to double		; <double> [#uses=1]
-	%tmp2.i128.i = add double %tmp147148.i, 5.000000e-01		; <double> [#uses=1]
+	%tmp2.i128.i = fadd double %tmp147148.i, 5.000000e-01		; <double> [#uses=1]
 	%tmp23.i129.i = fptosi double %tmp2.i128.i to i64		; <i64> [#uses=2]
 	%tmp5.i130.i = icmp slt i64 %tmp23.i129.i, 32768		; <i1> [#uses=1]
 	br i1 %tmp5.i130.i, label %cond_true.i132.i, label %round_coord.exit137.i
diff --git a/test/CodeGen/X86/2007-11-06-InstrSched.ll b/test/CodeGen/X86/2007-11-06-InstrSched.ll
index 605fb55..a4e44e1 100644
--- a/test/CodeGen/X86/2007-11-06-InstrSched.ll
+++ b/test/CodeGen/X86/2007-11-06-InstrSched.ll
@@ -13,8 +13,8 @@
 	%tmp45 = sitofp i32 %tmp4 to float		; <float> [#uses=1]
 	%tmp8 = getelementptr float* %y, i32 %i.0.reg2mem.0		; <float*> [#uses=1]
 	%tmp9 = load float* %tmp8, align 4		; <float> [#uses=1]
-	%tmp11 = mul float %tmp9, %tmp45		; <float> [#uses=1]
-	%tmp14 = add float %tmp11, %res.0.reg2mem.0		; <float> [#uses=2]
+	%tmp11 = fmul float %tmp9, %tmp45		; <float> [#uses=1]
+	%tmp14 = fadd float %tmp11, %res.0.reg2mem.0		; <float> [#uses=2]
 	%tmp17 = add i32 %i.0.reg2mem.0, 1		; <i32> [#uses=2]
 	%tmp21 = icmp ult i32 %tmp17, %c		; <i1> [#uses=1]
 	br i1 %tmp21, label %bb18, label %bb23
diff --git a/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll b/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
index 1b36fce..46422bc 100644
--- a/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
+++ b/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
@@ -41,8 +41,8 @@
 	%x.0.i21.i = select i1 %tmp4.i19.i, i32 %tmp1.i18.i, i32 0		; <i32> [#uses=1]
 	%tmp41.sum.i = add i32 %j.0.reg2mem.0.i16.i, 2		; <i32> [#uses=0]
 	%tmp1213.i23.i = sitofp i32 %x.0.i21.i to double		; <double> [#uses=1]
-	%tmp15.i24.i = sub double 0.000000e+00, %tmp1213.i23.i		; <double> [#uses=1]
-	%tmp16.i25.i = mul double 0.000000e+00, %tmp15.i24.i		; <double> [#uses=1]
+	%tmp15.i24.i = fsub double 0.000000e+00, %tmp1213.i23.i		; <double> [#uses=1]
+	%tmp16.i25.i = fmul double 0.000000e+00, %tmp15.i24.i		; <double> [#uses=1]
 	%indvar.next39.i = add i32 %j.0.reg2mem.0.i16.i, 2		; <i32> [#uses=2]
 	%exitcond40.i = icmp eq i32 %indvar.next39.i, %tmp8.i14.i		; <i1> [#uses=1]
 	br i1 %exitcond40.i, label %mp_unexp_d2mp.exit29.i, label %bb.i28.i
diff --git a/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll b/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll
index 84229cf..cb7a3dc 100644
--- a/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll
+++ b/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll
@@ -288,7 +288,7 @@
 			to label %invcont1642 unwind label %lpad3845		; <i8*> [#uses=0]
 
 invcont1642:		; preds = %invcont1640
-	%tmp18.i3770 = sub double %tmp3.i3778, 0.000000e+00		; <double> [#uses=0]
+	%tmp18.i3770 = fsub double %tmp3.i3778, 0.000000e+00		; <double> [#uses=0]
 	invoke fastcc void @_ZN7mrScene9AddObjectEP9mrSurfaceRK8ggStringS4_i( %struct.mrScene* %this, %struct.ggBRDF* null, %struct.ggString* null, %struct.ggString* null, i32 0 )
 			to label %bb3743 unwind label %lpad3845
 
diff --git a/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll b/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
index 83ca3e3a..38020c1 100644
--- a/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
+++ b/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
@@ -4,29 +4,29 @@
 entry:
 	%tmp71 = load x86_fp80* null, align 16		; <x86_fp80> [#uses=1]
 	%tmp72 = fdiv x86_fp80 %tmp71, 0xKC000C000000000000000		; <x86_fp80> [#uses=1]
-	%tmp73 = add x86_fp80 0xK00000000000000000000, %tmp72		; <x86_fp80> [#uses=1]
+	%tmp73 = fadd x86_fp80 0xK00000000000000000000, %tmp72		; <x86_fp80> [#uses=1]
 	%tmp7374 = fptrunc x86_fp80 %tmp73 to double		; <double> [#uses=1]
 	store double %tmp7374, double* null, align 8
 	%tmp81 = load double* null, align 8		; <double> [#uses=1]
-	%tmp82 = add double %tmp81, 0x401921FB54442D18		; <double> [#uses=1]
+	%tmp82 = fadd double %tmp81, 0x401921FB54442D18		; <double> [#uses=1]
 	%tmp83 = fdiv double %tmp82, 3.000000e+00		; <double> [#uses=1]
 	%tmp84 = call double @cos( double %tmp83 )		; <double> [#uses=1]
-	%tmp85 = mul double 0.000000e+00, %tmp84		; <double> [#uses=1]
+	%tmp85 = fmul double 0.000000e+00, %tmp84		; <double> [#uses=1]
 	%tmp8586 = fpext double %tmp85 to x86_fp80		; <x86_fp80> [#uses=1]
 	%tmp87 = load x86_fp80* null, align 16		; <x86_fp80> [#uses=1]
 	%tmp88 = fdiv x86_fp80 %tmp87, 0xKC000C000000000000000		; <x86_fp80> [#uses=1]
-	%tmp89 = add x86_fp80 %tmp8586, %tmp88		; <x86_fp80> [#uses=1]
+	%tmp89 = fadd x86_fp80 %tmp8586, %tmp88		; <x86_fp80> [#uses=1]
 	%tmp8990 = fptrunc x86_fp80 %tmp89 to double		; <double> [#uses=1]
 	store double %tmp8990, double* null, align 8
 	%tmp97 = load double* null, align 8		; <double> [#uses=1]
-	%tmp98 = add double %tmp97, 0x402921FB54442D18		; <double> [#uses=1]
+	%tmp98 = fadd double %tmp97, 0x402921FB54442D18		; <double> [#uses=1]
 	%tmp99 = fdiv double %tmp98, 3.000000e+00		; <double> [#uses=1]
 	%tmp100 = call double @cos( double %tmp99 )		; <double> [#uses=1]
-	%tmp101 = mul double 0.000000e+00, %tmp100		; <double> [#uses=1]
+	%tmp101 = fmul double 0.000000e+00, %tmp100		; <double> [#uses=1]
 	%tmp101102 = fpext double %tmp101 to x86_fp80		; <x86_fp80> [#uses=1]
 	%tmp103 = load x86_fp80* null, align 16		; <x86_fp80> [#uses=1]
 	%tmp104 = fdiv x86_fp80 %tmp103, 0xKC000C000000000000000		; <x86_fp80> [#uses=1]
-	%tmp105 = add x86_fp80 %tmp101102, %tmp104		; <x86_fp80> [#uses=1]
+	%tmp105 = fadd x86_fp80 %tmp101102, %tmp104		; <x86_fp80> [#uses=1]
 	%tmp105106 = fptrunc x86_fp80 %tmp105 to double		; <double> [#uses=1]
 	store double %tmp105106, double* null, align 8
 	ret void
diff --git a/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll b/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
index f1300fa..6db6537 100644
--- a/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
+++ b/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
@@ -3,13 +3,13 @@
 define void @casin({ double, double }* sret  %agg.result, double %z.0, double %z.1) nounwind  {
 entry:
 	%memtmp = alloca { double, double }, align 8		; <{ double, double }*> [#uses=3]
-	%tmp4 = sub double -0.000000e+00, %z.1		; <double> [#uses=1]
+	%tmp4 = fsub double -0.000000e+00, %z.1		; <double> [#uses=1]
 	call void @casinh( { double, double }* sret  %memtmp, double %tmp4, double %z.0 ) nounwind 
 	%tmp19 = getelementptr { double, double }* %memtmp, i32 0, i32 0		; <double*> [#uses=1]
 	%tmp20 = load double* %tmp19, align 8		; <double> [#uses=1]
 	%tmp22 = getelementptr { double, double }* %memtmp, i32 0, i32 1		; <double*> [#uses=1]
 	%tmp23 = load double* %tmp22, align 8		; <double> [#uses=1]
-	%tmp32 = sub double -0.000000e+00, %tmp20		; <double> [#uses=1]
+	%tmp32 = fsub double -0.000000e+00, %tmp20		; <double> [#uses=1]
 	%tmp37 = getelementptr { double, double }* %agg.result, i32 0, i32 0		; <double*> [#uses=1]
 	store double %tmp23, double* %tmp37, align 8
 	%tmp40 = getelementptr { double, double }* %agg.result, i32 0, i32 1		; <double*> [#uses=1]
diff --git a/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll b/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll
index b3fe9ab..230af57 100644
--- a/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll
+++ b/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll
@@ -33,23 +33,23 @@
 	br i1 %tmp10.i.i30, label %bb13.i.i37, label %bb30.i.i43
 
 bb13.i.i37:		; preds = %bb5.i.i31
-	%tmp15.i.i32 = sub double -0.000000e+00, %tmp22.i25		; <double> [#uses=1]
+	%tmp15.i.i32 = fsub double -0.000000e+00, %tmp22.i25		; <double> [#uses=1]
 	%tmp17.i.i33 = fdiv double %tmp15.i.i32, %tmp12.i23		; <double> [#uses=3]
-	%tmp20.i4.i = mul double %tmp17.i.i33, %tmp17.i.i33		; <double> [#uses=1]
-	%tmp21.i.i34 = add double %tmp20.i4.i, 1.000000e+00		; <double> [#uses=1]
+	%tmp20.i4.i = fmul double %tmp17.i.i33, %tmp17.i.i33		; <double> [#uses=1]
+	%tmp21.i.i34 = fadd double %tmp20.i4.i, 1.000000e+00		; <double> [#uses=1]
 	%tmp22.i.i35 = call double @llvm.sqrt.f64( double %tmp21.i.i34 ) nounwind 		; <double> [#uses=1]
 	%tmp23.i5.i = fdiv double 1.000000e+00, %tmp22.i.i35		; <double> [#uses=2]
-	%tmp28.i.i36 = mul double %tmp23.i5.i, %tmp17.i.i33		; <double> [#uses=1]
+	%tmp28.i.i36 = fmul double %tmp23.i5.i, %tmp17.i.i33		; <double> [#uses=1]
 	br label %Givens.exit.i49
 
 bb30.i.i43:		; preds = %bb5.i.i31
-	%tmp32.i.i38 = sub double -0.000000e+00, %tmp12.i23		; <double> [#uses=1]
+	%tmp32.i.i38 = fsub double -0.000000e+00, %tmp12.i23		; <double> [#uses=1]
 	%tmp34.i.i39 = fdiv double %tmp32.i.i38, %tmp22.i25		; <double> [#uses=3]
-	%tmp37.i6.i = mul double %tmp34.i.i39, %tmp34.i.i39		; <double> [#uses=1]
-	%tmp38.i.i40 = add double %tmp37.i6.i, 1.000000e+00		; <double> [#uses=1]
+	%tmp37.i6.i = fmul double %tmp34.i.i39, %tmp34.i.i39		; <double> [#uses=1]
+	%tmp38.i.i40 = fadd double %tmp37.i6.i, 1.000000e+00		; <double> [#uses=1]
 	%tmp39.i7.i = call double @llvm.sqrt.f64( double %tmp38.i.i40 ) nounwind 		; <double> [#uses=1]
 	%tmp40.i.i41 = fdiv double 1.000000e+00, %tmp39.i7.i		; <double> [#uses=2]
-	%tmp45.i.i42 = mul double %tmp40.i.i41, %tmp34.i.i39		; <double> [#uses=1]
+	%tmp45.i.i42 = fmul double %tmp40.i.i41, %tmp34.i.i39		; <double> [#uses=1]
 	br label %Givens.exit.i49
 
 Givens.exit.i49:		; preds = %bb3.i27.Givens.exit.i49_crit_edge, %bb30.i.i43, %bb13.i.i37
diff --git a/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll b/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
index 96ac7a7..fe0ee8a 100644
--- a/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
+++ b/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
@@ -24,20 +24,20 @@
 	%tmp42 = sdiv i32 %i, 9		; <i32> [#uses=1]
 	%tmp43 = add i32 %tmp42, -1		; <i32> [#uses=1]
 	%tmp4344 = sitofp i32 %tmp43 to double		; <double> [#uses=1]
-	%tmp17.i76 = mul double %tmp4344, 0.000000e+00		; <double> [#uses=1]
+	%tmp17.i76 = fmul double %tmp4344, 0.000000e+00		; <double> [#uses=1]
 	%tmp48 = sdiv i32 %i, 3		; <i32> [#uses=1]
 	%tmp49 = srem i32 %tmp48, 3		; <i32> [#uses=1]
 	%tmp50 = add i32 %tmp49, -1		; <i32> [#uses=1]
 	%tmp5051 = sitofp i32 %tmp50 to double		; <double> [#uses=1]
-	%tmp17.i63 = mul double %tmp5051, 0.000000e+00		; <double> [#uses=1]
+	%tmp17.i63 = fmul double %tmp5051, 0.000000e+00		; <double> [#uses=1]
 	%tmp55 = srem i32 %i, 3		; <i32> [#uses=1]
 	%tmp56 = add i32 %tmp55, -1		; <i32> [#uses=1]
 	%tmp5657 = sitofp i32 %tmp56 to double		; <double> [#uses=1]
 	%tmp15.i49 = getelementptr %struct.Lattice* %this, i32 0, i32 0, i32 0		; <double*> [#uses=1]
 	%tmp16.i50 = load double* %tmp15.i49, align 4		; <double> [#uses=1]
-	%tmp17.i = mul double %tmp5657, %tmp16.i50		; <double> [#uses=1]
-	%tmp20.i39 = add double %tmp17.i, %tmp17.i63		; <double> [#uses=1]
-	%tmp20.i23 = add double %tmp20.i39, %tmp17.i76		; <double> [#uses=1]
+	%tmp17.i = fmul double %tmp5657, %tmp16.i50		; <double> [#uses=1]
+	%tmp20.i39 = fadd double %tmp17.i, %tmp17.i63		; <double> [#uses=1]
+	%tmp20.i23 = fadd double %tmp20.i39, %tmp17.i76		; <double> [#uses=1]
 	br i1 false, label %bb58.preheader, label %bb81
 
 bb58.preheader:		; preds = %bb35
@@ -55,7 +55,7 @@
 	%tmp95.i = and i32 %tmp88.i, -268435456		; <i32> [#uses=1]
 	%tmp97.i = or i32 0, %tmp95.i		; <i32> [#uses=1]
 	store i32 %tmp97.i, i32* %tmp25.i, align 1
-	%tmp6.i = add double 0.000000e+00, %tmp20.i23		; <double> [#uses=0]
+	%tmp6.i = fadd double 0.000000e+00, %tmp20.i23		; <double> [#uses=0]
 	%exitcond96 = icmp eq i32 0, %smax		; <i1> [#uses=1]
 	br i1 %exitcond96, label %bb81, label %bb58
 
diff --git a/test/CodeGen/X86/2008-02-27-PEICrash.ll b/test/CodeGen/X86/2008-02-27-PEICrash.ll
index b644d8f..055eabb 100644
--- a/test/CodeGen/X86/2008-02-27-PEICrash.ll
+++ b/test/CodeGen/X86/2008-02-27-PEICrash.ll
@@ -13,21 +13,21 @@
 	%a.pn = phi float [ %a, %bb33 ], [ %b, %entry ]		; <float> [#uses=1]
 	%tmp41.pn508 = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ]		; <float> [#uses=1]
 	%tmp51.pn = phi float [ 0.000000e+00, %bb33 ], [ %a, %entry ]		; <float> [#uses=1]
-	%tmp44.pn = mul float %tmp36.pn, %b.pn509		; <float> [#uses=1]
-	%tmp46.pn = add float %tmp44.pn, %a.pn		; <float> [#uses=1]
-	%tmp53.pn = sub float 0.000000e+00, %tmp51.pn		; <float> [#uses=1]
+	%tmp44.pn = fmul float %tmp36.pn, %b.pn509		; <float> [#uses=1]
+	%tmp46.pn = fadd float %tmp44.pn, %a.pn		; <float> [#uses=1]
+	%tmp53.pn = fsub float 0.000000e+00, %tmp51.pn		; <float> [#uses=1]
 	%x.0 = fdiv float %tmp46.pn, %tmp41.pn508		; <float> [#uses=1]
 	%y.0 = fdiv float %tmp53.pn, 0.000000e+00		; <float> [#uses=1]
 	br i1 false, label %bb433, label %bb98
 
 bb98:		; preds = %bb56
-	%tmp102 = mul float 0.000000e+00, %a		; <float> [#uses=1]
-	%tmp106 = mul float 0.000000e+00, %b		; <float> [#uses=1]
+	%tmp102 = fmul float 0.000000e+00, %a		; <float> [#uses=1]
+	%tmp106 = fmul float 0.000000e+00, %b		; <float> [#uses=1]
 	br label %bb433
 
 bb433:		; preds = %bb98, %bb56
 	%x.1 = phi float [ %tmp102, %bb98 ], [ %x.0, %bb56 ]		; <float> [#uses=0]
 	%y.1 = phi float [ %tmp106, %bb98 ], [ %y.0, %bb56 ]		; <float> [#uses=1]
-	%tmp460 = add float %y.1, 0.000000e+00		; <float> [#uses=0]
+	%tmp460 = fadd float %y.1, 0.000000e+00		; <float> [#uses=0]
 	ret i64 0
 }
diff --git a/test/CodeGen/X86/2008-03-18-CoalescerBug.ll b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
index c3b4a25..4b6758d 100644
--- a/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
+++ b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll
@@ -14,7 +14,7 @@
 	%tmp30 = icmp sgt i32 %delta, 0		; <i1> [#uses=1]
 	br i1 %tmp30, label %bb33, label %bb87.preheader
 bb33:		; preds = %entry
-	%tmp28 = add float 0.000000e+00, %tmp24		; <float> [#uses=1]
+	%tmp28 = fadd float 0.000000e+00, %tmp24		; <float> [#uses=1]
 	%tmp35 = fcmp ogt float %tmp28, 1.800000e+01		; <i1> [#uses=1]
 	br i1 %tmp35, label %bb38, label %bb87.preheader
 bb38:		; preds = %bb33
@@ -24,7 +24,7 @@
 	store i32 %tmp53, i32* null, align 4
 	ret void
 bb50:		; preds = %bb38
-	%tmp56 = sub float 1.800000e+01, %tmp24		; <float> [#uses=1]
+	%tmp56 = fsub float 1.800000e+01, %tmp24		; <float> [#uses=1]
 	%tmp57 = fcmp ugt float 0.000000e+00, %tmp56		; <i1> [#uses=1]
 	br i1 %tmp57, label %bb64, label %bb87.preheader
 bb64:		; preds = %bb50
diff --git a/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll b/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
index 1e5ab99..53bb054 100644
--- a/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
+++ b/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
@@ -3,10 +3,10 @@
 define void @t() {
 entry:
 	%tmp455 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 1, i32 0, i32 3, i32 2 >		; <<4 x float>> [#uses=1]
-	%tmp457 = mul <4 x float> zeroinitializer, %tmp455		; <<4 x float>> [#uses=2]
+	%tmp457 = fmul <4 x float> zeroinitializer, %tmp455		; <<4 x float>> [#uses=2]
 	%tmp461 = shufflevector <4 x float> %tmp457, <4 x float> undef, <4 x i32> zeroinitializer		; <<4 x float>> [#uses=1]
 	%tmp465 = shufflevector <4 x float> %tmp457, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >		; <<4 x float>> [#uses=1]
-	%tmp466 = sub <4 x float> %tmp461, %tmp465		; <<4 x float>> [#uses=1]
+	%tmp466 = fsub <4 x float> %tmp461, %tmp465		; <<4 x float>> [#uses=1]
 	%tmp536 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp466, <4 x i32> < i32 0, i32 4, i32 1, i32 5 >		; <<4 x float>> [#uses=1]
 	%tmp542 = shufflevector <4 x float> %tmp536, <4 x float> zeroinitializer, <4 x i32> < i32 6, i32 7, i32 2, i32 3 >		; <<4 x float>> [#uses=1]
 	%tmp580 = bitcast <4 x float> %tmp542 to <4 x i32>		; <<4 x i32>> [#uses=1]
@@ -15,10 +15,10 @@
 	%tmp592 = bitcast <4 x i32> %tmp591 to <4 x float>		; <<4 x float>> [#uses=1]
 	%tmp609 = fdiv <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, %tmp592		; <<4 x float>> [#uses=1]
 	%tmp652 = shufflevector <4 x float> %tmp609, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 >		; <<4 x float>> [#uses=1]
-	%tmp662 = mul <4 x float> zeroinitializer, %tmp652		; <<4 x float>> [#uses=1]
+	%tmp662 = fmul <4 x float> zeroinitializer, %tmp652		; <<4 x float>> [#uses=1]
 	%tmp678 = shufflevector <4 x float> %tmp662, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >		; <<4 x float>> [#uses=1]
-	%tmp753 = mul <4 x float> zeroinitializer, %tmp678		; <<4 x float>> [#uses=1]
-	%tmp754 = sub <4 x float> zeroinitializer, %tmp753		; <<4 x float>> [#uses=1]
+	%tmp753 = fmul <4 x float> zeroinitializer, %tmp678		; <<4 x float>> [#uses=1]
+	%tmp754 = fsub <4 x float> zeroinitializer, %tmp753		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp754, <4 x float>* null, align 16
 	unreachable
 }
diff --git a/test/CodeGen/X86/2008-07-19-movups-spills.ll b/test/CodeGen/X86/2008-07-19-movups-spills.ll
index 8800357..ae30385 100644
--- a/test/CodeGen/X86/2008-07-19-movups-spills.ll
+++ b/test/CodeGen/X86/2008-07-19-movups-spills.ll
@@ -70,567 +70,567 @@
 	load <4 x float>* @29, align 1		; <<4 x float>>:30 [#uses=31]
 	load <4 x float>* @30, align 1		; <<4 x float>>:31 [#uses=32]
 	load <4 x float>* @31, align 1		; <<4 x float>>:32 [#uses=33]
-	mul <4 x float> %1, %1		; <<4 x float>>:33 [#uses=1]
-	mul <4 x float> %33, %2		; <<4 x float>>:34 [#uses=1]
-	mul <4 x float> %34, %3		; <<4 x float>>:35 [#uses=1]
-	mul <4 x float> %35, %4		; <<4 x float>>:36 [#uses=1]
-	mul <4 x float> %36, %5		; <<4 x float>>:37 [#uses=1]
-	mul <4 x float> %37, %6		; <<4 x float>>:38 [#uses=1]
-	mul <4 x float> %38, %7		; <<4 x float>>:39 [#uses=1]
-	mul <4 x float> %39, %8		; <<4 x float>>:40 [#uses=1]
-	mul <4 x float> %40, %9		; <<4 x float>>:41 [#uses=1]
-	mul <4 x float> %41, %10		; <<4 x float>>:42 [#uses=1]
-	mul <4 x float> %42, %11		; <<4 x float>>:43 [#uses=1]
-	mul <4 x float> %43, %12		; <<4 x float>>:44 [#uses=1]
-	mul <4 x float> %44, %13		; <<4 x float>>:45 [#uses=1]
-	mul <4 x float> %45, %14		; <<4 x float>>:46 [#uses=1]
-	mul <4 x float> %46, %15		; <<4 x float>>:47 [#uses=1]
-	mul <4 x float> %47, %16		; <<4 x float>>:48 [#uses=1]
-	mul <4 x float> %48, %17		; <<4 x float>>:49 [#uses=1]
-	mul <4 x float> %49, %18		; <<4 x float>>:50 [#uses=1]
-	mul <4 x float> %50, %19		; <<4 x float>>:51 [#uses=1]
-	mul <4 x float> %51, %20		; <<4 x float>>:52 [#uses=1]
-	mul <4 x float> %52, %21		; <<4 x float>>:53 [#uses=1]
-	mul <4 x float> %53, %22		; <<4 x float>>:54 [#uses=1]
-	mul <4 x float> %54, %23		; <<4 x float>>:55 [#uses=1]
-	mul <4 x float> %55, %24		; <<4 x float>>:56 [#uses=1]
-	mul <4 x float> %56, %25		; <<4 x float>>:57 [#uses=1]
-	mul <4 x float> %57, %26		; <<4 x float>>:58 [#uses=1]
-	mul <4 x float> %58, %27		; <<4 x float>>:59 [#uses=1]
-	mul <4 x float> %59, %28		; <<4 x float>>:60 [#uses=1]
-	mul <4 x float> %60, %29		; <<4 x float>>:61 [#uses=1]
-	mul <4 x float> %61, %30		; <<4 x float>>:62 [#uses=1]
-	mul <4 x float> %62, %31		; <<4 x float>>:63 [#uses=1]
-	mul <4 x float> %63, %32		; <<4 x float>>:64 [#uses=3]
-	mul <4 x float> %2, %2		; <<4 x float>>:65 [#uses=1]
-	mul <4 x float> %65, %3		; <<4 x float>>:66 [#uses=1]
-	mul <4 x float> %66, %4		; <<4 x float>>:67 [#uses=1]
-	mul <4 x float> %67, %5		; <<4 x float>>:68 [#uses=1]
-	mul <4 x float> %68, %6		; <<4 x float>>:69 [#uses=1]
-	mul <4 x float> %69, %7		; <<4 x float>>:70 [#uses=1]
-	mul <4 x float> %70, %8		; <<4 x float>>:71 [#uses=1]
-	mul <4 x float> %71, %9		; <<4 x float>>:72 [#uses=1]
-	mul <4 x float> %72, %10		; <<4 x float>>:73 [#uses=1]
-	mul <4 x float> %73, %11		; <<4 x float>>:74 [#uses=1]
-	mul <4 x float> %74, %12		; <<4 x float>>:75 [#uses=1]
-	mul <4 x float> %75, %13		; <<4 x float>>:76 [#uses=1]
-	mul <4 x float> %76, %14		; <<4 x float>>:77 [#uses=1]
-	mul <4 x float> %77, %15		; <<4 x float>>:78 [#uses=1]
-	mul <4 x float> %78, %16		; <<4 x float>>:79 [#uses=1]
-	mul <4 x float> %79, %17		; <<4 x float>>:80 [#uses=1]
-	mul <4 x float> %80, %18		; <<4 x float>>:81 [#uses=1]
-	mul <4 x float> %81, %19		; <<4 x float>>:82 [#uses=1]
-	mul <4 x float> %82, %20		; <<4 x float>>:83 [#uses=1]
-	mul <4 x float> %83, %21		; <<4 x float>>:84 [#uses=1]
-	mul <4 x float> %84, %22		; <<4 x float>>:85 [#uses=1]
-	mul <4 x float> %85, %23		; <<4 x float>>:86 [#uses=1]
-	mul <4 x float> %86, %24		; <<4 x float>>:87 [#uses=1]
-	mul <4 x float> %87, %25		; <<4 x float>>:88 [#uses=1]
-	mul <4 x float> %88, %26		; <<4 x float>>:89 [#uses=1]
-	mul <4 x float> %89, %27		; <<4 x float>>:90 [#uses=1]
-	mul <4 x float> %90, %28		; <<4 x float>>:91 [#uses=1]
-	mul <4 x float> %91, %29		; <<4 x float>>:92 [#uses=1]
-	mul <4 x float> %92, %30		; <<4 x float>>:93 [#uses=1]
-	mul <4 x float> %93, %31		; <<4 x float>>:94 [#uses=1]
-	mul <4 x float> %94, %32		; <<4 x float>>:95 [#uses=1]
-	mul <4 x float> %3, %3		; <<4 x float>>:96 [#uses=1]
-	mul <4 x float> %96, %4		; <<4 x float>>:97 [#uses=1]
-	mul <4 x float> %97, %5		; <<4 x float>>:98 [#uses=1]
-	mul <4 x float> %98, %6		; <<4 x float>>:99 [#uses=1]
-	mul <4 x float> %99, %7		; <<4 x float>>:100 [#uses=1]
-	mul <4 x float> %100, %8		; <<4 x float>>:101 [#uses=1]
-	mul <4 x float> %101, %9		; <<4 x float>>:102 [#uses=1]
-	mul <4 x float> %102, %10		; <<4 x float>>:103 [#uses=1]
-	mul <4 x float> %103, %11		; <<4 x float>>:104 [#uses=1]
-	mul <4 x float> %104, %12		; <<4 x float>>:105 [#uses=1]
-	mul <4 x float> %105, %13		; <<4 x float>>:106 [#uses=1]
-	mul <4 x float> %106, %14		; <<4 x float>>:107 [#uses=1]
-	mul <4 x float> %107, %15		; <<4 x float>>:108 [#uses=1]
-	mul <4 x float> %108, %16		; <<4 x float>>:109 [#uses=1]
-	mul <4 x float> %109, %17		; <<4 x float>>:110 [#uses=1]
-	mul <4 x float> %110, %18		; <<4 x float>>:111 [#uses=1]
-	mul <4 x float> %111, %19		; <<4 x float>>:112 [#uses=1]
-	mul <4 x float> %112, %20		; <<4 x float>>:113 [#uses=1]
-	mul <4 x float> %113, %21		; <<4 x float>>:114 [#uses=1]
-	mul <4 x float> %114, %22		; <<4 x float>>:115 [#uses=1]
-	mul <4 x float> %115, %23		; <<4 x float>>:116 [#uses=1]
-	mul <4 x float> %116, %24		; <<4 x float>>:117 [#uses=1]
-	mul <4 x float> %117, %25		; <<4 x float>>:118 [#uses=1]
-	mul <4 x float> %118, %26		; <<4 x float>>:119 [#uses=1]
-	mul <4 x float> %119, %27		; <<4 x float>>:120 [#uses=1]
-	mul <4 x float> %120, %28		; <<4 x float>>:121 [#uses=1]
-	mul <4 x float> %121, %29		; <<4 x float>>:122 [#uses=1]
-	mul <4 x float> %122, %30		; <<4 x float>>:123 [#uses=1]
-	mul <4 x float> %123, %31		; <<4 x float>>:124 [#uses=1]
-	mul <4 x float> %124, %32		; <<4 x float>>:125 [#uses=1]
-	mul <4 x float> %4, %4		; <<4 x float>>:126 [#uses=1]
-	mul <4 x float> %126, %5		; <<4 x float>>:127 [#uses=1]
-	mul <4 x float> %127, %6		; <<4 x float>>:128 [#uses=1]
-	mul <4 x float> %128, %7		; <<4 x float>>:129 [#uses=1]
-	mul <4 x float> %129, %8		; <<4 x float>>:130 [#uses=1]
-	mul <4 x float> %130, %9		; <<4 x float>>:131 [#uses=1]
-	mul <4 x float> %131, %10		; <<4 x float>>:132 [#uses=1]
-	mul <4 x float> %132, %11		; <<4 x float>>:133 [#uses=1]
-	mul <4 x float> %133, %12		; <<4 x float>>:134 [#uses=1]
-	mul <4 x float> %134, %13		; <<4 x float>>:135 [#uses=1]
-	mul <4 x float> %135, %14		; <<4 x float>>:136 [#uses=1]
-	mul <4 x float> %136, %15		; <<4 x float>>:137 [#uses=1]
-	mul <4 x float> %137, %16		; <<4 x float>>:138 [#uses=1]
-	mul <4 x float> %138, %17		; <<4 x float>>:139 [#uses=1]
-	mul <4 x float> %139, %18		; <<4 x float>>:140 [#uses=1]
-	mul <4 x float> %140, %19		; <<4 x float>>:141 [#uses=1]
-	mul <4 x float> %141, %20		; <<4 x float>>:142 [#uses=1]
-	mul <4 x float> %142, %21		; <<4 x float>>:143 [#uses=1]
-	mul <4 x float> %143, %22		; <<4 x float>>:144 [#uses=1]
-	mul <4 x float> %144, %23		; <<4 x float>>:145 [#uses=1]
-	mul <4 x float> %145, %24		; <<4 x float>>:146 [#uses=1]
-	mul <4 x float> %146, %25		; <<4 x float>>:147 [#uses=1]
-	mul <4 x float> %147, %26		; <<4 x float>>:148 [#uses=1]
-	mul <4 x float> %148, %27		; <<4 x float>>:149 [#uses=1]
-	mul <4 x float> %149, %28		; <<4 x float>>:150 [#uses=1]
-	mul <4 x float> %150, %29		; <<4 x float>>:151 [#uses=1]
-	mul <4 x float> %151, %30		; <<4 x float>>:152 [#uses=1]
-	mul <4 x float> %152, %31		; <<4 x float>>:153 [#uses=1]
-	mul <4 x float> %153, %32		; <<4 x float>>:154 [#uses=1]
-	mul <4 x float> %5, %5		; <<4 x float>>:155 [#uses=1]
-	mul <4 x float> %155, %6		; <<4 x float>>:156 [#uses=1]
-	mul <4 x float> %156, %7		; <<4 x float>>:157 [#uses=1]
-	mul <4 x float> %157, %8		; <<4 x float>>:158 [#uses=1]
-	mul <4 x float> %158, %9		; <<4 x float>>:159 [#uses=1]
-	mul <4 x float> %159, %10		; <<4 x float>>:160 [#uses=1]
-	mul <4 x float> %160, %11		; <<4 x float>>:161 [#uses=1]
-	mul <4 x float> %161, %12		; <<4 x float>>:162 [#uses=1]
-	mul <4 x float> %162, %13		; <<4 x float>>:163 [#uses=1]
-	mul <4 x float> %163, %14		; <<4 x float>>:164 [#uses=1]
-	mul <4 x float> %164, %15		; <<4 x float>>:165 [#uses=1]
-	mul <4 x float> %165, %16		; <<4 x float>>:166 [#uses=1]
-	mul <4 x float> %166, %17		; <<4 x float>>:167 [#uses=1]
-	mul <4 x float> %167, %18		; <<4 x float>>:168 [#uses=1]
-	mul <4 x float> %168, %19		; <<4 x float>>:169 [#uses=1]
-	mul <4 x float> %169, %20		; <<4 x float>>:170 [#uses=1]
-	mul <4 x float> %170, %21		; <<4 x float>>:171 [#uses=1]
-	mul <4 x float> %171, %22		; <<4 x float>>:172 [#uses=1]
-	mul <4 x float> %172, %23		; <<4 x float>>:173 [#uses=1]
-	mul <4 x float> %173, %24		; <<4 x float>>:174 [#uses=1]
-	mul <4 x float> %174, %25		; <<4 x float>>:175 [#uses=1]
-	mul <4 x float> %175, %26		; <<4 x float>>:176 [#uses=1]
-	mul <4 x float> %176, %27		; <<4 x float>>:177 [#uses=1]
-	mul <4 x float> %177, %28		; <<4 x float>>:178 [#uses=1]
-	mul <4 x float> %178, %29		; <<4 x float>>:179 [#uses=1]
-	mul <4 x float> %179, %30		; <<4 x float>>:180 [#uses=1]
-	mul <4 x float> %180, %31		; <<4 x float>>:181 [#uses=1]
-	mul <4 x float> %181, %32		; <<4 x float>>:182 [#uses=1]
-	mul <4 x float> %6, %6		; <<4 x float>>:183 [#uses=1]
-	mul <4 x float> %183, %7		; <<4 x float>>:184 [#uses=1]
-	mul <4 x float> %184, %8		; <<4 x float>>:185 [#uses=1]
-	mul <4 x float> %185, %9		; <<4 x float>>:186 [#uses=1]
-	mul <4 x float> %186, %10		; <<4 x float>>:187 [#uses=1]
-	mul <4 x float> %187, %11		; <<4 x float>>:188 [#uses=1]
-	mul <4 x float> %188, %12		; <<4 x float>>:189 [#uses=1]
-	mul <4 x float> %189, %13		; <<4 x float>>:190 [#uses=1]
-	mul <4 x float> %190, %14		; <<4 x float>>:191 [#uses=1]
-	mul <4 x float> %191, %15		; <<4 x float>>:192 [#uses=1]
-	mul <4 x float> %192, %16		; <<4 x float>>:193 [#uses=1]
-	mul <4 x float> %193, %17		; <<4 x float>>:194 [#uses=1]
-	mul <4 x float> %194, %18		; <<4 x float>>:195 [#uses=1]
-	mul <4 x float> %195, %19		; <<4 x float>>:196 [#uses=1]
-	mul <4 x float> %196, %20		; <<4 x float>>:197 [#uses=1]
-	mul <4 x float> %197, %21		; <<4 x float>>:198 [#uses=1]
-	mul <4 x float> %198, %22		; <<4 x float>>:199 [#uses=1]
-	mul <4 x float> %199, %23		; <<4 x float>>:200 [#uses=1]
-	mul <4 x float> %200, %24		; <<4 x float>>:201 [#uses=1]
-	mul <4 x float> %201, %25		; <<4 x float>>:202 [#uses=1]
-	mul <4 x float> %202, %26		; <<4 x float>>:203 [#uses=1]
-	mul <4 x float> %203, %27		; <<4 x float>>:204 [#uses=1]
-	mul <4 x float> %204, %28		; <<4 x float>>:205 [#uses=1]
-	mul <4 x float> %205, %29		; <<4 x float>>:206 [#uses=1]
-	mul <4 x float> %206, %30		; <<4 x float>>:207 [#uses=1]
-	mul <4 x float> %207, %31		; <<4 x float>>:208 [#uses=1]
-	mul <4 x float> %208, %32		; <<4 x float>>:209 [#uses=1]
-	mul <4 x float> %7, %7		; <<4 x float>>:210 [#uses=1]
-	mul <4 x float> %210, %8		; <<4 x float>>:211 [#uses=1]
-	mul <4 x float> %211, %9		; <<4 x float>>:212 [#uses=1]
-	mul <4 x float> %212, %10		; <<4 x float>>:213 [#uses=1]
-	mul <4 x float> %213, %11		; <<4 x float>>:214 [#uses=1]
-	mul <4 x float> %214, %12		; <<4 x float>>:215 [#uses=1]
-	mul <4 x float> %215, %13		; <<4 x float>>:216 [#uses=1]
-	mul <4 x float> %216, %14		; <<4 x float>>:217 [#uses=1]
-	mul <4 x float> %217, %15		; <<4 x float>>:218 [#uses=1]
-	mul <4 x float> %218, %16		; <<4 x float>>:219 [#uses=1]
-	mul <4 x float> %219, %17		; <<4 x float>>:220 [#uses=1]
-	mul <4 x float> %220, %18		; <<4 x float>>:221 [#uses=1]
-	mul <4 x float> %221, %19		; <<4 x float>>:222 [#uses=1]
-	mul <4 x float> %222, %20		; <<4 x float>>:223 [#uses=1]
-	mul <4 x float> %223, %21		; <<4 x float>>:224 [#uses=1]
-	mul <4 x float> %224, %22		; <<4 x float>>:225 [#uses=1]
-	mul <4 x float> %225, %23		; <<4 x float>>:226 [#uses=1]
-	mul <4 x float> %226, %24		; <<4 x float>>:227 [#uses=1]
-	mul <4 x float> %227, %25		; <<4 x float>>:228 [#uses=1]
-	mul <4 x float> %228, %26		; <<4 x float>>:229 [#uses=1]
-	mul <4 x float> %229, %27		; <<4 x float>>:230 [#uses=1]
-	mul <4 x float> %230, %28		; <<4 x float>>:231 [#uses=1]
-	mul <4 x float> %231, %29		; <<4 x float>>:232 [#uses=1]
-	mul <4 x float> %232, %30		; <<4 x float>>:233 [#uses=1]
-	mul <4 x float> %233, %31		; <<4 x float>>:234 [#uses=1]
-	mul <4 x float> %234, %32		; <<4 x float>>:235 [#uses=1]
-	mul <4 x float> %8, %8		; <<4 x float>>:236 [#uses=1]
-	mul <4 x float> %236, %9		; <<4 x float>>:237 [#uses=1]
-	mul <4 x float> %237, %10		; <<4 x float>>:238 [#uses=1]
-	mul <4 x float> %238, %11		; <<4 x float>>:239 [#uses=1]
-	mul <4 x float> %239, %12		; <<4 x float>>:240 [#uses=1]
-	mul <4 x float> %240, %13		; <<4 x float>>:241 [#uses=1]
-	mul <4 x float> %241, %14		; <<4 x float>>:242 [#uses=1]
-	mul <4 x float> %242, %15		; <<4 x float>>:243 [#uses=1]
-	mul <4 x float> %243, %16		; <<4 x float>>:244 [#uses=1]
-	mul <4 x float> %244, %17		; <<4 x float>>:245 [#uses=1]
-	mul <4 x float> %245, %18		; <<4 x float>>:246 [#uses=1]
-	mul <4 x float> %246, %19		; <<4 x float>>:247 [#uses=1]
-	mul <4 x float> %247, %20		; <<4 x float>>:248 [#uses=1]
-	mul <4 x float> %248, %21		; <<4 x float>>:249 [#uses=1]
-	mul <4 x float> %249, %22		; <<4 x float>>:250 [#uses=1]
-	mul <4 x float> %250, %23		; <<4 x float>>:251 [#uses=1]
-	mul <4 x float> %251, %24		; <<4 x float>>:252 [#uses=1]
-	mul <4 x float> %252, %25		; <<4 x float>>:253 [#uses=1]
-	mul <4 x float> %253, %26		; <<4 x float>>:254 [#uses=1]
-	mul <4 x float> %254, %27		; <<4 x float>>:255 [#uses=1]
-	mul <4 x float> %255, %28		; <<4 x float>>:256 [#uses=1]
-	mul <4 x float> %256, %29		; <<4 x float>>:257 [#uses=1]
-	mul <4 x float> %257, %30		; <<4 x float>>:258 [#uses=1]
-	mul <4 x float> %258, %31		; <<4 x float>>:259 [#uses=1]
-	mul <4 x float> %259, %32		; <<4 x float>>:260 [#uses=1]
-	mul <4 x float> %9, %9		; <<4 x float>>:261 [#uses=1]
-	mul <4 x float> %261, %10		; <<4 x float>>:262 [#uses=1]
-	mul <4 x float> %262, %11		; <<4 x float>>:263 [#uses=1]
-	mul <4 x float> %263, %12		; <<4 x float>>:264 [#uses=1]
-	mul <4 x float> %264, %13		; <<4 x float>>:265 [#uses=1]
-	mul <4 x float> %265, %14		; <<4 x float>>:266 [#uses=1]
-	mul <4 x float> %266, %15		; <<4 x float>>:267 [#uses=1]
-	mul <4 x float> %267, %16		; <<4 x float>>:268 [#uses=1]
-	mul <4 x float> %268, %17		; <<4 x float>>:269 [#uses=1]
-	mul <4 x float> %269, %18		; <<4 x float>>:270 [#uses=1]
-	mul <4 x float> %270, %19		; <<4 x float>>:271 [#uses=1]
-	mul <4 x float> %271, %20		; <<4 x float>>:272 [#uses=1]
-	mul <4 x float> %272, %21		; <<4 x float>>:273 [#uses=1]
-	mul <4 x float> %273, %22		; <<4 x float>>:274 [#uses=1]
-	mul <4 x float> %274, %23		; <<4 x float>>:275 [#uses=1]
-	mul <4 x float> %275, %24		; <<4 x float>>:276 [#uses=1]
-	mul <4 x float> %276, %25		; <<4 x float>>:277 [#uses=1]
-	mul <4 x float> %277, %26		; <<4 x float>>:278 [#uses=1]
-	mul <4 x float> %278, %27		; <<4 x float>>:279 [#uses=1]
-	mul <4 x float> %279, %28		; <<4 x float>>:280 [#uses=1]
-	mul <4 x float> %280, %29		; <<4 x float>>:281 [#uses=1]
-	mul <4 x float> %281, %30		; <<4 x float>>:282 [#uses=1]
-	mul <4 x float> %282, %31		; <<4 x float>>:283 [#uses=1]
-	mul <4 x float> %283, %32		; <<4 x float>>:284 [#uses=1]
-	mul <4 x float> %10, %10		; <<4 x float>>:285 [#uses=1]
-	mul <4 x float> %285, %11		; <<4 x float>>:286 [#uses=1]
-	mul <4 x float> %286, %12		; <<4 x float>>:287 [#uses=1]
-	mul <4 x float> %287, %13		; <<4 x float>>:288 [#uses=1]
-	mul <4 x float> %288, %14		; <<4 x float>>:289 [#uses=1]
-	mul <4 x float> %289, %15		; <<4 x float>>:290 [#uses=1]
-	mul <4 x float> %290, %16		; <<4 x float>>:291 [#uses=1]
-	mul <4 x float> %291, %17		; <<4 x float>>:292 [#uses=1]
-	mul <4 x float> %292, %18		; <<4 x float>>:293 [#uses=1]
-	mul <4 x float> %293, %19		; <<4 x float>>:294 [#uses=1]
-	mul <4 x float> %294, %20		; <<4 x float>>:295 [#uses=1]
-	mul <4 x float> %295, %21		; <<4 x float>>:296 [#uses=1]
-	mul <4 x float> %296, %22		; <<4 x float>>:297 [#uses=1]
-	mul <4 x float> %297, %23		; <<4 x float>>:298 [#uses=1]
-	mul <4 x float> %298, %24		; <<4 x float>>:299 [#uses=1]
-	mul <4 x float> %299, %25		; <<4 x float>>:300 [#uses=1]
-	mul <4 x float> %300, %26		; <<4 x float>>:301 [#uses=1]
-	mul <4 x float> %301, %27		; <<4 x float>>:302 [#uses=1]
-	mul <4 x float> %302, %28		; <<4 x float>>:303 [#uses=1]
-	mul <4 x float> %303, %29		; <<4 x float>>:304 [#uses=1]
-	mul <4 x float> %304, %30		; <<4 x float>>:305 [#uses=1]
-	mul <4 x float> %305, %31		; <<4 x float>>:306 [#uses=1]
-	mul <4 x float> %306, %32		; <<4 x float>>:307 [#uses=1]
-	mul <4 x float> %11, %11		; <<4 x float>>:308 [#uses=1]
-	mul <4 x float> %308, %12		; <<4 x float>>:309 [#uses=1]
-	mul <4 x float> %309, %13		; <<4 x float>>:310 [#uses=1]
-	mul <4 x float> %310, %14		; <<4 x float>>:311 [#uses=1]
-	mul <4 x float> %311, %15		; <<4 x float>>:312 [#uses=1]
-	mul <4 x float> %312, %16		; <<4 x float>>:313 [#uses=1]
-	mul <4 x float> %313, %17		; <<4 x float>>:314 [#uses=1]
-	mul <4 x float> %314, %18		; <<4 x float>>:315 [#uses=1]
-	mul <4 x float> %315, %19		; <<4 x float>>:316 [#uses=1]
-	mul <4 x float> %316, %20		; <<4 x float>>:317 [#uses=1]
-	mul <4 x float> %317, %21		; <<4 x float>>:318 [#uses=1]
-	mul <4 x float> %318, %22		; <<4 x float>>:319 [#uses=1]
-	mul <4 x float> %319, %23		; <<4 x float>>:320 [#uses=1]
-	mul <4 x float> %320, %24		; <<4 x float>>:321 [#uses=1]
-	mul <4 x float> %321, %25		; <<4 x float>>:322 [#uses=1]
-	mul <4 x float> %322, %26		; <<4 x float>>:323 [#uses=1]
-	mul <4 x float> %323, %27		; <<4 x float>>:324 [#uses=1]
-	mul <4 x float> %324, %28		; <<4 x float>>:325 [#uses=1]
-	mul <4 x float> %325, %29		; <<4 x float>>:326 [#uses=1]
-	mul <4 x float> %326, %30		; <<4 x float>>:327 [#uses=1]
-	mul <4 x float> %327, %31		; <<4 x float>>:328 [#uses=1]
-	mul <4 x float> %328, %32		; <<4 x float>>:329 [#uses=1]
-	mul <4 x float> %12, %12		; <<4 x float>>:330 [#uses=1]
-	mul <4 x float> %330, %13		; <<4 x float>>:331 [#uses=1]
-	mul <4 x float> %331, %14		; <<4 x float>>:332 [#uses=1]
-	mul <4 x float> %332, %15		; <<4 x float>>:333 [#uses=1]
-	mul <4 x float> %333, %16		; <<4 x float>>:334 [#uses=1]
-	mul <4 x float> %334, %17		; <<4 x float>>:335 [#uses=1]
-	mul <4 x float> %335, %18		; <<4 x float>>:336 [#uses=1]
-	mul <4 x float> %336, %19		; <<4 x float>>:337 [#uses=1]
-	mul <4 x float> %337, %20		; <<4 x float>>:338 [#uses=1]
-	mul <4 x float> %338, %21		; <<4 x float>>:339 [#uses=1]
-	mul <4 x float> %339, %22		; <<4 x float>>:340 [#uses=1]
-	mul <4 x float> %340, %23		; <<4 x float>>:341 [#uses=1]
-	mul <4 x float> %341, %24		; <<4 x float>>:342 [#uses=1]
-	mul <4 x float> %342, %25		; <<4 x float>>:343 [#uses=1]
-	mul <4 x float> %343, %26		; <<4 x float>>:344 [#uses=1]
-	mul <4 x float> %344, %27		; <<4 x float>>:345 [#uses=1]
-	mul <4 x float> %345, %28		; <<4 x float>>:346 [#uses=1]
-	mul <4 x float> %346, %29		; <<4 x float>>:347 [#uses=1]
-	mul <4 x float> %347, %30		; <<4 x float>>:348 [#uses=1]
-	mul <4 x float> %348, %31		; <<4 x float>>:349 [#uses=1]
-	mul <4 x float> %349, %32		; <<4 x float>>:350 [#uses=1]
-	mul <4 x float> %13, %13		; <<4 x float>>:351 [#uses=1]
-	mul <4 x float> %351, %14		; <<4 x float>>:352 [#uses=1]
-	mul <4 x float> %352, %15		; <<4 x float>>:353 [#uses=1]
-	mul <4 x float> %353, %16		; <<4 x float>>:354 [#uses=1]
-	mul <4 x float> %354, %17		; <<4 x float>>:355 [#uses=1]
-	mul <4 x float> %355, %18		; <<4 x float>>:356 [#uses=1]
-	mul <4 x float> %356, %19		; <<4 x float>>:357 [#uses=1]
-	mul <4 x float> %357, %20		; <<4 x float>>:358 [#uses=1]
-	mul <4 x float> %358, %21		; <<4 x float>>:359 [#uses=1]
-	mul <4 x float> %359, %22		; <<4 x float>>:360 [#uses=1]
-	mul <4 x float> %360, %23		; <<4 x float>>:361 [#uses=1]
-	mul <4 x float> %361, %24		; <<4 x float>>:362 [#uses=1]
-	mul <4 x float> %362, %25		; <<4 x float>>:363 [#uses=1]
-	mul <4 x float> %363, %26		; <<4 x float>>:364 [#uses=1]
-	mul <4 x float> %364, %27		; <<4 x float>>:365 [#uses=1]
-	mul <4 x float> %365, %28		; <<4 x float>>:366 [#uses=1]
-	mul <4 x float> %366, %29		; <<4 x float>>:367 [#uses=1]
-	mul <4 x float> %367, %30		; <<4 x float>>:368 [#uses=1]
-	mul <4 x float> %368, %31		; <<4 x float>>:369 [#uses=1]
-	mul <4 x float> %369, %32		; <<4 x float>>:370 [#uses=1]
-	mul <4 x float> %14, %14		; <<4 x float>>:371 [#uses=1]
-	mul <4 x float> %371, %15		; <<4 x float>>:372 [#uses=1]
-	mul <4 x float> %372, %16		; <<4 x float>>:373 [#uses=1]
-	mul <4 x float> %373, %17		; <<4 x float>>:374 [#uses=1]
-	mul <4 x float> %374, %18		; <<4 x float>>:375 [#uses=1]
-	mul <4 x float> %375, %19		; <<4 x float>>:376 [#uses=1]
-	mul <4 x float> %376, %20		; <<4 x float>>:377 [#uses=1]
-	mul <4 x float> %377, %21		; <<4 x float>>:378 [#uses=1]
-	mul <4 x float> %378, %22		; <<4 x float>>:379 [#uses=1]
-	mul <4 x float> %379, %23		; <<4 x float>>:380 [#uses=1]
-	mul <4 x float> %380, %24		; <<4 x float>>:381 [#uses=1]
-	mul <4 x float> %381, %25		; <<4 x float>>:382 [#uses=1]
-	mul <4 x float> %382, %26		; <<4 x float>>:383 [#uses=1]
-	mul <4 x float> %383, %27		; <<4 x float>>:384 [#uses=1]
-	mul <4 x float> %384, %28		; <<4 x float>>:385 [#uses=1]
-	mul <4 x float> %385, %29		; <<4 x float>>:386 [#uses=1]
-	mul <4 x float> %386, %30		; <<4 x float>>:387 [#uses=1]
-	mul <4 x float> %387, %31		; <<4 x float>>:388 [#uses=1]
-	mul <4 x float> %388, %32		; <<4 x float>>:389 [#uses=1]
-	mul <4 x float> %15, %15		; <<4 x float>>:390 [#uses=1]
-	mul <4 x float> %390, %16		; <<4 x float>>:391 [#uses=1]
-	mul <4 x float> %391, %17		; <<4 x float>>:392 [#uses=1]
-	mul <4 x float> %392, %18		; <<4 x float>>:393 [#uses=1]
-	mul <4 x float> %393, %19		; <<4 x float>>:394 [#uses=1]
-	mul <4 x float> %394, %20		; <<4 x float>>:395 [#uses=1]
-	mul <4 x float> %395, %21		; <<4 x float>>:396 [#uses=1]
-	mul <4 x float> %396, %22		; <<4 x float>>:397 [#uses=1]
-	mul <4 x float> %397, %23		; <<4 x float>>:398 [#uses=1]
-	mul <4 x float> %398, %24		; <<4 x float>>:399 [#uses=1]
-	mul <4 x float> %399, %25		; <<4 x float>>:400 [#uses=1]
-	mul <4 x float> %400, %26		; <<4 x float>>:401 [#uses=1]
-	mul <4 x float> %401, %27		; <<4 x float>>:402 [#uses=1]
-	mul <4 x float> %402, %28		; <<4 x float>>:403 [#uses=1]
-	mul <4 x float> %403, %29		; <<4 x float>>:404 [#uses=1]
-	mul <4 x float> %404, %30		; <<4 x float>>:405 [#uses=1]
-	mul <4 x float> %405, %31		; <<4 x float>>:406 [#uses=1]
-	mul <4 x float> %406, %32		; <<4 x float>>:407 [#uses=1]
-	mul <4 x float> %16, %16		; <<4 x float>>:408 [#uses=1]
-	mul <4 x float> %408, %17		; <<4 x float>>:409 [#uses=1]
-	mul <4 x float> %409, %18		; <<4 x float>>:410 [#uses=1]
-	mul <4 x float> %410, %19		; <<4 x float>>:411 [#uses=1]
-	mul <4 x float> %411, %20		; <<4 x float>>:412 [#uses=1]
-	mul <4 x float> %412, %21		; <<4 x float>>:413 [#uses=1]
-	mul <4 x float> %413, %22		; <<4 x float>>:414 [#uses=1]
-	mul <4 x float> %414, %23		; <<4 x float>>:415 [#uses=1]
-	mul <4 x float> %415, %24		; <<4 x float>>:416 [#uses=1]
-	mul <4 x float> %416, %25		; <<4 x float>>:417 [#uses=1]
-	mul <4 x float> %417, %26		; <<4 x float>>:418 [#uses=1]
-	mul <4 x float> %418, %27		; <<4 x float>>:419 [#uses=1]
-	mul <4 x float> %419, %28		; <<4 x float>>:420 [#uses=1]
-	mul <4 x float> %420, %29		; <<4 x float>>:421 [#uses=1]
-	mul <4 x float> %421, %30		; <<4 x float>>:422 [#uses=1]
-	mul <4 x float> %422, %31		; <<4 x float>>:423 [#uses=1]
-	mul <4 x float> %423, %32		; <<4 x float>>:424 [#uses=1]
-	mul <4 x float> %17, %17		; <<4 x float>>:425 [#uses=1]
-	mul <4 x float> %425, %18		; <<4 x float>>:426 [#uses=1]
-	mul <4 x float> %426, %19		; <<4 x float>>:427 [#uses=1]
-	mul <4 x float> %427, %20		; <<4 x float>>:428 [#uses=1]
-	mul <4 x float> %428, %21		; <<4 x float>>:429 [#uses=1]
-	mul <4 x float> %429, %22		; <<4 x float>>:430 [#uses=1]
-	mul <4 x float> %430, %23		; <<4 x float>>:431 [#uses=1]
-	mul <4 x float> %431, %24		; <<4 x float>>:432 [#uses=1]
-	mul <4 x float> %432, %25		; <<4 x float>>:433 [#uses=1]
-	mul <4 x float> %433, %26		; <<4 x float>>:434 [#uses=1]
-	mul <4 x float> %434, %27		; <<4 x float>>:435 [#uses=1]
-	mul <4 x float> %435, %28		; <<4 x float>>:436 [#uses=1]
-	mul <4 x float> %436, %29		; <<4 x float>>:437 [#uses=1]
-	mul <4 x float> %437, %30		; <<4 x float>>:438 [#uses=1]
-	mul <4 x float> %438, %31		; <<4 x float>>:439 [#uses=1]
-	mul <4 x float> %439, %32		; <<4 x float>>:440 [#uses=1]
-	mul <4 x float> %18, %18		; <<4 x float>>:441 [#uses=1]
-	mul <4 x float> %441, %19		; <<4 x float>>:442 [#uses=1]
-	mul <4 x float> %442, %20		; <<4 x float>>:443 [#uses=1]
-	mul <4 x float> %443, %21		; <<4 x float>>:444 [#uses=1]
-	mul <4 x float> %444, %22		; <<4 x float>>:445 [#uses=1]
-	mul <4 x float> %445, %23		; <<4 x float>>:446 [#uses=1]
-	mul <4 x float> %446, %24		; <<4 x float>>:447 [#uses=1]
-	mul <4 x float> %447, %25		; <<4 x float>>:448 [#uses=1]
-	mul <4 x float> %448, %26		; <<4 x float>>:449 [#uses=1]
-	mul <4 x float> %449, %27		; <<4 x float>>:450 [#uses=1]
-	mul <4 x float> %450, %28		; <<4 x float>>:451 [#uses=1]
-	mul <4 x float> %451, %29		; <<4 x float>>:452 [#uses=1]
-	mul <4 x float> %452, %30		; <<4 x float>>:453 [#uses=1]
-	mul <4 x float> %453, %31		; <<4 x float>>:454 [#uses=1]
-	mul <4 x float> %454, %32		; <<4 x float>>:455 [#uses=1]
-	mul <4 x float> %19, %19		; <<4 x float>>:456 [#uses=1]
-	mul <4 x float> %456, %20		; <<4 x float>>:457 [#uses=1]
-	mul <4 x float> %457, %21		; <<4 x float>>:458 [#uses=1]
-	mul <4 x float> %458, %22		; <<4 x float>>:459 [#uses=1]
-	mul <4 x float> %459, %23		; <<4 x float>>:460 [#uses=1]
-	mul <4 x float> %460, %24		; <<4 x float>>:461 [#uses=1]
-	mul <4 x float> %461, %25		; <<4 x float>>:462 [#uses=1]
-	mul <4 x float> %462, %26		; <<4 x float>>:463 [#uses=1]
-	mul <4 x float> %463, %27		; <<4 x float>>:464 [#uses=1]
-	mul <4 x float> %464, %28		; <<4 x float>>:465 [#uses=1]
-	mul <4 x float> %465, %29		; <<4 x float>>:466 [#uses=1]
-	mul <4 x float> %466, %30		; <<4 x float>>:467 [#uses=1]
-	mul <4 x float> %467, %31		; <<4 x float>>:468 [#uses=1]
-	mul <4 x float> %468, %32		; <<4 x float>>:469 [#uses=1]
-	mul <4 x float> %20, %20		; <<4 x float>>:470 [#uses=1]
-	mul <4 x float> %470, %21		; <<4 x float>>:471 [#uses=1]
-	mul <4 x float> %471, %22		; <<4 x float>>:472 [#uses=1]
-	mul <4 x float> %472, %23		; <<4 x float>>:473 [#uses=1]
-	mul <4 x float> %473, %24		; <<4 x float>>:474 [#uses=1]
-	mul <4 x float> %474, %25		; <<4 x float>>:475 [#uses=1]
-	mul <4 x float> %475, %26		; <<4 x float>>:476 [#uses=1]
-	mul <4 x float> %476, %27		; <<4 x float>>:477 [#uses=1]
-	mul <4 x float> %477, %28		; <<4 x float>>:478 [#uses=1]
-	mul <4 x float> %478, %29		; <<4 x float>>:479 [#uses=1]
-	mul <4 x float> %479, %30		; <<4 x float>>:480 [#uses=1]
-	mul <4 x float> %480, %31		; <<4 x float>>:481 [#uses=1]
-	mul <4 x float> %481, %32		; <<4 x float>>:482 [#uses=1]
-	mul <4 x float> %21, %21		; <<4 x float>>:483 [#uses=1]
-	mul <4 x float> %483, %22		; <<4 x float>>:484 [#uses=1]
-	mul <4 x float> %484, %23		; <<4 x float>>:485 [#uses=1]
-	mul <4 x float> %485, %24		; <<4 x float>>:486 [#uses=1]
-	mul <4 x float> %486, %25		; <<4 x float>>:487 [#uses=1]
-	mul <4 x float> %487, %26		; <<4 x float>>:488 [#uses=1]
-	mul <4 x float> %488, %27		; <<4 x float>>:489 [#uses=1]
-	mul <4 x float> %489, %28		; <<4 x float>>:490 [#uses=1]
-	mul <4 x float> %490, %29		; <<4 x float>>:491 [#uses=1]
-	mul <4 x float> %491, %30		; <<4 x float>>:492 [#uses=1]
-	mul <4 x float> %492, %31		; <<4 x float>>:493 [#uses=1]
-	mul <4 x float> %493, %32		; <<4 x float>>:494 [#uses=1]
-	mul <4 x float> %22, %22		; <<4 x float>>:495 [#uses=1]
-	mul <4 x float> %495, %23		; <<4 x float>>:496 [#uses=1]
-	mul <4 x float> %496, %24		; <<4 x float>>:497 [#uses=1]
-	mul <4 x float> %497, %25		; <<4 x float>>:498 [#uses=1]
-	mul <4 x float> %498, %26		; <<4 x float>>:499 [#uses=1]
-	mul <4 x float> %499, %27		; <<4 x float>>:500 [#uses=1]
-	mul <4 x float> %500, %28		; <<4 x float>>:501 [#uses=1]
-	mul <4 x float> %501, %29		; <<4 x float>>:502 [#uses=1]
-	mul <4 x float> %502, %30		; <<4 x float>>:503 [#uses=1]
-	mul <4 x float> %503, %31		; <<4 x float>>:504 [#uses=1]
-	mul <4 x float> %504, %32		; <<4 x float>>:505 [#uses=1]
-	mul <4 x float> %23, %23		; <<4 x float>>:506 [#uses=1]
-	mul <4 x float> %506, %24		; <<4 x float>>:507 [#uses=1]
-	mul <4 x float> %507, %25		; <<4 x float>>:508 [#uses=1]
-	mul <4 x float> %508, %26		; <<4 x float>>:509 [#uses=1]
-	mul <4 x float> %509, %27		; <<4 x float>>:510 [#uses=1]
-	mul <4 x float> %510, %28		; <<4 x float>>:511 [#uses=1]
-	mul <4 x float> %511, %29		; <<4 x float>>:512 [#uses=1]
-	mul <4 x float> %512, %30		; <<4 x float>>:513 [#uses=1]
-	mul <4 x float> %513, %31		; <<4 x float>>:514 [#uses=1]
-	mul <4 x float> %514, %32		; <<4 x float>>:515 [#uses=1]
-	mul <4 x float> %24, %24		; <<4 x float>>:516 [#uses=1]
-	mul <4 x float> %516, %25		; <<4 x float>>:517 [#uses=1]
-	mul <4 x float> %517, %26		; <<4 x float>>:518 [#uses=1]
-	mul <4 x float> %518, %27		; <<4 x float>>:519 [#uses=1]
-	mul <4 x float> %519, %28		; <<4 x float>>:520 [#uses=1]
-	mul <4 x float> %520, %29		; <<4 x float>>:521 [#uses=1]
-	mul <4 x float> %521, %30		; <<4 x float>>:522 [#uses=1]
-	mul <4 x float> %522, %31		; <<4 x float>>:523 [#uses=1]
-	mul <4 x float> %523, %32		; <<4 x float>>:524 [#uses=1]
-	mul <4 x float> %25, %25		; <<4 x float>>:525 [#uses=1]
-	mul <4 x float> %525, %26		; <<4 x float>>:526 [#uses=1]
-	mul <4 x float> %526, %27		; <<4 x float>>:527 [#uses=1]
-	mul <4 x float> %527, %28		; <<4 x float>>:528 [#uses=1]
-	mul <4 x float> %528, %29		; <<4 x float>>:529 [#uses=1]
-	mul <4 x float> %529, %30		; <<4 x float>>:530 [#uses=1]
-	mul <4 x float> %530, %31		; <<4 x float>>:531 [#uses=1]
-	mul <4 x float> %531, %32		; <<4 x float>>:532 [#uses=1]
-	mul <4 x float> %26, %26		; <<4 x float>>:533 [#uses=1]
-	mul <4 x float> %533, %27		; <<4 x float>>:534 [#uses=1]
-	mul <4 x float> %534, %28		; <<4 x float>>:535 [#uses=1]
-	mul <4 x float> %535, %29		; <<4 x float>>:536 [#uses=1]
-	mul <4 x float> %536, %30		; <<4 x float>>:537 [#uses=1]
-	mul <4 x float> %537, %31		; <<4 x float>>:538 [#uses=1]
-	mul <4 x float> %538, %32		; <<4 x float>>:539 [#uses=1]
-	mul <4 x float> %27, %27		; <<4 x float>>:540 [#uses=1]
-	mul <4 x float> %540, %28		; <<4 x float>>:541 [#uses=1]
-	mul <4 x float> %541, %29		; <<4 x float>>:542 [#uses=1]
-	mul <4 x float> %542, %30		; <<4 x float>>:543 [#uses=1]
-	mul <4 x float> %543, %31		; <<4 x float>>:544 [#uses=1]
-	mul <4 x float> %544, %32		; <<4 x float>>:545 [#uses=1]
-	mul <4 x float> %28, %28		; <<4 x float>>:546 [#uses=1]
-	mul <4 x float> %546, %29		; <<4 x float>>:547 [#uses=1]
-	mul <4 x float> %547, %30		; <<4 x float>>:548 [#uses=1]
-	mul <4 x float> %548, %31		; <<4 x float>>:549 [#uses=1]
-	mul <4 x float> %549, %32		; <<4 x float>>:550 [#uses=1]
-	mul <4 x float> %29, %29		; <<4 x float>>:551 [#uses=1]
-	mul <4 x float> %551, %30		; <<4 x float>>:552 [#uses=1]
-	mul <4 x float> %552, %31		; <<4 x float>>:553 [#uses=1]
-	mul <4 x float> %553, %32		; <<4 x float>>:554 [#uses=1]
-	mul <4 x float> %30, %30		; <<4 x float>>:555 [#uses=1]
-	mul <4 x float> %555, %31		; <<4 x float>>:556 [#uses=1]
-	mul <4 x float> %556, %32		; <<4 x float>>:557 [#uses=1]
-	mul <4 x float> %31, %31		; <<4 x float>>:558 [#uses=1]
-	mul <4 x float> %558, %32		; <<4 x float>>:559 [#uses=1]
-	mul <4 x float> %32, %32		; <<4 x float>>:560 [#uses=1]
-	add <4 x float> %64, %64		; <<4 x float>>:561 [#uses=1]
-	add <4 x float> %561, %64		; <<4 x float>>:562 [#uses=1]
-	add <4 x float> %562, %95		; <<4 x float>>:563 [#uses=1]
-	add <4 x float> %563, %125		; <<4 x float>>:564 [#uses=1]
-	add <4 x float> %564, %154		; <<4 x float>>:565 [#uses=1]
-	add <4 x float> %565, %182		; <<4 x float>>:566 [#uses=1]
-	add <4 x float> %566, %209		; <<4 x float>>:567 [#uses=1]
-	add <4 x float> %567, %235		; <<4 x float>>:568 [#uses=1]
-	add <4 x float> %568, %260		; <<4 x float>>:569 [#uses=1]
-	add <4 x float> %569, %284		; <<4 x float>>:570 [#uses=1]
-	add <4 x float> %570, %307		; <<4 x float>>:571 [#uses=1]
-	add <4 x float> %571, %329		; <<4 x float>>:572 [#uses=1]
-	add <4 x float> %572, %350		; <<4 x float>>:573 [#uses=1]
-	add <4 x float> %573, %370		; <<4 x float>>:574 [#uses=1]
-	add <4 x float> %574, %389		; <<4 x float>>:575 [#uses=1]
-	add <4 x float> %575, %407		; <<4 x float>>:576 [#uses=1]
-	add <4 x float> %576, %424		; <<4 x float>>:577 [#uses=1]
-	add <4 x float> %577, %440		; <<4 x float>>:578 [#uses=1]
-	add <4 x float> %578, %455		; <<4 x float>>:579 [#uses=1]
-	add <4 x float> %579, %469		; <<4 x float>>:580 [#uses=1]
-	add <4 x float> %580, %482		; <<4 x float>>:581 [#uses=1]
-	add <4 x float> %581, %494		; <<4 x float>>:582 [#uses=1]
-	add <4 x float> %582, %505		; <<4 x float>>:583 [#uses=1]
-	add <4 x float> %583, %515		; <<4 x float>>:584 [#uses=1]
-	add <4 x float> %584, %524		; <<4 x float>>:585 [#uses=1]
-	add <4 x float> %585, %532		; <<4 x float>>:586 [#uses=1]
-	add <4 x float> %586, %539		; <<4 x float>>:587 [#uses=1]
-	add <4 x float> %587, %545		; <<4 x float>>:588 [#uses=1]
-	add <4 x float> %588, %550		; <<4 x float>>:589 [#uses=1]
-	add <4 x float> %589, %554		; <<4 x float>>:590 [#uses=1]
-	add <4 x float> %590, %557		; <<4 x float>>:591 [#uses=1]
-	add <4 x float> %591, %559		; <<4 x float>>:592 [#uses=1]
-	add <4 x float> %592, %560		; <<4 x float>>:593 [#uses=1]
+	fmul <4 x float> %1, %1		; <<4 x float>>:33 [#uses=1]
+	fmul <4 x float> %33, %2		; <<4 x float>>:34 [#uses=1]
+	fmul <4 x float> %34, %3		; <<4 x float>>:35 [#uses=1]
+	fmul <4 x float> %35, %4		; <<4 x float>>:36 [#uses=1]
+	fmul <4 x float> %36, %5		; <<4 x float>>:37 [#uses=1]
+	fmul <4 x float> %37, %6		; <<4 x float>>:38 [#uses=1]
+	fmul <4 x float> %38, %7		; <<4 x float>>:39 [#uses=1]
+	fmul <4 x float> %39, %8		; <<4 x float>>:40 [#uses=1]
+	fmul <4 x float> %40, %9		; <<4 x float>>:41 [#uses=1]
+	fmul <4 x float> %41, %10		; <<4 x float>>:42 [#uses=1]
+	fmul <4 x float> %42, %11		; <<4 x float>>:43 [#uses=1]
+	fmul <4 x float> %43, %12		; <<4 x float>>:44 [#uses=1]
+	fmul <4 x float> %44, %13		; <<4 x float>>:45 [#uses=1]
+	fmul <4 x float> %45, %14		; <<4 x float>>:46 [#uses=1]
+	fmul <4 x float> %46, %15		; <<4 x float>>:47 [#uses=1]
+	fmul <4 x float> %47, %16		; <<4 x float>>:48 [#uses=1]
+	fmul <4 x float> %48, %17		; <<4 x float>>:49 [#uses=1]
+	fmul <4 x float> %49, %18		; <<4 x float>>:50 [#uses=1]
+	fmul <4 x float> %50, %19		; <<4 x float>>:51 [#uses=1]
+	fmul <4 x float> %51, %20		; <<4 x float>>:52 [#uses=1]
+	fmul <4 x float> %52, %21		; <<4 x float>>:53 [#uses=1]
+	fmul <4 x float> %53, %22		; <<4 x float>>:54 [#uses=1]
+	fmul <4 x float> %54, %23		; <<4 x float>>:55 [#uses=1]
+	fmul <4 x float> %55, %24		; <<4 x float>>:56 [#uses=1]
+	fmul <4 x float> %56, %25		; <<4 x float>>:57 [#uses=1]
+	fmul <4 x float> %57, %26		; <<4 x float>>:58 [#uses=1]
+	fmul <4 x float> %58, %27		; <<4 x float>>:59 [#uses=1]
+	fmul <4 x float> %59, %28		; <<4 x float>>:60 [#uses=1]
+	fmul <4 x float> %60, %29		; <<4 x float>>:61 [#uses=1]
+	fmul <4 x float> %61, %30		; <<4 x float>>:62 [#uses=1]
+	fmul <4 x float> %62, %31		; <<4 x float>>:63 [#uses=1]
+	fmul <4 x float> %63, %32		; <<4 x float>>:64 [#uses=3]
+	fmul <4 x float> %2, %2		; <<4 x float>>:65 [#uses=1]
+	fmul <4 x float> %65, %3		; <<4 x float>>:66 [#uses=1]
+	fmul <4 x float> %66, %4		; <<4 x float>>:67 [#uses=1]
+	fmul <4 x float> %67, %5		; <<4 x float>>:68 [#uses=1]
+	fmul <4 x float> %68, %6		; <<4 x float>>:69 [#uses=1]
+	fmul <4 x float> %69, %7		; <<4 x float>>:70 [#uses=1]
+	fmul <4 x float> %70, %8		; <<4 x float>>:71 [#uses=1]
+	fmul <4 x float> %71, %9		; <<4 x float>>:72 [#uses=1]
+	fmul <4 x float> %72, %10		; <<4 x float>>:73 [#uses=1]
+	fmul <4 x float> %73, %11		; <<4 x float>>:74 [#uses=1]
+	fmul <4 x float> %74, %12		; <<4 x float>>:75 [#uses=1]
+	fmul <4 x float> %75, %13		; <<4 x float>>:76 [#uses=1]
+	fmul <4 x float> %76, %14		; <<4 x float>>:77 [#uses=1]
+	fmul <4 x float> %77, %15		; <<4 x float>>:78 [#uses=1]
+	fmul <4 x float> %78, %16		; <<4 x float>>:79 [#uses=1]
+	fmul <4 x float> %79, %17		; <<4 x float>>:80 [#uses=1]
+	fmul <4 x float> %80, %18		; <<4 x float>>:81 [#uses=1]
+	fmul <4 x float> %81, %19		; <<4 x float>>:82 [#uses=1]
+	fmul <4 x float> %82, %20		; <<4 x float>>:83 [#uses=1]
+	fmul <4 x float> %83, %21		; <<4 x float>>:84 [#uses=1]
+	fmul <4 x float> %84, %22		; <<4 x float>>:85 [#uses=1]
+	fmul <4 x float> %85, %23		; <<4 x float>>:86 [#uses=1]
+	fmul <4 x float> %86, %24		; <<4 x float>>:87 [#uses=1]
+	fmul <4 x float> %87, %25		; <<4 x float>>:88 [#uses=1]
+	fmul <4 x float> %88, %26		; <<4 x float>>:89 [#uses=1]
+	fmul <4 x float> %89, %27		; <<4 x float>>:90 [#uses=1]
+	fmul <4 x float> %90, %28		; <<4 x float>>:91 [#uses=1]
+	fmul <4 x float> %91, %29		; <<4 x float>>:92 [#uses=1]
+	fmul <4 x float> %92, %30		; <<4 x float>>:93 [#uses=1]
+	fmul <4 x float> %93, %31		; <<4 x float>>:94 [#uses=1]
+	fmul <4 x float> %94, %32		; <<4 x float>>:95 [#uses=1]
+	fmul <4 x float> %3, %3		; <<4 x float>>:96 [#uses=1]
+	fmul <4 x float> %96, %4		; <<4 x float>>:97 [#uses=1]
+	fmul <4 x float> %97, %5		; <<4 x float>>:98 [#uses=1]
+	fmul <4 x float> %98, %6		; <<4 x float>>:99 [#uses=1]
+	fmul <4 x float> %99, %7		; <<4 x float>>:100 [#uses=1]
+	fmul <4 x float> %100, %8		; <<4 x float>>:101 [#uses=1]
+	fmul <4 x float> %101, %9		; <<4 x float>>:102 [#uses=1]
+	fmul <4 x float> %102, %10		; <<4 x float>>:103 [#uses=1]
+	fmul <4 x float> %103, %11		; <<4 x float>>:104 [#uses=1]
+	fmul <4 x float> %104, %12		; <<4 x float>>:105 [#uses=1]
+	fmul <4 x float> %105, %13		; <<4 x float>>:106 [#uses=1]
+	fmul <4 x float> %106, %14		; <<4 x float>>:107 [#uses=1]
+	fmul <4 x float> %107, %15		; <<4 x float>>:108 [#uses=1]
+	fmul <4 x float> %108, %16		; <<4 x float>>:109 [#uses=1]
+	fmul <4 x float> %109, %17		; <<4 x float>>:110 [#uses=1]
+	fmul <4 x float> %110, %18		; <<4 x float>>:111 [#uses=1]
+	fmul <4 x float> %111, %19		; <<4 x float>>:112 [#uses=1]
+	fmul <4 x float> %112, %20		; <<4 x float>>:113 [#uses=1]
+	fmul <4 x float> %113, %21		; <<4 x float>>:114 [#uses=1]
+	fmul <4 x float> %114, %22		; <<4 x float>>:115 [#uses=1]
+	fmul <4 x float> %115, %23		; <<4 x float>>:116 [#uses=1]
+	fmul <4 x float> %116, %24		; <<4 x float>>:117 [#uses=1]
+	fmul <4 x float> %117, %25		; <<4 x float>>:118 [#uses=1]
+	fmul <4 x float> %118, %26		; <<4 x float>>:119 [#uses=1]
+	fmul <4 x float> %119, %27		; <<4 x float>>:120 [#uses=1]
+	fmul <4 x float> %120, %28		; <<4 x float>>:121 [#uses=1]
+	fmul <4 x float> %121, %29		; <<4 x float>>:122 [#uses=1]
+	fmul <4 x float> %122, %30		; <<4 x float>>:123 [#uses=1]
+	fmul <4 x float> %123, %31		; <<4 x float>>:124 [#uses=1]
+	fmul <4 x float> %124, %32		; <<4 x float>>:125 [#uses=1]
+	fmul <4 x float> %4, %4		; <<4 x float>>:126 [#uses=1]
+	fmul <4 x float> %126, %5		; <<4 x float>>:127 [#uses=1]
+	fmul <4 x float> %127, %6		; <<4 x float>>:128 [#uses=1]
+	fmul <4 x float> %128, %7		; <<4 x float>>:129 [#uses=1]
+	fmul <4 x float> %129, %8		; <<4 x float>>:130 [#uses=1]
+	fmul <4 x float> %130, %9		; <<4 x float>>:131 [#uses=1]
+	fmul <4 x float> %131, %10		; <<4 x float>>:132 [#uses=1]
+	fmul <4 x float> %132, %11		; <<4 x float>>:133 [#uses=1]
+	fmul <4 x float> %133, %12		; <<4 x float>>:134 [#uses=1]
+	fmul <4 x float> %134, %13		; <<4 x float>>:135 [#uses=1]
+	fmul <4 x float> %135, %14		; <<4 x float>>:136 [#uses=1]
+	fmul <4 x float> %136, %15		; <<4 x float>>:137 [#uses=1]
+	fmul <4 x float> %137, %16		; <<4 x float>>:138 [#uses=1]
+	fmul <4 x float> %138, %17		; <<4 x float>>:139 [#uses=1]
+	fmul <4 x float> %139, %18		; <<4 x float>>:140 [#uses=1]
+	fmul <4 x float> %140, %19		; <<4 x float>>:141 [#uses=1]
+	fmul <4 x float> %141, %20		; <<4 x float>>:142 [#uses=1]
+	fmul <4 x float> %142, %21		; <<4 x float>>:143 [#uses=1]
+	fmul <4 x float> %143, %22		; <<4 x float>>:144 [#uses=1]
+	fmul <4 x float> %144, %23		; <<4 x float>>:145 [#uses=1]
+	fmul <4 x float> %145, %24		; <<4 x float>>:146 [#uses=1]
+	fmul <4 x float> %146, %25		; <<4 x float>>:147 [#uses=1]
+	fmul <4 x float> %147, %26		; <<4 x float>>:148 [#uses=1]
+	fmul <4 x float> %148, %27		; <<4 x float>>:149 [#uses=1]
+	fmul <4 x float> %149, %28		; <<4 x float>>:150 [#uses=1]
+	fmul <4 x float> %150, %29		; <<4 x float>>:151 [#uses=1]
+	fmul <4 x float> %151, %30		; <<4 x float>>:152 [#uses=1]
+	fmul <4 x float> %152, %31		; <<4 x float>>:153 [#uses=1]
+	fmul <4 x float> %153, %32		; <<4 x float>>:154 [#uses=1]
+	fmul <4 x float> %5, %5		; <<4 x float>>:155 [#uses=1]
+	fmul <4 x float> %155, %6		; <<4 x float>>:156 [#uses=1]
+	fmul <4 x float> %156, %7		; <<4 x float>>:157 [#uses=1]
+	fmul <4 x float> %157, %8		; <<4 x float>>:158 [#uses=1]
+	fmul <4 x float> %158, %9		; <<4 x float>>:159 [#uses=1]
+	fmul <4 x float> %159, %10		; <<4 x float>>:160 [#uses=1]
+	fmul <4 x float> %160, %11		; <<4 x float>>:161 [#uses=1]
+	fmul <4 x float> %161, %12		; <<4 x float>>:162 [#uses=1]
+	fmul <4 x float> %162, %13		; <<4 x float>>:163 [#uses=1]
+	fmul <4 x float> %163, %14		; <<4 x float>>:164 [#uses=1]
+	fmul <4 x float> %164, %15		; <<4 x float>>:165 [#uses=1]
+	fmul <4 x float> %165, %16		; <<4 x float>>:166 [#uses=1]
+	fmul <4 x float> %166, %17		; <<4 x float>>:167 [#uses=1]
+	fmul <4 x float> %167, %18		; <<4 x float>>:168 [#uses=1]
+	fmul <4 x float> %168, %19		; <<4 x float>>:169 [#uses=1]
+	fmul <4 x float> %169, %20		; <<4 x float>>:170 [#uses=1]
+	fmul <4 x float> %170, %21		; <<4 x float>>:171 [#uses=1]
+	fmul <4 x float> %171, %22		; <<4 x float>>:172 [#uses=1]
+	fmul <4 x float> %172, %23		; <<4 x float>>:173 [#uses=1]
+	fmul <4 x float> %173, %24		; <<4 x float>>:174 [#uses=1]
+	fmul <4 x float> %174, %25		; <<4 x float>>:175 [#uses=1]
+	fmul <4 x float> %175, %26		; <<4 x float>>:176 [#uses=1]
+	fmul <4 x float> %176, %27		; <<4 x float>>:177 [#uses=1]
+	fmul <4 x float> %177, %28		; <<4 x float>>:178 [#uses=1]
+	fmul <4 x float> %178, %29		; <<4 x float>>:179 [#uses=1]
+	fmul <4 x float> %179, %30		; <<4 x float>>:180 [#uses=1]
+	fmul <4 x float> %180, %31		; <<4 x float>>:181 [#uses=1]
+	fmul <4 x float> %181, %32		; <<4 x float>>:182 [#uses=1]
+	fmul <4 x float> %6, %6		; <<4 x float>>:183 [#uses=1]
+	fmul <4 x float> %183, %7		; <<4 x float>>:184 [#uses=1]
+	fmul <4 x float> %184, %8		; <<4 x float>>:185 [#uses=1]
+	fmul <4 x float> %185, %9		; <<4 x float>>:186 [#uses=1]
+	fmul <4 x float> %186, %10		; <<4 x float>>:187 [#uses=1]
+	fmul <4 x float> %187, %11		; <<4 x float>>:188 [#uses=1]
+	fmul <4 x float> %188, %12		; <<4 x float>>:189 [#uses=1]
+	fmul <4 x float> %189, %13		; <<4 x float>>:190 [#uses=1]
+	fmul <4 x float> %190, %14		; <<4 x float>>:191 [#uses=1]
+	fmul <4 x float> %191, %15		; <<4 x float>>:192 [#uses=1]
+	fmul <4 x float> %192, %16		; <<4 x float>>:193 [#uses=1]
+	fmul <4 x float> %193, %17		; <<4 x float>>:194 [#uses=1]
+	fmul <4 x float> %194, %18		; <<4 x float>>:195 [#uses=1]
+	fmul <4 x float> %195, %19		; <<4 x float>>:196 [#uses=1]
+	fmul <4 x float> %196, %20		; <<4 x float>>:197 [#uses=1]
+	fmul <4 x float> %197, %21		; <<4 x float>>:198 [#uses=1]
+	fmul <4 x float> %198, %22		; <<4 x float>>:199 [#uses=1]
+	fmul <4 x float> %199, %23		; <<4 x float>>:200 [#uses=1]
+	fmul <4 x float> %200, %24		; <<4 x float>>:201 [#uses=1]
+	fmul <4 x float> %201, %25		; <<4 x float>>:202 [#uses=1]
+	fmul <4 x float> %202, %26		; <<4 x float>>:203 [#uses=1]
+	fmul <4 x float> %203, %27		; <<4 x float>>:204 [#uses=1]
+	fmul <4 x float> %204, %28		; <<4 x float>>:205 [#uses=1]
+	fmul <4 x float> %205, %29		; <<4 x float>>:206 [#uses=1]
+	fmul <4 x float> %206, %30		; <<4 x float>>:207 [#uses=1]
+	fmul <4 x float> %207, %31		; <<4 x float>>:208 [#uses=1]
+	fmul <4 x float> %208, %32		; <<4 x float>>:209 [#uses=1]
+	fmul <4 x float> %7, %7		; <<4 x float>>:210 [#uses=1]
+	fmul <4 x float> %210, %8		; <<4 x float>>:211 [#uses=1]
+	fmul <4 x float> %211, %9		; <<4 x float>>:212 [#uses=1]
+	fmul <4 x float> %212, %10		; <<4 x float>>:213 [#uses=1]
+	fmul <4 x float> %213, %11		; <<4 x float>>:214 [#uses=1]
+	fmul <4 x float> %214, %12		; <<4 x float>>:215 [#uses=1]
+	fmul <4 x float> %215, %13		; <<4 x float>>:216 [#uses=1]
+	fmul <4 x float> %216, %14		; <<4 x float>>:217 [#uses=1]
+	fmul <4 x float> %217, %15		; <<4 x float>>:218 [#uses=1]
+	fmul <4 x float> %218, %16		; <<4 x float>>:219 [#uses=1]
+	fmul <4 x float> %219, %17		; <<4 x float>>:220 [#uses=1]
+	fmul <4 x float> %220, %18		; <<4 x float>>:221 [#uses=1]
+	fmul <4 x float> %221, %19		; <<4 x float>>:222 [#uses=1]
+	fmul <4 x float> %222, %20		; <<4 x float>>:223 [#uses=1]
+	fmul <4 x float> %223, %21		; <<4 x float>>:224 [#uses=1]
+	fmul <4 x float> %224, %22		; <<4 x float>>:225 [#uses=1]
+	fmul <4 x float> %225, %23		; <<4 x float>>:226 [#uses=1]
+	fmul <4 x float> %226, %24		; <<4 x float>>:227 [#uses=1]
+	fmul <4 x float> %227, %25		; <<4 x float>>:228 [#uses=1]
+	fmul <4 x float> %228, %26		; <<4 x float>>:229 [#uses=1]
+	fmul <4 x float> %229, %27		; <<4 x float>>:230 [#uses=1]
+	fmul <4 x float> %230, %28		; <<4 x float>>:231 [#uses=1]
+	fmul <4 x float> %231, %29		; <<4 x float>>:232 [#uses=1]
+	fmul <4 x float> %232, %30		; <<4 x float>>:233 [#uses=1]
+	fmul <4 x float> %233, %31		; <<4 x float>>:234 [#uses=1]
+	fmul <4 x float> %234, %32		; <<4 x float>>:235 [#uses=1]
+	fmul <4 x float> %8, %8		; <<4 x float>>:236 [#uses=1]
+	fmul <4 x float> %236, %9		; <<4 x float>>:237 [#uses=1]
+	fmul <4 x float> %237, %10		; <<4 x float>>:238 [#uses=1]
+	fmul <4 x float> %238, %11		; <<4 x float>>:239 [#uses=1]
+	fmul <4 x float> %239, %12		; <<4 x float>>:240 [#uses=1]
+	fmul <4 x float> %240, %13		; <<4 x float>>:241 [#uses=1]
+	fmul <4 x float> %241, %14		; <<4 x float>>:242 [#uses=1]
+	fmul <4 x float> %242, %15		; <<4 x float>>:243 [#uses=1]
+	fmul <4 x float> %243, %16		; <<4 x float>>:244 [#uses=1]
+	fmul <4 x float> %244, %17		; <<4 x float>>:245 [#uses=1]
+	fmul <4 x float> %245, %18		; <<4 x float>>:246 [#uses=1]
+	fmul <4 x float> %246, %19		; <<4 x float>>:247 [#uses=1]
+	fmul <4 x float> %247, %20		; <<4 x float>>:248 [#uses=1]
+	fmul <4 x float> %248, %21		; <<4 x float>>:249 [#uses=1]
+	fmul <4 x float> %249, %22		; <<4 x float>>:250 [#uses=1]
+	fmul <4 x float> %250, %23		; <<4 x float>>:251 [#uses=1]
+	fmul <4 x float> %251, %24		; <<4 x float>>:252 [#uses=1]
+	fmul <4 x float> %252, %25		; <<4 x float>>:253 [#uses=1]
+	fmul <4 x float> %253, %26		; <<4 x float>>:254 [#uses=1]
+	fmul <4 x float> %254, %27		; <<4 x float>>:255 [#uses=1]
+	fmul <4 x float> %255, %28		; <<4 x float>>:256 [#uses=1]
+	fmul <4 x float> %256, %29		; <<4 x float>>:257 [#uses=1]
+	fmul <4 x float> %257, %30		; <<4 x float>>:258 [#uses=1]
+	fmul <4 x float> %258, %31		; <<4 x float>>:259 [#uses=1]
+	fmul <4 x float> %259, %32		; <<4 x float>>:260 [#uses=1]
+	fmul <4 x float> %9, %9		; <<4 x float>>:261 [#uses=1]
+	fmul <4 x float> %261, %10		; <<4 x float>>:262 [#uses=1]
+	fmul <4 x float> %262, %11		; <<4 x float>>:263 [#uses=1]
+	fmul <4 x float> %263, %12		; <<4 x float>>:264 [#uses=1]
+	fmul <4 x float> %264, %13		; <<4 x float>>:265 [#uses=1]
+	fmul <4 x float> %265, %14		; <<4 x float>>:266 [#uses=1]
+	fmul <4 x float> %266, %15		; <<4 x float>>:267 [#uses=1]
+	fmul <4 x float> %267, %16		; <<4 x float>>:268 [#uses=1]
+	fmul <4 x float> %268, %17		; <<4 x float>>:269 [#uses=1]
+	fmul <4 x float> %269, %18		; <<4 x float>>:270 [#uses=1]
+	fmul <4 x float> %270, %19		; <<4 x float>>:271 [#uses=1]
+	fmul <4 x float> %271, %20		; <<4 x float>>:272 [#uses=1]
+	fmul <4 x float> %272, %21		; <<4 x float>>:273 [#uses=1]
+	fmul <4 x float> %273, %22		; <<4 x float>>:274 [#uses=1]
+	fmul <4 x float> %274, %23		; <<4 x float>>:275 [#uses=1]
+	fmul <4 x float> %275, %24		; <<4 x float>>:276 [#uses=1]
+	fmul <4 x float> %276, %25		; <<4 x float>>:277 [#uses=1]
+	fmul <4 x float> %277, %26		; <<4 x float>>:278 [#uses=1]
+	fmul <4 x float> %278, %27		; <<4 x float>>:279 [#uses=1]
+	fmul <4 x float> %279, %28		; <<4 x float>>:280 [#uses=1]
+	fmul <4 x float> %280, %29		; <<4 x float>>:281 [#uses=1]
+	fmul <4 x float> %281, %30		; <<4 x float>>:282 [#uses=1]
+	fmul <4 x float> %282, %31		; <<4 x float>>:283 [#uses=1]
+	fmul <4 x float> %283, %32		; <<4 x float>>:284 [#uses=1]
+	fmul <4 x float> %10, %10		; <<4 x float>>:285 [#uses=1]
+	fmul <4 x float> %285, %11		; <<4 x float>>:286 [#uses=1]
+	fmul <4 x float> %286, %12		; <<4 x float>>:287 [#uses=1]
+	fmul <4 x float> %287, %13		; <<4 x float>>:288 [#uses=1]
+	fmul <4 x float> %288, %14		; <<4 x float>>:289 [#uses=1]
+	fmul <4 x float> %289, %15		; <<4 x float>>:290 [#uses=1]
+	fmul <4 x float> %290, %16		; <<4 x float>>:291 [#uses=1]
+	fmul <4 x float> %291, %17		; <<4 x float>>:292 [#uses=1]
+	fmul <4 x float> %292, %18		; <<4 x float>>:293 [#uses=1]
+	fmul <4 x float> %293, %19		; <<4 x float>>:294 [#uses=1]
+	fmul <4 x float> %294, %20		; <<4 x float>>:295 [#uses=1]
+	fmul <4 x float> %295, %21		; <<4 x float>>:296 [#uses=1]
+	fmul <4 x float> %296, %22		; <<4 x float>>:297 [#uses=1]
+	fmul <4 x float> %297, %23		; <<4 x float>>:298 [#uses=1]
+	fmul <4 x float> %298, %24		; <<4 x float>>:299 [#uses=1]
+	fmul <4 x float> %299, %25		; <<4 x float>>:300 [#uses=1]
+	fmul <4 x float> %300, %26		; <<4 x float>>:301 [#uses=1]
+	fmul <4 x float> %301, %27		; <<4 x float>>:302 [#uses=1]
+	fmul <4 x float> %302, %28		; <<4 x float>>:303 [#uses=1]
+	fmul <4 x float> %303, %29		; <<4 x float>>:304 [#uses=1]
+	fmul <4 x float> %304, %30		; <<4 x float>>:305 [#uses=1]
+	fmul <4 x float> %305, %31		; <<4 x float>>:306 [#uses=1]
+	fmul <4 x float> %306, %32		; <<4 x float>>:307 [#uses=1]
+	fmul <4 x float> %11, %11		; <<4 x float>>:308 [#uses=1]
+	fmul <4 x float> %308, %12		; <<4 x float>>:309 [#uses=1]
+	fmul <4 x float> %309, %13		; <<4 x float>>:310 [#uses=1]
+	fmul <4 x float> %310, %14		; <<4 x float>>:311 [#uses=1]
+	fmul <4 x float> %311, %15		; <<4 x float>>:312 [#uses=1]
+	fmul <4 x float> %312, %16		; <<4 x float>>:313 [#uses=1]
+	fmul <4 x float> %313, %17		; <<4 x float>>:314 [#uses=1]
+	fmul <4 x float> %314, %18		; <<4 x float>>:315 [#uses=1]
+	fmul <4 x float> %315, %19		; <<4 x float>>:316 [#uses=1]
+	fmul <4 x float> %316, %20		; <<4 x float>>:317 [#uses=1]
+	fmul <4 x float> %317, %21		; <<4 x float>>:318 [#uses=1]
+	fmul <4 x float> %318, %22		; <<4 x float>>:319 [#uses=1]
+	fmul <4 x float> %319, %23		; <<4 x float>>:320 [#uses=1]
+	fmul <4 x float> %320, %24		; <<4 x float>>:321 [#uses=1]
+	fmul <4 x float> %321, %25		; <<4 x float>>:322 [#uses=1]
+	fmul <4 x float> %322, %26		; <<4 x float>>:323 [#uses=1]
+	fmul <4 x float> %323, %27		; <<4 x float>>:324 [#uses=1]
+	fmul <4 x float> %324, %28		; <<4 x float>>:325 [#uses=1]
+	fmul <4 x float> %325, %29		; <<4 x float>>:326 [#uses=1]
+	fmul <4 x float> %326, %30		; <<4 x float>>:327 [#uses=1]
+	fmul <4 x float> %327, %31		; <<4 x float>>:328 [#uses=1]
+	fmul <4 x float> %328, %32		; <<4 x float>>:329 [#uses=1]
+	fmul <4 x float> %12, %12		; <<4 x float>>:330 [#uses=1]
+	fmul <4 x float> %330, %13		; <<4 x float>>:331 [#uses=1]
+	fmul <4 x float> %331, %14		; <<4 x float>>:332 [#uses=1]
+	fmul <4 x float> %332, %15		; <<4 x float>>:333 [#uses=1]
+	fmul <4 x float> %333, %16		; <<4 x float>>:334 [#uses=1]
+	fmul <4 x float> %334, %17		; <<4 x float>>:335 [#uses=1]
+	fmul <4 x float> %335, %18		; <<4 x float>>:336 [#uses=1]
+	fmul <4 x float> %336, %19		; <<4 x float>>:337 [#uses=1]
+	fmul <4 x float> %337, %20		; <<4 x float>>:338 [#uses=1]
+	fmul <4 x float> %338, %21		; <<4 x float>>:339 [#uses=1]
+	fmul <4 x float> %339, %22		; <<4 x float>>:340 [#uses=1]
+	fmul <4 x float> %340, %23		; <<4 x float>>:341 [#uses=1]
+	fmul <4 x float> %341, %24		; <<4 x float>>:342 [#uses=1]
+	fmul <4 x float> %342, %25		; <<4 x float>>:343 [#uses=1]
+	fmul <4 x float> %343, %26		; <<4 x float>>:344 [#uses=1]
+	fmul <4 x float> %344, %27		; <<4 x float>>:345 [#uses=1]
+	fmul <4 x float> %345, %28		; <<4 x float>>:346 [#uses=1]
+	fmul <4 x float> %346, %29		; <<4 x float>>:347 [#uses=1]
+	fmul <4 x float> %347, %30		; <<4 x float>>:348 [#uses=1]
+	fmul <4 x float> %348, %31		; <<4 x float>>:349 [#uses=1]
+	fmul <4 x float> %349, %32		; <<4 x float>>:350 [#uses=1]
+	fmul <4 x float> %13, %13		; <<4 x float>>:351 [#uses=1]
+	fmul <4 x float> %351, %14		; <<4 x float>>:352 [#uses=1]
+	fmul <4 x float> %352, %15		; <<4 x float>>:353 [#uses=1]
+	fmul <4 x float> %353, %16		; <<4 x float>>:354 [#uses=1]
+	fmul <4 x float> %354, %17		; <<4 x float>>:355 [#uses=1]
+	fmul <4 x float> %355, %18		; <<4 x float>>:356 [#uses=1]
+	fmul <4 x float> %356, %19		; <<4 x float>>:357 [#uses=1]
+	fmul <4 x float> %357, %20		; <<4 x float>>:358 [#uses=1]
+	fmul <4 x float> %358, %21		; <<4 x float>>:359 [#uses=1]
+	fmul <4 x float> %359, %22		; <<4 x float>>:360 [#uses=1]
+	fmul <4 x float> %360, %23		; <<4 x float>>:361 [#uses=1]
+	fmul <4 x float> %361, %24		; <<4 x float>>:362 [#uses=1]
+	fmul <4 x float> %362, %25		; <<4 x float>>:363 [#uses=1]
+	fmul <4 x float> %363, %26		; <<4 x float>>:364 [#uses=1]
+	fmul <4 x float> %364, %27		; <<4 x float>>:365 [#uses=1]
+	fmul <4 x float> %365, %28		; <<4 x float>>:366 [#uses=1]
+	fmul <4 x float> %366, %29		; <<4 x float>>:367 [#uses=1]
+	fmul <4 x float> %367, %30		; <<4 x float>>:368 [#uses=1]
+	fmul <4 x float> %368, %31		; <<4 x float>>:369 [#uses=1]
+	fmul <4 x float> %369, %32		; <<4 x float>>:370 [#uses=1]
+	fmul <4 x float> %14, %14		; <<4 x float>>:371 [#uses=1]
+	fmul <4 x float> %371, %15		; <<4 x float>>:372 [#uses=1]
+	fmul <4 x float> %372, %16		; <<4 x float>>:373 [#uses=1]
+	fmul <4 x float> %373, %17		; <<4 x float>>:374 [#uses=1]
+	fmul <4 x float> %374, %18		; <<4 x float>>:375 [#uses=1]
+	fmul <4 x float> %375, %19		; <<4 x float>>:376 [#uses=1]
+	fmul <4 x float> %376, %20		; <<4 x float>>:377 [#uses=1]
+	fmul <4 x float> %377, %21		; <<4 x float>>:378 [#uses=1]
+	fmul <4 x float> %378, %22		; <<4 x float>>:379 [#uses=1]
+	fmul <4 x float> %379, %23		; <<4 x float>>:380 [#uses=1]
+	fmul <4 x float> %380, %24		; <<4 x float>>:381 [#uses=1]
+	fmul <4 x float> %381, %25		; <<4 x float>>:382 [#uses=1]
+	fmul <4 x float> %382, %26		; <<4 x float>>:383 [#uses=1]
+	fmul <4 x float> %383, %27		; <<4 x float>>:384 [#uses=1]
+	fmul <4 x float> %384, %28		; <<4 x float>>:385 [#uses=1]
+	fmul <4 x float> %385, %29		; <<4 x float>>:386 [#uses=1]
+	fmul <4 x float> %386, %30		; <<4 x float>>:387 [#uses=1]
+	fmul <4 x float> %387, %31		; <<4 x float>>:388 [#uses=1]
+	fmul <4 x float> %388, %32		; <<4 x float>>:389 [#uses=1]
+	fmul <4 x float> %15, %15		; <<4 x float>>:390 [#uses=1]
+	fmul <4 x float> %390, %16		; <<4 x float>>:391 [#uses=1]
+	fmul <4 x float> %391, %17		; <<4 x float>>:392 [#uses=1]
+	fmul <4 x float> %392, %18		; <<4 x float>>:393 [#uses=1]
+	fmul <4 x float> %393, %19		; <<4 x float>>:394 [#uses=1]
+	fmul <4 x float> %394, %20		; <<4 x float>>:395 [#uses=1]
+	fmul <4 x float> %395, %21		; <<4 x float>>:396 [#uses=1]
+	fmul <4 x float> %396, %22		; <<4 x float>>:397 [#uses=1]
+	fmul <4 x float> %397, %23		; <<4 x float>>:398 [#uses=1]
+	fmul <4 x float> %398, %24		; <<4 x float>>:399 [#uses=1]
+	fmul <4 x float> %399, %25		; <<4 x float>>:400 [#uses=1]
+	fmul <4 x float> %400, %26		; <<4 x float>>:401 [#uses=1]
+	fmul <4 x float> %401, %27		; <<4 x float>>:402 [#uses=1]
+	fmul <4 x float> %402, %28		; <<4 x float>>:403 [#uses=1]
+	fmul <4 x float> %403, %29		; <<4 x float>>:404 [#uses=1]
+	fmul <4 x float> %404, %30		; <<4 x float>>:405 [#uses=1]
+	fmul <4 x float> %405, %31		; <<4 x float>>:406 [#uses=1]
+	fmul <4 x float> %406, %32		; <<4 x float>>:407 [#uses=1]
+	fmul <4 x float> %16, %16		; <<4 x float>>:408 [#uses=1]
+	fmul <4 x float> %408, %17		; <<4 x float>>:409 [#uses=1]
+	fmul <4 x float> %409, %18		; <<4 x float>>:410 [#uses=1]
+	fmul <4 x float> %410, %19		; <<4 x float>>:411 [#uses=1]
+	fmul <4 x float> %411, %20		; <<4 x float>>:412 [#uses=1]
+	fmul <4 x float> %412, %21		; <<4 x float>>:413 [#uses=1]
+	fmul <4 x float> %413, %22		; <<4 x float>>:414 [#uses=1]
+	fmul <4 x float> %414, %23		; <<4 x float>>:415 [#uses=1]
+	fmul <4 x float> %415, %24		; <<4 x float>>:416 [#uses=1]
+	fmul <4 x float> %416, %25		; <<4 x float>>:417 [#uses=1]
+	fmul <4 x float> %417, %26		; <<4 x float>>:418 [#uses=1]
+	fmul <4 x float> %418, %27		; <<4 x float>>:419 [#uses=1]
+	fmul <4 x float> %419, %28		; <<4 x float>>:420 [#uses=1]
+	fmul <4 x float> %420, %29		; <<4 x float>>:421 [#uses=1]
+	fmul <4 x float> %421, %30		; <<4 x float>>:422 [#uses=1]
+	fmul <4 x float> %422, %31		; <<4 x float>>:423 [#uses=1]
+	fmul <4 x float> %423, %32		; <<4 x float>>:424 [#uses=1]
+	fmul <4 x float> %17, %17		; <<4 x float>>:425 [#uses=1]
+	fmul <4 x float> %425, %18		; <<4 x float>>:426 [#uses=1]
+	fmul <4 x float> %426, %19		; <<4 x float>>:427 [#uses=1]
+	fmul <4 x float> %427, %20		; <<4 x float>>:428 [#uses=1]
+	fmul <4 x float> %428, %21		; <<4 x float>>:429 [#uses=1]
+	fmul <4 x float> %429, %22		; <<4 x float>>:430 [#uses=1]
+	fmul <4 x float> %430, %23		; <<4 x float>>:431 [#uses=1]
+	fmul <4 x float> %431, %24		; <<4 x float>>:432 [#uses=1]
+	fmul <4 x float> %432, %25		; <<4 x float>>:433 [#uses=1]
+	fmul <4 x float> %433, %26		; <<4 x float>>:434 [#uses=1]
+	fmul <4 x float> %434, %27		; <<4 x float>>:435 [#uses=1]
+	fmul <4 x float> %435, %28		; <<4 x float>>:436 [#uses=1]
+	fmul <4 x float> %436, %29		; <<4 x float>>:437 [#uses=1]
+	fmul <4 x float> %437, %30		; <<4 x float>>:438 [#uses=1]
+	fmul <4 x float> %438, %31		; <<4 x float>>:439 [#uses=1]
+	fmul <4 x float> %439, %32		; <<4 x float>>:440 [#uses=1]
+	fmul <4 x float> %18, %18		; <<4 x float>>:441 [#uses=1]
+	fmul <4 x float> %441, %19		; <<4 x float>>:442 [#uses=1]
+	fmul <4 x float> %442, %20		; <<4 x float>>:443 [#uses=1]
+	fmul <4 x float> %443, %21		; <<4 x float>>:444 [#uses=1]
+	fmul <4 x float> %444, %22		; <<4 x float>>:445 [#uses=1]
+	fmul <4 x float> %445, %23		; <<4 x float>>:446 [#uses=1]
+	fmul <4 x float> %446, %24		; <<4 x float>>:447 [#uses=1]
+	fmul <4 x float> %447, %25		; <<4 x float>>:448 [#uses=1]
+	fmul <4 x float> %448, %26		; <<4 x float>>:449 [#uses=1]
+	fmul <4 x float> %449, %27		; <<4 x float>>:450 [#uses=1]
+	fmul <4 x float> %450, %28		; <<4 x float>>:451 [#uses=1]
+	fmul <4 x float> %451, %29		; <<4 x float>>:452 [#uses=1]
+	fmul <4 x float> %452, %30		; <<4 x float>>:453 [#uses=1]
+	fmul <4 x float> %453, %31		; <<4 x float>>:454 [#uses=1]
+	fmul <4 x float> %454, %32		; <<4 x float>>:455 [#uses=1]
+	fmul <4 x float> %19, %19		; <<4 x float>>:456 [#uses=1]
+	fmul <4 x float> %456, %20		; <<4 x float>>:457 [#uses=1]
+	fmul <4 x float> %457, %21		; <<4 x float>>:458 [#uses=1]
+	fmul <4 x float> %458, %22		; <<4 x float>>:459 [#uses=1]
+	fmul <4 x float> %459, %23		; <<4 x float>>:460 [#uses=1]
+	fmul <4 x float> %460, %24		; <<4 x float>>:461 [#uses=1]
+	fmul <4 x float> %461, %25		; <<4 x float>>:462 [#uses=1]
+	fmul <4 x float> %462, %26		; <<4 x float>>:463 [#uses=1]
+	fmul <4 x float> %463, %27		; <<4 x float>>:464 [#uses=1]
+	fmul <4 x float> %464, %28		; <<4 x float>>:465 [#uses=1]
+	fmul <4 x float> %465, %29		; <<4 x float>>:466 [#uses=1]
+	fmul <4 x float> %466, %30		; <<4 x float>>:467 [#uses=1]
+	fmul <4 x float> %467, %31		; <<4 x float>>:468 [#uses=1]
+	fmul <4 x float> %468, %32		; <<4 x float>>:469 [#uses=1]
+	fmul <4 x float> %20, %20		; <<4 x float>>:470 [#uses=1]
+	fmul <4 x float> %470, %21		; <<4 x float>>:471 [#uses=1]
+	fmul <4 x float> %471, %22		; <<4 x float>>:472 [#uses=1]
+	fmul <4 x float> %472, %23		; <<4 x float>>:473 [#uses=1]
+	fmul <4 x float> %473, %24		; <<4 x float>>:474 [#uses=1]
+	fmul <4 x float> %474, %25		; <<4 x float>>:475 [#uses=1]
+	fmul <4 x float> %475, %26		; <<4 x float>>:476 [#uses=1]
+	fmul <4 x float> %476, %27		; <<4 x float>>:477 [#uses=1]
+	fmul <4 x float> %477, %28		; <<4 x float>>:478 [#uses=1]
+	fmul <4 x float> %478, %29		; <<4 x float>>:479 [#uses=1]
+	fmul <4 x float> %479, %30		; <<4 x float>>:480 [#uses=1]
+	fmul <4 x float> %480, %31		; <<4 x float>>:481 [#uses=1]
+	fmul <4 x float> %481, %32		; <<4 x float>>:482 [#uses=1]
+	fmul <4 x float> %21, %21		; <<4 x float>>:483 [#uses=1]
+	fmul <4 x float> %483, %22		; <<4 x float>>:484 [#uses=1]
+	fmul <4 x float> %484, %23		; <<4 x float>>:485 [#uses=1]
+	fmul <4 x float> %485, %24		; <<4 x float>>:486 [#uses=1]
+	fmul <4 x float> %486, %25		; <<4 x float>>:487 [#uses=1]
+	fmul <4 x float> %487, %26		; <<4 x float>>:488 [#uses=1]
+	fmul <4 x float> %488, %27		; <<4 x float>>:489 [#uses=1]
+	fmul <4 x float> %489, %28		; <<4 x float>>:490 [#uses=1]
+	fmul <4 x float> %490, %29		; <<4 x float>>:491 [#uses=1]
+	fmul <4 x float> %491, %30		; <<4 x float>>:492 [#uses=1]
+	fmul <4 x float> %492, %31		; <<4 x float>>:493 [#uses=1]
+	fmul <4 x float> %493, %32		; <<4 x float>>:494 [#uses=1]
+	fmul <4 x float> %22, %22		; <<4 x float>>:495 [#uses=1]
+	fmul <4 x float> %495, %23		; <<4 x float>>:496 [#uses=1]
+	fmul <4 x float> %496, %24		; <<4 x float>>:497 [#uses=1]
+	fmul <4 x float> %497, %25		; <<4 x float>>:498 [#uses=1]
+	fmul <4 x float> %498, %26		; <<4 x float>>:499 [#uses=1]
+	fmul <4 x float> %499, %27		; <<4 x float>>:500 [#uses=1]
+	fmul <4 x float> %500, %28		; <<4 x float>>:501 [#uses=1]
+	fmul <4 x float> %501, %29		; <<4 x float>>:502 [#uses=1]
+	fmul <4 x float> %502, %30		; <<4 x float>>:503 [#uses=1]
+	fmul <4 x float> %503, %31		; <<4 x float>>:504 [#uses=1]
+	fmul <4 x float> %504, %32		; <<4 x float>>:505 [#uses=1]
+	fmul <4 x float> %23, %23		; <<4 x float>>:506 [#uses=1]
+	fmul <4 x float> %506, %24		; <<4 x float>>:507 [#uses=1]
+	fmul <4 x float> %507, %25		; <<4 x float>>:508 [#uses=1]
+	fmul <4 x float> %508, %26		; <<4 x float>>:509 [#uses=1]
+	fmul <4 x float> %509, %27		; <<4 x float>>:510 [#uses=1]
+	fmul <4 x float> %510, %28		; <<4 x float>>:511 [#uses=1]
+	fmul <4 x float> %511, %29		; <<4 x float>>:512 [#uses=1]
+	fmul <4 x float> %512, %30		; <<4 x float>>:513 [#uses=1]
+	fmul <4 x float> %513, %31		; <<4 x float>>:514 [#uses=1]
+	fmul <4 x float> %514, %32		; <<4 x float>>:515 [#uses=1]
+	fmul <4 x float> %24, %24		; <<4 x float>>:516 [#uses=1]
+	fmul <4 x float> %516, %25		; <<4 x float>>:517 [#uses=1]
+	fmul <4 x float> %517, %26		; <<4 x float>>:518 [#uses=1]
+	fmul <4 x float> %518, %27		; <<4 x float>>:519 [#uses=1]
+	fmul <4 x float> %519, %28		; <<4 x float>>:520 [#uses=1]
+	fmul <4 x float> %520, %29		; <<4 x float>>:521 [#uses=1]
+	fmul <4 x float> %521, %30		; <<4 x float>>:522 [#uses=1]
+	fmul <4 x float> %522, %31		; <<4 x float>>:523 [#uses=1]
+	fmul <4 x float> %523, %32		; <<4 x float>>:524 [#uses=1]
+	fmul <4 x float> %25, %25		; <<4 x float>>:525 [#uses=1]
+	fmul <4 x float> %525, %26		; <<4 x float>>:526 [#uses=1]
+	fmul <4 x float> %526, %27		; <<4 x float>>:527 [#uses=1]
+	fmul <4 x float> %527, %28		; <<4 x float>>:528 [#uses=1]
+	fmul <4 x float> %528, %29		; <<4 x float>>:529 [#uses=1]
+	fmul <4 x float> %529, %30		; <<4 x float>>:530 [#uses=1]
+	fmul <4 x float> %530, %31		; <<4 x float>>:531 [#uses=1]
+	fmul <4 x float> %531, %32		; <<4 x float>>:532 [#uses=1]
+	fmul <4 x float> %26, %26		; <<4 x float>>:533 [#uses=1]
+	fmul <4 x float> %533, %27		; <<4 x float>>:534 [#uses=1]
+	fmul <4 x float> %534, %28		; <<4 x float>>:535 [#uses=1]
+	fmul <4 x float> %535, %29		; <<4 x float>>:536 [#uses=1]
+	fmul <4 x float> %536, %30		; <<4 x float>>:537 [#uses=1]
+	fmul <4 x float> %537, %31		; <<4 x float>>:538 [#uses=1]
+	fmul <4 x float> %538, %32		; <<4 x float>>:539 [#uses=1]
+	fmul <4 x float> %27, %27		; <<4 x float>>:540 [#uses=1]
+	fmul <4 x float> %540, %28		; <<4 x float>>:541 [#uses=1]
+	fmul <4 x float> %541, %29		; <<4 x float>>:542 [#uses=1]
+	fmul <4 x float> %542, %30		; <<4 x float>>:543 [#uses=1]
+	fmul <4 x float> %543, %31		; <<4 x float>>:544 [#uses=1]
+	fmul <4 x float> %544, %32		; <<4 x float>>:545 [#uses=1]
+	fmul <4 x float> %28, %28		; <<4 x float>>:546 [#uses=1]
+	fmul <4 x float> %546, %29		; <<4 x float>>:547 [#uses=1]
+	fmul <4 x float> %547, %30		; <<4 x float>>:548 [#uses=1]
+	fmul <4 x float> %548, %31		; <<4 x float>>:549 [#uses=1]
+	fmul <4 x float> %549, %32		; <<4 x float>>:550 [#uses=1]
+	fmul <4 x float> %29, %29		; <<4 x float>>:551 [#uses=1]
+	fmul <4 x float> %551, %30		; <<4 x float>>:552 [#uses=1]
+	fmul <4 x float> %552, %31		; <<4 x float>>:553 [#uses=1]
+	fmul <4 x float> %553, %32		; <<4 x float>>:554 [#uses=1]
+	fmul <4 x float> %30, %30		; <<4 x float>>:555 [#uses=1]
+	fmul <4 x float> %555, %31		; <<4 x float>>:556 [#uses=1]
+	fmul <4 x float> %556, %32		; <<4 x float>>:557 [#uses=1]
+	fmul <4 x float> %31, %31		; <<4 x float>>:558 [#uses=1]
+	fmul <4 x float> %558, %32		; <<4 x float>>:559 [#uses=1]
+	fmul <4 x float> %32, %32		; <<4 x float>>:560 [#uses=1]
+	fadd <4 x float> %64, %64		; <<4 x float>>:561 [#uses=1]
+	fadd <4 x float> %561, %64		; <<4 x float>>:562 [#uses=1]
+	fadd <4 x float> %562, %95		; <<4 x float>>:563 [#uses=1]
+	fadd <4 x float> %563, %125		; <<4 x float>>:564 [#uses=1]
+	fadd <4 x float> %564, %154		; <<4 x float>>:565 [#uses=1]
+	fadd <4 x float> %565, %182		; <<4 x float>>:566 [#uses=1]
+	fadd <4 x float> %566, %209		; <<4 x float>>:567 [#uses=1]
+	fadd <4 x float> %567, %235		; <<4 x float>>:568 [#uses=1]
+	fadd <4 x float> %568, %260		; <<4 x float>>:569 [#uses=1]
+	fadd <4 x float> %569, %284		; <<4 x float>>:570 [#uses=1]
+	fadd <4 x float> %570, %307		; <<4 x float>>:571 [#uses=1]
+	fadd <4 x float> %571, %329		; <<4 x float>>:572 [#uses=1]
+	fadd <4 x float> %572, %350		; <<4 x float>>:573 [#uses=1]
+	fadd <4 x float> %573, %370		; <<4 x float>>:574 [#uses=1]
+	fadd <4 x float> %574, %389		; <<4 x float>>:575 [#uses=1]
+	fadd <4 x float> %575, %407		; <<4 x float>>:576 [#uses=1]
+	fadd <4 x float> %576, %424		; <<4 x float>>:577 [#uses=1]
+	fadd <4 x float> %577, %440		; <<4 x float>>:578 [#uses=1]
+	fadd <4 x float> %578, %455		; <<4 x float>>:579 [#uses=1]
+	fadd <4 x float> %579, %469		; <<4 x float>>:580 [#uses=1]
+	fadd <4 x float> %580, %482		; <<4 x float>>:581 [#uses=1]
+	fadd <4 x float> %581, %494		; <<4 x float>>:582 [#uses=1]
+	fadd <4 x float> %582, %505		; <<4 x float>>:583 [#uses=1]
+	fadd <4 x float> %583, %515		; <<4 x float>>:584 [#uses=1]
+	fadd <4 x float> %584, %524		; <<4 x float>>:585 [#uses=1]
+	fadd <4 x float> %585, %532		; <<4 x float>>:586 [#uses=1]
+	fadd <4 x float> %586, %539		; <<4 x float>>:587 [#uses=1]
+	fadd <4 x float> %587, %545		; <<4 x float>>:588 [#uses=1]
+	fadd <4 x float> %588, %550		; <<4 x float>>:589 [#uses=1]
+	fadd <4 x float> %589, %554		; <<4 x float>>:590 [#uses=1]
+	fadd <4 x float> %590, %557		; <<4 x float>>:591 [#uses=1]
+	fadd <4 x float> %591, %559		; <<4 x float>>:592 [#uses=1]
+	fadd <4 x float> %592, %560		; <<4 x float>>:593 [#uses=1]
 	store <4 x float> %593, <4 x float>* @0, align 1
 	ret void
 }
diff --git a/test/CodeGen/X86/2008-07-23-VSetCC.ll b/test/CodeGen/X86/2008-07-23-VSetCC.ll
index 735c610..da6c089 100644
--- a/test/CodeGen/X86/2008-07-23-VSetCC.ll
+++ b/test/CodeGen/X86/2008-07-23-VSetCC.ll
@@ -13,12 +13,12 @@
 	insertelement <4 x i32> zeroinitializer, i32 %5, i32 3		; <<4 x i32>>:6 [#uses=1]
 	and <4 x i32> zeroinitializer, %6		; <<4 x i32>>:7 [#uses=1]
 	bitcast <4 x i32> %7 to <4 x float>		; <<4 x float>>:8 [#uses=1]
-	mul <4 x float> zeroinitializer, %8		; <<4 x float>>:9 [#uses=1]
+	fmul <4 x float> zeroinitializer, %8		; <<4 x float>>:9 [#uses=1]
 	bitcast <4 x float> %9 to <4 x i32>		; <<4 x i32>>:10 [#uses=1]
 	or <4 x i32> %10, zeroinitializer		; <<4 x i32>>:11 [#uses=1]
 	bitcast <4 x i32> %11 to <4 x float>		; <<4 x float>>:12 [#uses=1]
-	mul <4 x float> %12, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 >		; <<4 x float>>:13 [#uses=1]
-	sub <4 x float> %13, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 >		; <<4 x float>>:14 [#uses=1]
+	fmul <4 x float> %12, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 >		; <<4 x float>>:13 [#uses=1]
+	fsub <4 x float> %13, < float 1.000000e+02, float 1.000000e+02, float 1.000000e+02, float 1.000000e+02 >		; <<4 x float>>:14 [#uses=1]
 	extractelement <4 x float> %14, i32 3		; <float>:15 [#uses=1]
 	call float @fmaxf( float 0.000000e+00, float %15 )		; <float>:16 [#uses=0]
 	br label %bb.nph
diff --git a/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll b/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll
index b50f2b0..4e35332 100644
--- a/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll
+++ b/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll
@@ -13,7 +13,7 @@
 
 bb163:		; preds = %bb151, %entry
 	%tmp366 = load double* null, align 8		; <double> [#uses=1]
-	%tmp368 = mul double %tmp366, 0.000000e+00		; <double> [#uses=1]
+	%tmp368 = fmul double %tmp366, 0.000000e+00		; <double> [#uses=1]
 	%tmp368226 = bitcast double %tmp368 to i64		; <i64> [#uses=1]
 	br label %bb5.i
 
diff --git a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
index 2c8e12f..ad13b85 100644
--- a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
+++ b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
@@ -26,7 +26,7 @@
 	br label %bb22.preheader
 
 bb25:		; preds = %bb24.preheader
-	%7 = mul double 0.000000e+00, %6		; <double> [#uses=0]
+	%7 = fmul double 0.000000e+00, %6		; <double> [#uses=0]
 	%8 = add i32 %i3.122100, 0		; <i32> [#uses=1]
 	%9 = icmp sgt i32 %8, 0		; <i1> [#uses=1]
 	br i1 %9, label %bb3, label %bb24.preheader
@@ -37,7 +37,7 @@
 	br i1 %10, label %bb25, label %bb22.preheader
 
 bb30.loopexit:		; preds = %bb
-	%11 = mul double 0.000000e+00, 0x401921FB54442D1C		; <double> [#uses=1]
+	%11 = fmul double 0.000000e+00, 0x401921FB54442D1C		; <double> [#uses=1]
 	br label %bb3
 }
 
diff --git a/test/CodeGen/X86/2008-11-03-F80VAARG.ll b/test/CodeGen/X86/2008-11-03-F80VAARG.ll
index bb9fbdb..36a054a 100644
--- a/test/CodeGen/X86/2008-11-03-F80VAARG.ll
+++ b/test/CodeGen/X86/2008-11-03-F80VAARG.ll
@@ -12,6 +12,6 @@
 	call void @llvm.va_start(i8* %v1)
 	%t1 = va_arg i8** %ap, x86_fp80		; <x86_fp80> [#uses=1]
 	%t2 = va_arg i8** %ap, x86_fp80		; <x86_fp80> [#uses=1]
-	%t = add x86_fp80 %t1, %t2		; <x86_fp80> [#uses=1]
+	%t = fadd x86_fp80 %t1, %t2		; <x86_fp80> [#uses=1]
 	ret x86_fp80 %t
 }
diff --git a/test/CodeGen/X86/2008-12-05-SpillerCrash.ll b/test/CodeGen/X86/2008-12-05-SpillerCrash.ll
index dbb7acf..b6b5cbd 100644
--- a/test/CodeGen/X86/2008-12-05-SpillerCrash.ll
+++ b/test/CodeGen/X86/2008-12-05-SpillerCrash.ll
@@ -145,7 +145,7 @@
 	%20 = add <4 x i32> %19, zeroinitializer		; <<4 x i32>> [#uses=3]
 	%21 = load i32* null, align 4		; <i32> [#uses=0]
 	%22 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> zeroinitializer) nounwind readnone		; <<4 x float>> [#uses=1]
-	%23 = mul <4 x float> %22, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 >		; <<4 x float>> [#uses=1]
+	%23 = fmul <4 x float> %22, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 >		; <<4 x float>> [#uses=1]
 	%tmp2114.i119.i.i = extractelement <4 x i32> %20, i32 1		; <i32> [#uses=1]
 	%24 = shl i32 %tmp2114.i119.i.i, 2		; <i32> [#uses=1]
 	%25 = getelementptr i8* %11, i32 %24		; <i8*> [#uses=1]
@@ -160,7 +160,7 @@
 	%33 = bitcast <8 x i16> %32 to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%34 = shufflevector <4 x i32> %33, <4 x i32> undef, <4 x i32> < i32 2, i32 1, i32 0, i32 3 >		; <<4 x i32>> [#uses=1]
 	%35 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %34) nounwind readnone		; <<4 x float>> [#uses=1]
-	%36 = mul <4 x float> %35, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 >		; <<4 x float>> [#uses=1]
+	%36 = fmul <4 x float> %35, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 >		; <<4 x float>> [#uses=1]
 	%tmp2113.i124.i.i = extractelement <4 x i32> %20, i32 2		; <i32> [#uses=1]
 	%37 = shl i32 %tmp2113.i124.i.i, 2		; <i32> [#uses=1]
 	%38 = getelementptr i8* %14, i32 %37		; <i8*> [#uses=1]
@@ -175,7 +175,7 @@
 	%46 = bitcast <8 x i16> %45 to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%47 = shufflevector <4 x i32> %46, <4 x i32> undef, <4 x i32> < i32 2, i32 1, i32 0, i32 3 >		; <<4 x i32>> [#uses=1]
 	%48 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %47) nounwind readnone		; <<4 x float>> [#uses=1]
-	%49 = mul <4 x float> %48, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 >		; <<4 x float>> [#uses=1]
+	%49 = fmul <4 x float> %48, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 >		; <<4 x float>> [#uses=1]
 	%tmp2112.i129.i.i = extractelement <4 x i32> %20, i32 3		; <i32> [#uses=1]
 	%50 = shl i32 %tmp2112.i129.i.i, 2		; <i32> [#uses=1]
 	%51 = getelementptr i8* %17, i32 %50		; <i8*> [#uses=1]
@@ -190,15 +190,15 @@
 	%59 = bitcast <8 x i16> %58 to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%60 = shufflevector <4 x i32> %59, <4 x i32> undef, <4 x i32> < i32 2, i32 1, i32 0, i32 3 >		; <<4 x i32>> [#uses=1]
 	%61 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %60) nounwind readnone		; <<4 x float>> [#uses=1]
-	%62 = mul <4 x float> %61, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 >		; <<4 x float>> [#uses=1]
-	%63 = mul <4 x float> %23, zeroinitializer		; <<4 x float>> [#uses=1]
-	%64 = add <4 x float> zeroinitializer, %63		; <<4 x float>> [#uses=1]
-	%65 = mul <4 x float> %36, zeroinitializer		; <<4 x float>> [#uses=1]
-	%66 = add <4 x float> zeroinitializer, %65		; <<4 x float>> [#uses=1]
-	%67 = mul <4 x float> %49, zeroinitializer		; <<4 x float>> [#uses=1]
-	%68 = add <4 x float> zeroinitializer, %67		; <<4 x float>> [#uses=1]
-	%69 = mul <4 x float> %62, zeroinitializer		; <<4 x float>> [#uses=1]
-	%70 = add <4 x float> zeroinitializer, %69		; <<4 x float>> [#uses=1]
+	%62 = fmul <4 x float> %61, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 >		; <<4 x float>> [#uses=1]
+	%63 = fmul <4 x float> %23, zeroinitializer		; <<4 x float>> [#uses=1]
+	%64 = fadd <4 x float> zeroinitializer, %63		; <<4 x float>> [#uses=1]
+	%65 = fmul <4 x float> %36, zeroinitializer		; <<4 x float>> [#uses=1]
+	%66 = fadd <4 x float> zeroinitializer, %65		; <<4 x float>> [#uses=1]
+	%67 = fmul <4 x float> %49, zeroinitializer		; <<4 x float>> [#uses=1]
+	%68 = fadd <4 x float> zeroinitializer, %67		; <<4 x float>> [#uses=1]
+	%69 = fmul <4 x float> %62, zeroinitializer		; <<4 x float>> [#uses=1]
+	%70 = fadd <4 x float> zeroinitializer, %69		; <<4 x float>> [#uses=1]
 	%tmp7452.i.i.i = bitcast <4 x float> %64 to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%tmp7454.i.i.i = and <4 x i32> %tmp7452.i.i.i, zeroinitializer		; <<4 x i32>> [#uses=1]
 	%tmp7459.i.i.i = or <4 x i32> %tmp7454.i.i.i, zeroinitializer		; <<4 x i32>> [#uses=1]
diff --git a/test/CodeGen/X86/2009-01-16-UIntToFP.ll b/test/CodeGen/X86/2009-01-16-UIntToFP.ll
index 6de11c9..340608a 100644
--- a/test/CodeGen/X86/2009-01-16-UIntToFP.ll
+++ b/test/CodeGen/X86/2009-01-16-UIntToFP.ll
@@ -22,10 +22,10 @@
 	%5 = lshr i64 %u_addr.0, 32		; <i64> [#uses=1]
 	%6 = trunc i64 %5 to i32		; <i32> [#uses=1]
 	%7 = uitofp i32 %6 to double		; <double> [#uses=1]
-	%8 = mul double %7, 0x41F0000000000000		; <double> [#uses=1]
+	%8 = fmul double %7, 0x41F0000000000000		; <double> [#uses=1]
 	%9 = trunc i64 %u_addr.0 to i32		; <i32> [#uses=1]
 	%10 = uitofp i32 %9 to double		; <double> [#uses=1]
-	%11 = add double %10, %8		; <double> [#uses=1]
+	%11 = fadd double %10, %8		; <double> [#uses=1]
 	%12 = fptrunc double %11 to float		; <float> [#uses=1]
 	ret float %12
 }
diff --git a/test/CodeGen/X86/2009-02-12-SpillerBug.ll b/test/CodeGen/X86/2009-02-12-SpillerBug.ll
index 747dc8a..1d10319 100644
--- a/test/CodeGen/X86/2009-02-12-SpillerBug.ll
+++ b/test/CodeGen/X86/2009-02-12-SpillerBug.ll
@@ -3,9 +3,9 @@
 
 define hidden void @__mulxc3({ x86_fp80, x86_fp80 }* noalias nocapture sret %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind {
 entry:
-	%0 = mul x86_fp80 %b, %d		; <x86_fp80> [#uses=1]
-	%1 = sub x86_fp80 0xK00000000000000000000, %0		; <x86_fp80> [#uses=1]
-	%2 = add x86_fp80 0xK00000000000000000000, 0xK00000000000000000000		; <x86_fp80> [#uses=1]
+	%0 = fmul x86_fp80 %b, %d		; <x86_fp80> [#uses=1]
+	%1 = fsub x86_fp80 0xK00000000000000000000, %0		; <x86_fp80> [#uses=1]
+	%2 = fadd x86_fp80 0xK00000000000000000000, 0xK00000000000000000000		; <x86_fp80> [#uses=1]
 	%3 = fcmp uno x86_fp80 %1, 0xK00000000000000000000		; <i1> [#uses=1]
 	%4 = fcmp uno x86_fp80 %2, 0xK00000000000000000000		; <i1> [#uses=1]
 	%or.cond = and i1 %3, %4		; <i1> [#uses=1]
diff --git a/test/CodeGen/X86/2009-02-25-CommuteBug.ll b/test/CodeGen/X86/2009-02-25-CommuteBug.ll
index b772bf8..3dbfa80 100644
--- a/test/CodeGen/X86/2009-02-25-CommuteBug.ll
+++ b/test/CodeGen/X86/2009-02-25-CommuteBug.ll
@@ -7,7 +7,7 @@
 	%tmp2.i = or <2 x i64> %tmp.i2, <i64 4607632778762754458, i64 4607632778762754458>		; <<2 x i64>> [#uses=1]
 	%tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double>		; <<2 x double>> [#uses=1]
 	%0 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %A, <2 x double> %tmp3.i) nounwind readnone		; <<2 x double>> [#uses=1]
-	%tmp.i = add <2 x double> %0, %C		; <<2 x double>> [#uses=1]
+	%tmp.i = fadd <2 x double> %0, %C		; <<2 x double>> [#uses=1]
 	ret <2 x double> %tmp.i
 }
 
diff --git a/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll b/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
index 1eefaa9..6f16ced 100644
--- a/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
+++ b/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
@@ -6,7 +6,7 @@
 entry:
 	%tmp14 = zext i32 %y to i80		; <i80> [#uses=1]
 	%tmp15 = bitcast i80 %tmp14 to x86_fp80		; <x86_fp80> [#uses=1]
-	%add = add x86_fp80 %tmp15, 0xK3FFF8000000000000000		; <x86_fp80> [#uses=1]
+	%add = fadd x86_fp80 %tmp15, 0xK3FFF8000000000000000		; <x86_fp80> [#uses=1]
 	%tmp11 = bitcast x86_fp80 %add to i80		; <i80> [#uses=1]
 	%tmp10 = trunc i80 %tmp11 to i32		; <i32> [#uses=1]
 	ret i32 %tmp10
diff --git a/test/CodeGen/X86/2009-03-09-SpillerBug.ll b/test/CodeGen/X86/2009-03-09-SpillerBug.ll
index 14bdcc3..2ccd771 100644
--- a/test/CodeGen/X86/2009-03-09-SpillerBug.ll
+++ b/test/CodeGen/X86/2009-03-09-SpillerBug.ll
@@ -5,7 +5,7 @@
 entry:
 	%call = call x86_fp80 @y(x86_fp80* null, x86_fp80* null)		; <x86_fp80> [#uses=0]
 	%cmp = fcmp ord x86_fp80 %b, 0xK00000000000000000000		; <i1> [#uses=1]
-	%sub = sub x86_fp80 %b, %b		; <x86_fp80> [#uses=1]
+	%sub = fsub x86_fp80 %b, %b		; <x86_fp80> [#uses=1]
 	%cmp7 = fcmp uno x86_fp80 %sub, 0xK00000000000000000000		; <i1> [#uses=1]
 	%and12 = and i1 %cmp7, %cmp		; <i1> [#uses=1]
 	%and = zext i1 %and12 to i32		; <i32> [#uses=1]
diff --git a/test/CodeGen/X86/2009-03-12-CPAlignBug.ll b/test/CodeGen/X86/2009-03-12-CPAlignBug.ll
index 75af992..ec060e4 100644
--- a/test/CodeGen/X86/2009-03-12-CPAlignBug.ll
+++ b/test/CodeGen/X86/2009-03-12-CPAlignBug.ll
@@ -19,18 +19,18 @@
 	%0 = tail call double @llvm.sqrt.f64(double %.reload8)		; <double> [#uses=1]
 	%1 = fptrunc x86_fp80 %.reload6 to double		; <double> [#uses=1]
 	%2 = tail call double @fabs(double %1) nounwind readnone		; <double> [#uses=1]
-	%3 = add double %0, %2		; <double> [#uses=1]
+	%3 = fadd double %0, %2		; <double> [#uses=1]
 	%4 = tail call double @llvm.pow.f64(double %3, double 0x3FD5555555555555)		; <double> [#uses=1]
 	%5 = fpext double %4 to x86_fp80		; <x86_fp80> [#uses=2]
 	%6 = fdiv x86_fp80 %.reload5, %5		; <x86_fp80> [#uses=1]
-	%7 = add x86_fp80 %5, %6		; <x86_fp80> [#uses=1]
+	%7 = fadd x86_fp80 %5, %6		; <x86_fp80> [#uses=1]
 	%8 = fptrunc x86_fp80 %7 to double		; <double> [#uses=1]
 	%9 = fcmp olt x86_fp80 %.reload6, 0xK00000000000000000000		; <i1> [#uses=1]
 	%iftmp.6.0 = select i1 %9, double 1.000000e+00, double -1.000000e+00		; <double> [#uses=1]
-	%10 = mul double %8, %iftmp.6.0		; <double> [#uses=1]
+	%10 = fmul double %8, %iftmp.6.0		; <double> [#uses=1]
 	%11 = fpext double %10 to x86_fp80		; <x86_fp80> [#uses=1]
 	%12 = fdiv x86_fp80 %.reload, 0xKC000C000000000000000		; <x86_fp80> [#uses=1]
-	%13 = add x86_fp80 %11, %12		; <x86_fp80> [#uses=1]
+	%13 = fadd x86_fp80 %11, %12		; <x86_fp80> [#uses=1]
 	%14 = fptrunc x86_fp80 %13 to double		; <double> [#uses=1]
 	store double %14, double* %x, align 1
 	br label %bb1.ret.exitStub
diff --git a/test/CodeGen/X86/break-anti-dependencies.ll b/test/CodeGen/X86/break-anti-dependencies.ll
index b432c39..b9ce10f 100644
--- a/test/CodeGen/X86/break-anti-dependencies.ll
+++ b/test/CodeGen/X86/break-anti-dependencies.ll
@@ -8,18 +8,18 @@
 define void @goo(double* %r, double* %p, double* %q) nounwind {
 entry:
 	%0 = load double* %p, align 8
-	%1 = add double %0, 1.100000e+00
-	%2 = mul double %1, 1.200000e+00
-	%3 = add double %2, 1.300000e+00
-	%4 = mul double %3, 1.400000e+00
-	%5 = add double %4, 1.500000e+00
+	%1 = fadd double %0, 1.100000e+00
+	%2 = fmul double %1, 1.200000e+00
+	%3 = fadd double %2, 1.300000e+00
+	%4 = fmul double %3, 1.400000e+00
+	%5 = fadd double %4, 1.500000e+00
 	%6 = fptosi double %5 to i32
 	%7 = load double* %r, align 8
-	%8 = add double %7, 7.100000e+00
-	%9 = mul double %8, 7.200000e+00
-	%10 = add double %9, 7.300000e+00
-	%11 = mul double %10, 7.400000e+00
-	%12 = add double %11, 7.500000e+00
+	%8 = fadd double %7, 7.100000e+00
+	%9 = fmul double %8, 7.200000e+00
+	%10 = fadd double %9, 7.300000e+00
+	%11 = fmul double %10, 7.400000e+00
+	%12 = fadd double %11, 7.500000e+00
 	%13 = fptosi double %12 to i32
 	%14 = icmp slt i32 %6, %13
 	br i1 %14, label %bb, label %return
diff --git a/test/CodeGen/X86/coalescer-commute1.ll b/test/CodeGen/X86/coalescer-commute1.ll
index 0fae2a6..9939424 100644
--- a/test/CodeGen/X86/coalescer-commute1.ll
+++ b/test/CodeGen/X86/coalescer-commute1.ll
@@ -15,7 +15,7 @@
 	%tmp2 = getelementptr i32* %source, i32 %neuron.0		; <i32*> [#uses=1]
 	%tmp3 = load i32* %tmp2, align 4		; <i32> [#uses=1]
 	%tmp34 = sitofp i32 %tmp3 to float		; <float> [#uses=1]
-	%tmp6 = add float %tmp34, %thesum.0		; <float> [#uses=2]
+	%tmp6 = fadd float %tmp34, %thesum.0		; <float> [#uses=2]
 	%indvar.next = add i32 %neuron.0, 1		; <i32> [#uses=2]
 	%exitcond = icmp eq i32 %indvar.next, %tmp10		; <i1> [#uses=1]
 	br i1 %exitcond, label %bb13, label %bb
diff --git a/test/CodeGen/X86/coalescer-commute2.ll b/test/CodeGen/X86/coalescer-commute2.ll
index ce4abf1..c67e0f5 100644
--- a/test/CodeGen/X86/coalescer-commute2.ll
+++ b/test/CodeGen/X86/coalescer-commute2.ll
@@ -28,7 +28,7 @@
 entry:
         %tmp8 = shufflevector <4 x float> %V, <4 x float> undef,
                                         <4 x i32> < i32 3, i32 2, i32 1, i32 0 >
-        %add = add <4 x float> %tmp8, %V
+        %add = fadd <4 x float> %tmp8, %V
         ret <4 x float> %add
 }
 
diff --git a/test/CodeGen/X86/coalescer-commute4.ll b/test/CodeGen/X86/coalescer-commute4.ll
index 7299aca..9628f93 100644
--- a/test/CodeGen/X86/coalescer-commute4.ll
+++ b/test/CodeGen/X86/coalescer-commute4.ll
@@ -18,8 +18,8 @@
 	%tmp45 = sitofp i32 %tmp4 to float		; <float> [#uses=1]
 	%tmp8 = getelementptr float* %y, i32 %i.0.reg2mem.0		; <float*> [#uses=1]
 	%tmp9 = load float* %tmp8, align 4		; <float> [#uses=1]
-	%tmp11 = mul float %tmp9, %tmp45		; <float> [#uses=1]
-	%tmp14 = add float %tmp11, %res.0.reg2mem.0		; <float> [#uses=2]
+	%tmp11 = fmul float %tmp9, %tmp45		; <float> [#uses=1]
+	%tmp14 = fadd float %tmp11, %res.0.reg2mem.0		; <float> [#uses=2]
 	%indvar.next = add i32 %i.0.reg2mem.0, 1		; <i32> [#uses=2]
 	%exitcond = icmp eq i32 %indvar.next, %umax		; <i1> [#uses=1]
 	br i1 %exitcond, label %bb23, label %bb
diff --git a/test/CodeGen/X86/complex-fca.ll b/test/CodeGen/X86/complex-fca.ll
index 29eb6ee..05adb50 100644
--- a/test/CodeGen/X86/complex-fca.ll
+++ b/test/CodeGen/X86/complex-fca.ll
@@ -4,7 +4,7 @@
 entry:
 	%z8 = extractvalue { x86_fp80, x86_fp80 } %z, 0
 	%z9 = extractvalue { x86_fp80, x86_fp80 } %z, 1
-	%0 = sub x86_fp80 0xK80000000000000000000, %z9
+	%0 = fsub x86_fp80 0xK80000000000000000000, %z9
 	%insert = insertvalue { x86_fp80, x86_fp80 } undef, x86_fp80 %0, 0
 	%insert7 = insertvalue { x86_fp80, x86_fp80 } %insert, x86_fp80 %z8, 1
 	call void @ccoshl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %insert7) nounwind
diff --git a/test/CodeGen/X86/constant-pool-remat-0.ll b/test/CodeGen/X86/constant-pool-remat-0.ll
index 40caaa6..80be854 100644
--- a/test/CodeGen/X86/constant-pool-remat-0.ll
+++ b/test/CodeGen/X86/constant-pool-remat-0.ll
@@ -6,8 +6,8 @@
 declare float @qux(float %y)
 
 define float @array(float %a) nounwind {
-  %n = mul float %a, 9.0
+  %n = fmul float %a, 9.0
   %m = call float @qux(float %n)
-  %o = mul float %m, 9.0
+  %o = fmul float %m, 9.0
   ret float %o
 }
diff --git a/test/CodeGen/X86/extract-combine.ll b/test/CodeGen/X86/extract-combine.ll
index 9172dce..842ec24 100644
--- a/test/CodeGen/X86/extract-combine.ll
+++ b/test/CodeGen/X86/extract-combine.ll
@@ -7,9 +7,9 @@
 	%tmp518 = shufflevector <16 x float> %tmp74.i25762, <16 x float> undef, <4 x i32> <i32 12, i32 13, i32 14, i32 15>		; <<4 x float>> [#uses=1]
 	%movss.i25611 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp518, <4 x i32> <i32 4, i32 1, i32 2, i32 3>		; <<4 x float>> [#uses=1]
 	%conv3.i25615 = shufflevector <4 x float> %movss.i25611, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>		; <<4 x float>> [#uses=1]
-	%sub.i25620 = sub <4 x float> %conv3.i25615, zeroinitializer		; <<4 x float>> [#uses=1]
-	%mul.i25621 = mul <4 x float> zeroinitializer, %sub.i25620		; <<4 x float>> [#uses=1]
-	%add.i25622 = add <4 x float> zeroinitializer, %mul.i25621		; <<4 x float>> [#uses=1]
+	%sub.i25620 = fsub <4 x float> %conv3.i25615, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul.i25621 = fmul <4 x float> zeroinitializer, %sub.i25620		; <<4 x float>> [#uses=1]
+	%add.i25622 = fadd <4 x float> zeroinitializer, %mul.i25621		; <<4 x float>> [#uses=1]
 	store <4 x float> %add.i25622, <4 x float>* null
 	unreachable
 }
diff --git a/test/CodeGen/X86/fabs.ll b/test/CodeGen/X86/fabs.ll
index 0646a79..7ac8e04 100644
--- a/test/CodeGen/X86/fabs.ll
+++ b/test/CodeGen/X86/fabs.ll
@@ -16,7 +16,7 @@
 
 define double @test2(double %X) {
         %Y = fcmp oge double %X, -0.0
-        %Z = sub double -0.0, %X
+        %Z = fsub double -0.0, %X
         %Q = select i1 %Y, double %X, double %Z
         ret double %Q
 }
diff --git a/test/CodeGen/X86/fast-isel.ll b/test/CodeGen/X86/fast-isel.ll
index 2ee2c83..a9a016b 100644
--- a/test/CodeGen/X86/fast-isel.ll
+++ b/test/CodeGen/X86/fast-isel.ll
@@ -32,10 +32,10 @@
   br label %fast
 
 fast:
-  %t0 = add double %r, %s
-  %t1 = mul double %t0, %s
-  %t2 = sub double %t1, %s
-  %t3 = add double %t2, 707.0
+  %t0 = fadd double %r, %s
+  %t1 = fmul double %t0, %s
+  %t2 = fsub double %t1, %s
+  %t3 = fadd double %t2, 707.0
   br label %exit
 
 exit:
diff --git a/test/CodeGen/X86/fold-pcmpeqd-0.ll b/test/CodeGen/X86/fold-pcmpeqd-0.ll
index 066d38e..f558aca 100644
--- a/test/CodeGen/X86/fold-pcmpeqd-0.ll
+++ b/test/CodeGen/X86/fold-pcmpeqd-0.ll
@@ -26,23 +26,23 @@
 
 forbody:		; preds = %forcond
 	%bitcast204.i313 = bitcast <4 x i32> zeroinitializer to <4 x float>		; <<4 x float>> [#uses=1]
-	%mul233 = mul <4 x float> %bitcast204.i313, zeroinitializer		; <<4 x float>> [#uses=1]
-	%mul257 = mul <4 x float> %mul233, zeroinitializer		; <<4 x float>> [#uses=1]
-	%mul275 = mul <4 x float> %mul257, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul233 = fmul <4 x float> %bitcast204.i313, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul257 = fmul <4 x float> %mul233, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul275 = fmul <4 x float> %mul257, zeroinitializer		; <<4 x float>> [#uses=1]
 	%tmp51 = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %mul275, <4 x float> zeroinitializer) nounwind		; <<4 x float>> [#uses=1]
 	%bitcast198.i182 = bitcast <4 x float> zeroinitializer to <4 x i32>		; <<4 x i32>> [#uses=0]
 	%bitcast204.i185 = bitcast <4 x i32> zeroinitializer to <4 x float>		; <<4 x float>> [#uses=1]
 	%tmp69 = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> zeroinitializer) nounwind		; <<4 x i32>> [#uses=1]
 	%tmp70 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp69) nounwind		; <<4 x float>> [#uses=1]
-	%sub140.i78 = sub <4 x float> zeroinitializer, %tmp70		; <<4 x float>> [#uses=2]
-	%mul166.i86 = mul <4 x float> zeroinitializer, %sub140.i78		; <<4 x float>> [#uses=1]
-	%add167.i87 = add <4 x float> %mul166.i86, < float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000 >		; <<4 x float>> [#uses=1]
-	%mul171.i88 = mul <4 x float> %add167.i87, %sub140.i78		; <<4 x float>> [#uses=1]
-	%add172.i89 = add <4 x float> %mul171.i88, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 >		; <<4 x float>> [#uses=1]
+	%sub140.i78 = fsub <4 x float> zeroinitializer, %tmp70		; <<4 x float>> [#uses=2]
+	%mul166.i86 = fmul <4 x float> zeroinitializer, %sub140.i78		; <<4 x float>> [#uses=1]
+	%add167.i87 = fadd <4 x float> %mul166.i86, < float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000 >		; <<4 x float>> [#uses=1]
+	%mul171.i88 = fmul <4 x float> %add167.i87, %sub140.i78		; <<4 x float>> [#uses=1]
+	%add172.i89 = fadd <4 x float> %mul171.i88, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 >		; <<4 x float>> [#uses=1]
 	%bitcast176.i90 = bitcast <4 x float> %add172.i89 to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%andnps178.i92 = and <4 x i32> %bitcast176.i90, zeroinitializer		; <<4 x i32>> [#uses=1]
 	%bitcast179.i93 = bitcast <4 x i32> %andnps178.i92 to <4 x float>		; <<4 x float>> [#uses=1]
-	%mul186.i96 = mul <4 x float> %bitcast179.i93, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul186.i96 = fmul <4 x float> %bitcast179.i93, zeroinitializer		; <<4 x float>> [#uses=1]
 	%bitcast190.i98 = bitcast <4 x float> %mul186.i96 to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%andnps192.i100 = and <4 x i32> %bitcast190.i98, zeroinitializer		; <<4 x i32>> [#uses=1]
 	%xorps.i102 = xor <4 x i32> zeroinitializer, < i32 -1, i32 -1, i32 -1, i32 -1 >		; <<4 x i32>> [#uses=1]
@@ -50,15 +50,15 @@
 	%bitcast204.i104 = bitcast <4 x i32> %orps203.i103 to <4 x float>		; <<4 x float>> [#uses=1]
 	%cmple.i = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> zeroinitializer, <4 x float> %tmp51, i8 2) nounwind		; <<4 x float>> [#uses=1]
 	%tmp80 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> zeroinitializer) nounwind		; <<4 x float>> [#uses=1]
-	%sub140.i = sub <4 x float> zeroinitializer, %tmp80		; <<4 x float>> [#uses=1]
+	%sub140.i = fsub <4 x float> zeroinitializer, %tmp80		; <<4 x float>> [#uses=1]
 	%bitcast148.i = bitcast <4 x float> zeroinitializer to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%andnps150.i = and <4 x i32> %bitcast148.i, < i32 -2139095041, i32 -2139095041, i32 -2139095041, i32 -2139095041 >		; <<4 x i32>> [#uses=0]
-	%mul171.i = mul <4 x float> zeroinitializer, %sub140.i		; <<4 x float>> [#uses=1]
-	%add172.i = add <4 x float> %mul171.i, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 >		; <<4 x float>> [#uses=1]
+	%mul171.i = fmul <4 x float> zeroinitializer, %sub140.i		; <<4 x float>> [#uses=1]
+	%add172.i = fadd <4 x float> %mul171.i, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 >		; <<4 x float>> [#uses=1]
 	%bitcast176.i = bitcast <4 x float> %add172.i to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%andnps178.i = and <4 x i32> %bitcast176.i, zeroinitializer		; <<4 x i32>> [#uses=1]
 	%bitcast179.i = bitcast <4 x i32> %andnps178.i to <4 x float>		; <<4 x float>> [#uses=1]
-	%mul186.i = mul <4 x float> %bitcast179.i, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul186.i = fmul <4 x float> %bitcast179.i, zeroinitializer		; <<4 x float>> [#uses=1]
 	%bitcast189.i = bitcast <4 x float> zeroinitializer to <4 x i32>		; <<4 x i32>> [#uses=0]
 	%bitcast190.i = bitcast <4 x float> %mul186.i to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%andnps192.i = and <4 x i32> %bitcast190.i, zeroinitializer		; <<4 x i32>> [#uses=1]
@@ -66,9 +66,9 @@
 	%xorps.i = xor <4 x i32> %bitcast198.i, < i32 -1, i32 -1, i32 -1, i32 -1 >		; <<4 x i32>> [#uses=1]
 	%orps203.i = or <4 x i32> %andnps192.i, %xorps.i		; <<4 x i32>> [#uses=1]
 	%bitcast204.i = bitcast <4 x i32> %orps203.i to <4 x float>		; <<4 x float>> [#uses=1]
-	%mul307 = mul <4 x float> %bitcast204.i185, zeroinitializer		; <<4 x float>> [#uses=1]
-	%mul310 = mul <4 x float> %bitcast204.i104, zeroinitializer		; <<4 x float>> [#uses=2]
-	%mul313 = mul <4 x float> %bitcast204.i, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul307 = fmul <4 x float> %bitcast204.i185, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul310 = fmul <4 x float> %bitcast204.i104, zeroinitializer		; <<4 x float>> [#uses=2]
+	%mul313 = fmul <4 x float> %bitcast204.i, zeroinitializer		; <<4 x float>> [#uses=1]
 	%tmp82 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %mul307, <4 x float> zeroinitializer) nounwind		; <<4 x float>> [#uses=1]
 	%bitcast11.i15 = bitcast <4 x float> %tmp82 to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%andnps.i17 = and <4 x i32> %bitcast11.i15, zeroinitializer		; <<4 x i32>> [#uses=1]
diff --git a/test/CodeGen/X86/fold-pcmpeqd-2.ll b/test/CodeGen/X86/fold-pcmpeqd-2.ll
index de6ba6c..2b75781 100644
--- a/test/CodeGen/X86/fold-pcmpeqd-2.ll
+++ b/test/CodeGen/X86/fold-pcmpeqd-2.ll
@@ -28,22 +28,22 @@
 	%tmp78 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> < float 1.280000e+02, float 1.280000e+02, float 1.280000e+02, float 1.280000e+02 >, <4 x float> zeroinitializer) nounwind		; <<4 x float>> [#uses=2]
 	%tmp79 = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %tmp78) nounwind		; <<4 x i32>> [#uses=1]
 	%tmp80 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp79) nounwind		; <<4 x float>> [#uses=1]
-	%sub140.i = sub <4 x float> %tmp78, %tmp80		; <<4 x float>> [#uses=2]
-	%mul166.i = mul <4 x float> zeroinitializer, %sub140.i		; <<4 x float>> [#uses=1]
-	%add167.i = add <4 x float> %mul166.i, < float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000 >		; <<4 x float>> [#uses=1]
-	%mul171.i = mul <4 x float> %add167.i, %sub140.i		; <<4 x float>> [#uses=1]
-	%add172.i = add <4 x float> %mul171.i, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 >		; <<4 x float>> [#uses=1]
+	%sub140.i = fsub <4 x float> %tmp78, %tmp80		; <<4 x float>> [#uses=2]
+	%mul166.i = fmul <4 x float> zeroinitializer, %sub140.i		; <<4 x float>> [#uses=1]
+	%add167.i = fadd <4 x float> %mul166.i, < float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000 >		; <<4 x float>> [#uses=1]
+	%mul171.i = fmul <4 x float> %add167.i, %sub140.i		; <<4 x float>> [#uses=1]
+	%add172.i = fadd <4 x float> %mul171.i, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 >		; <<4 x float>> [#uses=1]
 	%bitcast176.i = bitcast <4 x float> %add172.i to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%andnps178.i = and <4 x i32> %bitcast176.i, zeroinitializer		; <<4 x i32>> [#uses=1]
 	%bitcast179.i = bitcast <4 x i32> %andnps178.i to <4 x float>		; <<4 x float>> [#uses=1]
-	%mul186.i = mul <4 x float> %bitcast179.i, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul186.i = fmul <4 x float> %bitcast179.i, zeroinitializer		; <<4 x float>> [#uses=1]
 	%bitcast190.i = bitcast <4 x float> %mul186.i to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%andnps192.i = and <4 x i32> %bitcast190.i, zeroinitializer		; <<4 x i32>> [#uses=1]
 	%xorps.i = xor <4 x i32> zeroinitializer, < i32 -1, i32 -1, i32 -1, i32 -1 >		; <<4 x i32>> [#uses=1]
 	%orps203.i = or <4 x i32> %andnps192.i, %xorps.i		; <<4 x i32>> [#uses=1]
 	%bitcast204.i = bitcast <4 x i32> %orps203.i to <4 x float>		; <<4 x float>> [#uses=1]
-	%mul310 = mul <4 x float> %bitcast204.i104, zeroinitializer		; <<4 x float>> [#uses=2]
-	%mul313 = mul <4 x float> %bitcast204.i, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul310 = fmul <4 x float> %bitcast204.i104, zeroinitializer		; <<4 x float>> [#uses=2]
+	%mul313 = fmul <4 x float> %bitcast204.i, zeroinitializer		; <<4 x float>> [#uses=1]
 	%cmpunord.i11 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> zeroinitializer, <4 x float> zeroinitializer, i8 3) nounwind		; <<4 x float>> [#uses=1]
 	%bitcast6.i13 = bitcast <4 x float> %cmpunord.i11 to <4 x i32>		; <<4 x i32>> [#uses=2]
 	%andps.i14 = and <4 x i32> zeroinitializer, %bitcast6.i13		; <<4 x i32>> [#uses=1]
diff --git a/test/CodeGen/X86/fp-in-intregs.ll b/test/CodeGen/X86/fp-in-intregs.ll
index 1e3ea89..15606c3 100644
--- a/test/CodeGen/X86/fp-in-intregs.ll
+++ b/test/CodeGen/X86/fp-in-intregs.ll
@@ -5,7 +5,7 @@
 
 define i32 @test1(float %x) nounwind  {
 entry:
-	%tmp2 = sub float -0.000000e+00, %x		; <float> [#uses=1]
+	%tmp2 = fsub float -0.000000e+00, %x		; <float> [#uses=1]
 	%tmp210 = bitcast float %tmp2 to i32		; <i32> [#uses=1]
 	ret i32 %tmp210
 }
diff --git a/test/CodeGen/X86/fp-stack-compare.ll b/test/CodeGen/X86/fp-stack-compare.ll
index 383549a..4e61d0f 100644
--- a/test/CodeGen/X86/fp-stack-compare.ll
+++ b/test/CodeGen/X86/fp-stack-compare.ll
@@ -5,7 +5,7 @@
 define float @foo(float* %col.2.0) {
         %tmp = load float* %col.2.0             ; <float> [#uses=3]
         %tmp16 = fcmp olt float %tmp, 0.000000e+00              ; <i1> [#uses=1]
-        %tmp20 = sub float -0.000000e+00, %tmp          ; <float> [#uses=1]
+        %tmp20 = fsub float -0.000000e+00, %tmp          ; <float> [#uses=1]
         %iftmp.2.0 = select i1 %tmp16, float %tmp20, float %tmp         ; <float> [#uses=1]
         ret float %iftmp.2.0
 }
diff --git a/test/CodeGen/X86/fp_constant_op.ll b/test/CodeGen/X86/fp_constant_op.ll
index ed02c6a..f2017b9 100644
--- a/test/CodeGen/X86/fp_constant_op.ll
+++ b/test/CodeGen/X86/fp_constant_op.ll
@@ -5,22 +5,22 @@
 
 
 define double @foo_add(double %P) {
-	%tmp.1 = add double %P, 1.230000e+02		; <double> [#uses=1]
+	%tmp.1 = fadd double %P, 1.230000e+02		; <double> [#uses=1]
 	ret double %tmp.1
 }
 
 define double @foo_mul(double %P) {
-	%tmp.1 = mul double %P, 1.230000e+02		; <double> [#uses=1]
+	%tmp.1 = fmul double %P, 1.230000e+02		; <double> [#uses=1]
 	ret double %tmp.1
 }
 
 define double @foo_sub(double %P) {
-	%tmp.1 = sub double %P, 1.230000e+02		; <double> [#uses=1]
+	%tmp.1 = fsub double %P, 1.230000e+02		; <double> [#uses=1]
 	ret double %tmp.1
 }
 
 define double @foo_subr(double %P) {
-	%tmp.1 = sub double 1.230000e+02, %P		; <double> [#uses=1]
+	%tmp.1 = fsub double 1.230000e+02, %P		; <double> [#uses=1]
 	ret double %tmp.1
 }
 
diff --git a/test/CodeGen/X86/fp_load_fold.ll b/test/CodeGen/X86/fp_load_fold.ll
index 7c33cb3..655ad3d 100644
--- a/test/CodeGen/X86/fp_load_fold.ll
+++ b/test/CodeGen/X86/fp_load_fold.ll
@@ -5,25 +5,25 @@
 
 define double @test_add(double %X, double* %P) {
 	%Y = load double* %P		; <double> [#uses=1]
-	%R = add double %X, %Y		; <double> [#uses=1]
+	%R = fadd double %X, %Y		; <double> [#uses=1]
 	ret double %R
 }
 
 define double @test_mul(double %X, double* %P) {
 	%Y = load double* %P		; <double> [#uses=1]
-	%R = mul double %X, %Y		; <double> [#uses=1]
+	%R = fmul double %X, %Y		; <double> [#uses=1]
 	ret double %R
 }
 
 define double @test_sub(double %X, double* %P) {
 	%Y = load double* %P		; <double> [#uses=1]
-	%R = sub double %X, %Y		; <double> [#uses=1]
+	%R = fsub double %X, %Y		; <double> [#uses=1]
 	ret double %R
 }
 
 define double @test_subr(double %X, double* %P) {
 	%Y = load double* %P		; <double> [#uses=1]
-	%R = sub double %Y, %X		; <double> [#uses=1]
+	%R = fsub double %Y, %X		; <double> [#uses=1]
 	ret double %R
 }
 
diff --git a/test/CodeGen/X86/fsxor-alignment.ll b/test/CodeGen/X86/fsxor-alignment.ll
index 71007dc..4d25fca 100644
--- a/test/CodeGen/X86/fsxor-alignment.ll
+++ b/test/CodeGen/X86/fsxor-alignment.ll
@@ -6,8 +6,8 @@
 ; and aren't vector-aligned.
 
 define void @foo(float* %p, float* %q, float %s, float %y) {
-  %ss = sub float -0.0, %s
-  %yy = sub float -0.0, %y
+  %ss = fsub float -0.0, %s
+  %yy = fsub float -0.0, %y
   store float %ss, float* %p
   store float %yy, float* %q
   ret void
diff --git a/test/CodeGen/X86/full-lsr.ll b/test/CodeGen/X86/full-lsr.ll
index ee9eaf9..4a85779 100644
--- a/test/CodeGen/X86/full-lsr.ll
+++ b/test/CodeGen/X86/full-lsr.ll
@@ -13,7 +13,7 @@
 	%2 = load float* %1, align 4		; <float> [#uses=1]
 	%3 = getelementptr float* %B, i32 %i.03		; <float*> [#uses=1]
 	%4 = load float* %3, align 4		; <float> [#uses=1]
-	%5 = add float %2, %4		; <float> [#uses=1]
+	%5 = fadd float %2, %4		; <float> [#uses=1]
 	%6 = getelementptr float* %C, i32 %i.03		; <float*> [#uses=1]
 	store float %5, float* %6, align 4
 	%7 = add i32 %i.03, 10		; <i32> [#uses=3]
@@ -21,7 +21,7 @@
 	%9 = load float* %8, align 4		; <float> [#uses=1]
 	%10 = getelementptr float* %B, i32 %7		; <float*> [#uses=1]
 	%11 = load float* %10, align 4		; <float> [#uses=1]
-	%12 = add float %9, %11		; <float> [#uses=1]
+	%12 = fadd float %9, %11		; <float> [#uses=1]
 	%13 = getelementptr float* %C, i32 %7		; <float*> [#uses=1]
 	store float %12, float* %13, align 4
 	%indvar.next = add i32 %i.03, 1		; <i32> [#uses=2]
diff --git a/test/CodeGen/X86/illegal-vector-args-return.ll b/test/CodeGen/X86/illegal-vector-args-return.ll
index 8fb6db3..5ed6ddb 100644
--- a/test/CodeGen/X86/illegal-vector-args-return.ll
+++ b/test/CodeGen/X86/illegal-vector-args-return.ll
@@ -4,11 +4,11 @@
 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps	%xmm2, %xmm0}
 
 define <4 x double> @foo(<4 x double> %x, <4 x double> %z) {
-  %y = mul <4 x double> %x, %z
+  %y = fmul <4 x double> %x, %z
   ret <4 x double> %y
 }
 
 define <8 x float> @bar(<8 x float> %x, <8 x float> %z) {
-  %y = add <8 x float> %x, %z
+  %y = fadd <8 x float> %x, %z
   ret <8 x float> %y
 }
diff --git a/test/CodeGen/X86/inline-asm-fpstack.ll b/test/CodeGen/X86/inline-asm-fpstack.ll
index 91f2f2f..31d94d8 100644
--- a/test/CodeGen/X86/inline-asm-fpstack.ll
+++ b/test/CodeGen/X86/inline-asm-fpstack.ll
@@ -21,7 +21,7 @@
 }
 
 define void @test5(double %X) {
-        %Y = add double %X, 123.0
+        %Y = fadd double %X, 123.0
         call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( double %Y)
         ret void
 }
diff --git a/test/CodeGen/X86/inline-asm-mrv.ll b/test/CodeGen/X86/inline-asm-mrv.ll
index f679c7f..ca39c12 100644
--- a/test/CodeGen/X86/inline-asm-mrv.ll
+++ b/test/CodeGen/X86/inline-asm-mrv.ll
@@ -21,7 +21,7 @@
 	%mrv = call {<4 x float>, <4 x float>} asm "set $0, $1", "=x,=x"()
 	%a = getresult {<4 x float>, <4 x float>} %mrv, 0
 	%b = getresult {<4 x float>, <4 x float>} %mrv, 1
-	%c = add <4 x float> %a, %b
+	%c = fadd <4 x float> %a, %b
 	ret <4 x float> %c
 }
 
diff --git a/test/CodeGen/X86/inline-asm-x-scalar.ll b/test/CodeGen/X86/inline-asm-x-scalar.ll
index d1bac0c..aafbbd1 100644
--- a/test/CodeGen/X86/inline-asm-x-scalar.ll
+++ b/test/CodeGen/X86/inline-asm-x-scalar.ll
@@ -17,7 +17,7 @@
 
 define void @test4() {
         %tmp1 = tail call float asm "", "=x,0,~{dirflag},~{fpsr},~{flags}"( float 0x47EFFFFFE0000000 ); <float> [#uses=1]
-        %tmp4 = sub float %tmp1, 0x3810000000000000             ; <float> [#uses=1]
+        %tmp4 = fsub float %tmp1, 0x3810000000000000             ; <float> [#uses=1]
         tail call void asm sideeffect "", "x,~{dirflag},~{fpsr},~{flags}"( float %tmp4 )
         ret void
 }
diff --git a/test/CodeGen/X86/iv-users-in-other-loops.ll b/test/CodeGen/X86/iv-users-in-other-loops.ll
index 275feba..2208b2d 100644
--- a/test/CodeGen/X86/iv-users-in-other-loops.ll
+++ b/test/CodeGen/X86/iv-users-in-other-loops.ll
@@ -17,52 +17,52 @@
 
 define void @foo(float* %A, i32 %IA, float* %B, i32 %IB, float* nocapture %C, i32 %N) nounwind {
 entry:
-	%0 = xor i32 %IA, 1		; <i32> [#uses=1]
-	%1 = xor i32 %IB, 1		; <i32> [#uses=1]
-	%2 = or i32 %1, %0		; <i32> [#uses=1]
-	%3 = icmp eq i32 %2, 0		; <i1> [#uses=1]
-	br i1 %3, label %bb2, label %bb13
+      %0 = xor i32 %IA, 1		; <i32> [#uses=1]
+      %1 = xor i32 %IB, 1		; <i32> [#uses=1]
+      %2 = or i32 %1, %0		; <i32> [#uses=1]
+      %3 = icmp eq i32 %2, 0		; <i1> [#uses=1]
+      br i1 %3, label %bb2, label %bb13
 
 bb:		; preds = %bb3
-	%4 = load float* %A_addr.0, align 4		; <float> [#uses=1]
-	%5 = load float* %B_addr.0, align 4		; <float> [#uses=1]
-	%6 = mul float %4, %5		; <float> [#uses=1]
-	%7 = add float %6, %Sum0.0		; <float> [#uses=1]
-	%indvar.next154 = add i64 %B_addr.0.rec, 1		; <i64> [#uses=1]
-	br label %bb2
+      %4 = load float* %A_addr.0, align 4		; <float> [#uses=1]
+      %5 = load float* %B_addr.0, align 4		; <float> [#uses=1]
+      %6 = fmul float %4, %5		; <float> [#uses=1]
+      %7 = fadd float %6, %Sum0.0		; <float> [#uses=1]
+      %indvar.next154 = add i64 %B_addr.0.rec, 1		; <i64> [#uses=1]
+      br label %bb2
 
 bb2:		; preds = %entry, %bb
-	%B_addr.0.rec = phi i64 [ %indvar.next154, %bb ], [ 0, %entry ]		; <i64> [#uses=14]
-	%Sum0.0 = phi float [ %7, %bb ], [ 0.000000e+00, %entry ]		; <float> [#uses=5]
-	%indvar146 = trunc i64 %B_addr.0.rec to i32		; <i32> [#uses=1]
-	%N_addr.0 = sub i32 %N, %indvar146		; <i32> [#uses=6]
-	%A_addr.0 = getelementptr float* %A, i64 %B_addr.0.rec		; <float*> [#uses=4]
-	%B_addr.0 = getelementptr float* %B, i64 %B_addr.0.rec		; <float*> [#uses=4]
-	%8 = icmp sgt i32 %N_addr.0, 0		; <i1> [#uses=1]
-	br i1 %8, label %bb3, label %bb4
+      %B_addr.0.rec = phi i64 [ %indvar.next154, %bb ], [ 0, %entry ]		; <i64> [#uses=14]
+      %Sum0.0 = phi float [ %7, %bb ], [ 0.000000e+00, %entry ]		; <float> [#uses=5]
+      %indvar146 = trunc i64 %B_addr.0.rec to i32		; <i32> [#uses=1]
+      %N_addr.0 = sub i32 %N, %indvar146		; <i32> [#uses=6]
+      %A_addr.0 = getelementptr float* %A, i64 %B_addr.0.rec		; <float*> [#uses=4]
+      %B_addr.0 = getelementptr float* %B, i64 %B_addr.0.rec		; <float*> [#uses=4]
+      %8 = icmp sgt i32 %N_addr.0, 0		; <i1> [#uses=1]
+      br i1 %8, label %bb3, label %bb4
 
 bb3:		; preds = %bb2
-	%9 = ptrtoint float* %A_addr.0 to i64		; <i64> [#uses=1]
-	%10 = and i64 %9, 15		; <i64> [#uses=1]
-	%11 = icmp eq i64 %10, 0		; <i1> [#uses=1]
-	br i1 %11, label %bb4, label %bb
+      %9 = ptrtoint float* %A_addr.0 to i64		; <i64> [#uses=1]
+      %10 = and i64 %9, 15		; <i64> [#uses=1]
+      %11 = icmp eq i64 %10, 0		; <i1> [#uses=1]
+      br i1 %11, label %bb4, label %bb
 
 bb4:		; preds = %bb3, %bb2
-	%12 = ptrtoint float* %B_addr.0 to i64		; <i64> [#uses=1]
-	%13 = and i64 %12, 15		; <i64> [#uses=1]
-	%14 = icmp eq i64 %13, 0		; <i1> [#uses=1]
-	%15 = icmp sgt i32 %N_addr.0, 15		; <i1> [#uses=2]
-	br i1 %14, label %bb6.preheader, label %bb10.preheader
+      %12 = ptrtoint float* %B_addr.0 to i64		; <i64> [#uses=1]
+      %13 = and i64 %12, 15		; <i64> [#uses=1]
+      %14 = icmp eq i64 %13, 0		; <i1> [#uses=1]
+      %15 = icmp sgt i32 %N_addr.0, 15		; <i1> [#uses=2]
+      br i1 %14, label %bb6.preheader, label %bb10.preheader
 
 bb10.preheader:		; preds = %bb4
-	br i1 %15, label %bb9, label %bb12.loopexit
+      br i1 %15, label %bb9, label %bb12.loopexit
 
 bb6.preheader:		; preds = %bb4
-	br i1 %15, label %bb5, label %bb8.loopexit
+      br i1 %15, label %bb5, label %bb8.loopexit
 
 bb5:		; preds = %bb5, %bb6.preheader
-	%indvar143 = phi i64 [ 0, %bb6.preheader ], [ %indvar.next144, %bb5 ]		; <i64> [#uses=3]
-	%vSum0.072 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %21, %bb5 ]		; <<4 x float>> [#uses=1]
+      %indvar143 = phi i64 [ 0, %bb6.preheader ], [ %indvar.next144, %bb5 ]		; <i64> [#uses=3]
+      %vSum0.072 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %21, %bb5 ]		; <<4 x float>> [#uses=1]
 	%vSum1.070 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %29, %bb5 ]		; <<4 x float>> [#uses=1]
 	%vSum2.069 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %37, %bb5 ]		; <<4 x float>> [#uses=1]
 	%vSum3.067 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %45, %bb5 ]		; <<4 x float>> [#uses=1]
@@ -78,8 +78,8 @@
 	%17 = load <4 x float>* %16, align 16		; <<4 x float>> [#uses=1]
 	%18 = bitcast float* %B_addr.271 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%19 = load <4 x float>* %18, align 16		; <<4 x float>> [#uses=1]
-	%20 = mul <4 x float> %17, %19		; <<4 x float>> [#uses=1]
-	%21 = add <4 x float> %20, %vSum0.072		; <<4 x float>> [#uses=2]
+	%20 = fmul <4 x float> %17, %19		; <<4 x float>> [#uses=1]
+	%21 = fadd <4 x float> %20, %vSum0.072		; <<4 x float>> [#uses=2]
 	%A_addr.273.sum163 = or i64 %A_addr.273.rec, 4		; <i64> [#uses=1]
 	%A_addr.0.sum175 = add i64 %B_addr.0.rec, %A_addr.273.sum163		; <i64> [#uses=2]
 	%22 = getelementptr float* %A, i64 %A_addr.0.sum175		; <float*> [#uses=1]
@@ -88,8 +88,8 @@
 	%25 = getelementptr float* %B, i64 %A_addr.0.sum175		; <float*> [#uses=1]
 	%26 = bitcast float* %25 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%27 = load <4 x float>* %26, align 16		; <<4 x float>> [#uses=1]
-	%28 = mul <4 x float> %24, %27		; <<4 x float>> [#uses=1]
-	%29 = add <4 x float> %28, %vSum1.070		; <<4 x float>> [#uses=2]
+	%28 = fmul <4 x float> %24, %27		; <<4 x float>> [#uses=1]
+	%29 = fadd <4 x float> %28, %vSum1.070		; <<4 x float>> [#uses=2]
 	%A_addr.273.sum161 = or i64 %A_addr.273.rec, 8		; <i64> [#uses=1]
 	%A_addr.0.sum174 = add i64 %B_addr.0.rec, %A_addr.273.sum161		; <i64> [#uses=2]
 	%30 = getelementptr float* %A, i64 %A_addr.0.sum174		; <float*> [#uses=1]
@@ -98,8 +98,8 @@
 	%33 = getelementptr float* %B, i64 %A_addr.0.sum174		; <float*> [#uses=1]
 	%34 = bitcast float* %33 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%35 = load <4 x float>* %34, align 16		; <<4 x float>> [#uses=1]
-	%36 = mul <4 x float> %32, %35		; <<4 x float>> [#uses=1]
-	%37 = add <4 x float> %36, %vSum2.069		; <<4 x float>> [#uses=2]
+	%36 = fmul <4 x float> %32, %35		; <<4 x float>> [#uses=1]
+	%37 = fadd <4 x float> %36, %vSum2.069		; <<4 x float>> [#uses=2]
 	%A_addr.273.sum159 = or i64 %A_addr.273.rec, 12		; <i64> [#uses=1]
 	%A_addr.0.sum173 = add i64 %B_addr.0.rec, %A_addr.273.sum159		; <i64> [#uses=2]
 	%38 = getelementptr float* %A, i64 %A_addr.0.sum173		; <float*> [#uses=1]
@@ -108,8 +108,8 @@
 	%41 = getelementptr float* %B, i64 %A_addr.0.sum173		; <float*> [#uses=1]
 	%42 = bitcast float* %41 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%43 = load <4 x float>* %42, align 16		; <<4 x float>> [#uses=1]
-	%44 = mul <4 x float> %40, %43		; <<4 x float>> [#uses=1]
-	%45 = add <4 x float> %44, %vSum3.067		; <<4 x float>> [#uses=2]
+	%44 = fmul <4 x float> %40, %43		; <<4 x float>> [#uses=1]
+	%45 = fadd <4 x float> %44, %vSum3.067		; <<4 x float>> [#uses=2]
 	%.rec83 = add i64 %A_addr.273.rec, 16		; <i64> [#uses=1]
 	%A_addr.0.sum172 = add i64 %B_addr.0.rec, %.rec83		; <i64> [#uses=2]
 	%46 = getelementptr float* %A, i64 %A_addr.0.sum172		; <float*> [#uses=1]
@@ -132,8 +132,8 @@
 	%51 = load <4 x float>* %50, align 16		; <<4 x float>> [#uses=1]
 	%52 = bitcast float* %B_addr.359 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%53 = load <4 x float>* %52, align 16		; <<4 x float>> [#uses=1]
-	%54 = mul <4 x float> %51, %53		; <<4 x float>> [#uses=1]
-	%55 = add <4 x float> %54, %vSum0.260		; <<4 x float>> [#uses=2]
+	%54 = fmul <4 x float> %51, %53		; <<4 x float>> [#uses=1]
+	%55 = fadd <4 x float> %54, %vSum0.260		; <<4 x float>> [#uses=2]
 	%.rec85 = add i64 %A_addr.361.rec, 4		; <i64> [#uses=2]
 	%56 = getelementptr float* %A_addr.2.lcssa, i64 %.rec85		; <float*> [#uses=1]
 	%57 = getelementptr float* %B_addr.2.lcssa, i64 %.rec85		; <float*> [#uses=1]
@@ -185,23 +185,23 @@
 	%71 = load <4 x float>* %70, align 1
 	%72 = bitcast float* %A_addr.440 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%73 = load <4 x float>* %72, align 16		; <<4 x float>> [#uses=1]
-	%74 = mul <4 x float> %73, %62		; <<4 x float>> [#uses=1]
-	%75 = add <4 x float> %74, %vSum0.339		; <<4 x float>> [#uses=2]
+	%74 = fmul <4 x float> %73, %62		; <<4 x float>> [#uses=1]
+	%75 = fadd <4 x float> %74, %vSum0.339		; <<4 x float>> [#uses=2]
 	%76 = getelementptr float* %A, i64 %B_addr.0.sum187		; <float*> [#uses=1]
 	%77 = bitcast float* %76 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%78 = load <4 x float>* %77, align 16		; <<4 x float>> [#uses=1]
-	%79 = mul <4 x float> %78, %65		; <<4 x float>> [#uses=1]
-	%80 = add <4 x float> %79, %vSum1.237		; <<4 x float>> [#uses=2]
+	%79 = fmul <4 x float> %78, %65		; <<4 x float>> [#uses=1]
+	%80 = fadd <4 x float> %79, %vSum1.237		; <<4 x float>> [#uses=2]
 	%81 = getelementptr float* %A, i64 %B_addr.0.sum186		; <float*> [#uses=1]
 	%82 = bitcast float* %81 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%83 = load <4 x float>* %82, align 16		; <<4 x float>> [#uses=1]
-	%84 = mul <4 x float> %83, %68		; <<4 x float>> [#uses=1]
-	%85 = add <4 x float> %84, %vSum2.236		; <<4 x float>> [#uses=2]
+	%84 = fmul <4 x float> %83, %68		; <<4 x float>> [#uses=1]
+	%85 = fadd <4 x float> %84, %vSum2.236		; <<4 x float>> [#uses=2]
 	%86 = getelementptr float* %A, i64 %B_addr.0.sum185		; <float*> [#uses=1]
 	%87 = bitcast float* %86 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%88 = load <4 x float>* %87, align 16		; <<4 x float>> [#uses=1]
-	%89 = mul <4 x float> %88, %71		; <<4 x float>> [#uses=1]
-	%90 = add <4 x float> %89, %vSum3.234		; <<4 x float>> [#uses=2]
+	%89 = fmul <4 x float> %88, %71		; <<4 x float>> [#uses=1]
+	%90 = fadd <4 x float> %89, %vSum3.234		; <<4 x float>> [#uses=2]
 	%.rec89 = add i64 %A_addr.440.rec, 16		; <i64> [#uses=1]
 	%A_addr.0.sum170 = add i64 %B_addr.0.rec, %.rec89		; <i64> [#uses=2]
 	%91 = getelementptr float* %A, i64 %A_addr.0.sum170		; <float*> [#uses=1]
@@ -224,8 +224,8 @@
 	%96 = load <4 x float>* %95, align 1
 	%97 = bitcast float* %A_addr.529 to <4 x float>*		; <<4 x float>*> [#uses=1]
 	%98 = load <4 x float>* %97, align 16		; <<4 x float>> [#uses=1]
-	%99 = mul <4 x float> %98, %96		; <<4 x float>> [#uses=1]
-	%100 = add <4 x float> %99, %vSum0.428		; <<4 x float>> [#uses=2]
+	%99 = fmul <4 x float> %98, %96		; <<4 x float>> [#uses=1]
+	%100 = fadd <4 x float> %99, %vSum0.428		; <<4 x float>> [#uses=2]
 	%.rec91 = add i64 %A_addr.529.rec, 4		; <i64> [#uses=2]
 	%101 = getelementptr float* %A_addr.4.lcssa, i64 %.rec91		; <float*> [#uses=1]
 	%102 = getelementptr float* %B_addr.4.lcssa, i64 %.rec91		; <float*> [#uses=1]
@@ -254,17 +254,17 @@
 	%B_addr.1 = phi float* [ %B, %entry ], [ %B_addr.2.lcssa, %bb8.loopexit ], [ %57, %bb7 ], [ %B_addr.4.lcssa, %bb12.loopexit ], [ %102, %bb11 ]		; <float*> [#uses=1]
 	%vSum0.1 = phi <4 x float> [ zeroinitializer, %entry ], [ %vSum0.0.lcssa, %bb8.loopexit ], [ %55, %bb7 ], [ %vSum0.3.lcssa, %bb12.loopexit ], [ %100, %bb11 ]		; <<4 x float>> [#uses=1]
 	%A_addr.1 = phi float* [ %A, %entry ], [ %A_addr.2.lcssa, %bb8.loopexit ], [ %56, %bb7 ], [ %A_addr.4.lcssa, %bb12.loopexit ], [ %101, %bb11 ]		; <float*> [#uses=1]
-	%106 = add <4 x float> %vSum0.1, %vSum2.1		; <<4 x float>> [#uses=1]
-	%107 = add <4 x float> %vSum1.1, %vSum3.1		; <<4 x float>> [#uses=1]
-	%108 = add <4 x float> %106, %107		; <<4 x float>> [#uses=4]
+	%106 = fadd <4 x float> %vSum0.1, %vSum2.1		; <<4 x float>> [#uses=1]
+	%107 = fadd <4 x float> %vSum1.1, %vSum3.1		; <<4 x float>> [#uses=1]
+	%108 = fadd <4 x float> %106, %107		; <<4 x float>> [#uses=4]
 	%tmp23 = extractelement <4 x float> %108, i32 0		; <float> [#uses=1]
 	%tmp21 = extractelement <4 x float> %108, i32 1		; <float> [#uses=1]
-	%109 = add float %tmp23, %tmp21		; <float> [#uses=1]
+	%109 = fadd float %tmp23, %tmp21		; <float> [#uses=1]
 	%tmp19 = extractelement <4 x float> %108, i32 2		; <float> [#uses=1]
 	%tmp17 = extractelement <4 x float> %108, i32 3		; <float> [#uses=1]
-	%110 = add float %tmp19, %tmp17		; <float> [#uses=1]
-	%111 = add float %109, %110		; <float> [#uses=1]
-	%Sum0.254 = add float %111, %Sum0.1		; <float> [#uses=2]
+	%110 = fadd float %tmp19, %tmp17		; <float> [#uses=1]
+	%111 = fadd float %109, %110		; <float> [#uses=1]
+	%Sum0.254 = fadd float %111, %Sum0.1		; <float> [#uses=2]
 	%112 = icmp sgt i32 %N_addr.1, 0		; <i1> [#uses=1]
 	br i1 %112, label %bb.nph56, label %bb16
 
@@ -283,8 +283,8 @@
 	%A_addr.653 = getelementptr float* %A_addr.1, i64 %A_addr.653.rec		; <float*> [#uses=1]
 	%113 = load float* %A_addr.653, align 4		; <float> [#uses=1]
 	%114 = load float* %B_addr.652, align 4		; <float> [#uses=1]
-	%115 = mul float %113, %114		; <float> [#uses=1]
-	%Sum0.2 = add float %115, %Sum0.255		; <float> [#uses=2]
+	%115 = fmul float %113, %114		; <float> [#uses=1]
+	%Sum0.2 = fadd float %115, %Sum0.255		; <float> [#uses=2]
 	%indvar.next118 = add i64 %indvar117, 1		; <i64> [#uses=2]
 	%exitcond = icmp eq i64 %indvar.next118, %tmp.		; <i1> [#uses=1]
 	br i1 %exitcond, label %bb16, label %bb14
diff --git a/test/CodeGen/X86/masked-iv-safe.ll b/test/CodeGen/X86/masked-iv-safe.ll
index e102535..0bf347c 100644
--- a/test/CodeGen/X86/masked-iv-safe.ll
+++ b/test/CodeGen/X86/masked-iv-safe.ll
@@ -20,16 +20,16 @@
 	%indvar.i8 = and i64 %indvar, 255
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%indvar.i24 = and i64 %indvar, 16777215
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = add i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 10
@@ -48,16 +48,16 @@
 	%indvar.i8 = and i64 %indvar, 255
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%indvar.i24 = and i64 %indvar, 16777215
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = sub i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 0
@@ -77,17 +77,17 @@
 	%indvar.i8 = ashr i64 %s0, 8
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%s1 = shl i64 %indvar, 24
 	%indvar.i24 = ashr i64 %s1, 24
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = add i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 10
@@ -107,17 +107,17 @@
 	%indvar.i8 = ashr i64 %s0, 8
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%s1 = shl i64 %indvar, 24
 	%indvar.i24 = ashr i64 %s1, 24
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = sub i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 0
@@ -136,16 +136,16 @@
 	%indvar.i8 = and i64 %indvar, 255
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%indvar.i24 = and i64 %indvar, 16777215
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = add i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 0
@@ -164,16 +164,16 @@
 	%indvar.i8 = and i64 %indvar, 255
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%indvar.i24 = and i64 %indvar, 16777215
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = sub i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 18446744073709551615
@@ -193,17 +193,17 @@
 	%indvar.i8 = ashr i64 %s0, 8
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%s1 = shl i64 %indvar, 24
 	%indvar.i24 = ashr i64 %s1, 24
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = add i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 0
@@ -223,17 +223,17 @@
 	%indvar.i8 = ashr i64 %s0, 8
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%s1 = shl i64 %indvar, 24
 	%indvar.i24 = ashr i64 %s1, 24
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = sub i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 18446744073709551615
diff --git a/test/CodeGen/X86/masked-iv-unsafe.ll b/test/CodeGen/X86/masked-iv-unsafe.ll
index 7ccfe85..639a7a6 100644
--- a/test/CodeGen/X86/masked-iv-unsafe.ll
+++ b/test/CodeGen/X86/masked-iv-unsafe.ll
@@ -15,16 +15,16 @@
 	%indvar.i8 = and i64 %indvar, 255
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%indvar.i24 = and i64 %indvar, 16777215
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = add i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 0
@@ -43,16 +43,16 @@
 	%indvar.i8 = and i64 %indvar, 255
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%indvar.i24 = and i64 %indvar, 16777215
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = sub i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 20
@@ -72,17 +72,17 @@
 	%indvar.i8 = ashr i64 %s0, 8
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%s1 = shl i64 %indvar, 24
 	%indvar.i24 = ashr i64 %s1, 24
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = add i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 0
@@ -102,17 +102,17 @@
 	%indvar.i8 = ashr i64 %s0, 8
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%s1 = shl i64 %indvar, 24
 	%indvar.i24 = ashr i64 %s1, 24
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = sub i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 20
@@ -131,16 +131,16 @@
         %indvar.i8 = and i64 %indvar, 255
         %t0 = getelementptr double* %d, i64 %indvar.i8
         %t1 = load double* %t0
-        %t2 = mul double %t1, 0.1
+        %t2 = fmul double %t1, 0.1
         store double %t2, double* %t0
         %indvar.i24 = and i64 %indvar, 16777215
         %t3 = getelementptr double* %d, i64 %indvar.i24
         %t4 = load double* %t3
-        %t5 = mul double %t4, 2.3
+        %t5 = fmul double %t4, 2.3
         store double %t5, double* %t3
         %t6 = getelementptr double* %d, i64 %indvar
         %t7 = load double* %t6
-        %t8 = mul double %t7, 4.5
+        %t8 = fmul double %t7, 4.5
         store double %t8, double* %t6
         %indvar.next = add i64 %indvar, 1
         %exitcond = icmp eq i64 %indvar.next, %n
@@ -159,16 +159,16 @@
         %indvar.i8 = and i64 %indvar, 255
         %t0 = getelementptr double* %d, i64 %indvar.i8
         %t1 = load double* %t0
-        %t2 = mul double %t1, 0.1
+        %t2 = fmul double %t1, 0.1
         store double %t2, double* %t0
         %indvar.i24 = and i64 %indvar, 16777215
         %t3 = getelementptr double* %d, i64 %indvar.i24
         %t4 = load double* %t3
-        %t5 = mul double %t4, 2.3
+        %t5 = fmul double %t4, 2.3
         store double %t5, double* %t3
         %t6 = getelementptr double* %d, i64 %indvar
         %t7 = load double* %t6
-        %t8 = mul double %t7, 4.5
+        %t8 = fmul double %t7, 4.5
         store double %t8, double* %t6
         %indvar.next = sub i64 %indvar, 1
         %exitcond = icmp eq i64 %indvar.next, 10
@@ -188,17 +188,17 @@
         %indvar.i8 = ashr i64 %s0, 8
         %t0 = getelementptr double* %d, i64 %indvar.i8
         %t1 = load double* %t0
-        %t2 = mul double %t1, 0.1
+        %t2 = fmul double %t1, 0.1
         store double %t2, double* %t0
         %s1 = shl i64 %indvar, 24
         %indvar.i24 = ashr i64 %s1, 24
         %t3 = getelementptr double* %d, i64 %indvar.i24
         %t4 = load double* %t3
-        %t5 = mul double %t4, 2.3
+        %t5 = fmul double %t4, 2.3
         store double %t5, double* %t3
         %t6 = getelementptr double* %d, i64 %indvar
         %t7 = load double* %t6
-        %t8 = mul double %t7, 4.5
+        %t8 = fmul double %t7, 4.5
         store double %t8, double* %t6
         %indvar.next = add i64 %indvar, 1
         %exitcond = icmp eq i64 %indvar.next, %n
@@ -218,17 +218,17 @@
         %indvar.i8 = ashr i64 %s0, 8
         %t0 = getelementptr double* %d, i64 %indvar.i8
         %t1 = load double* %t0
-        %t2 = mul double %t1, 0.1
+        %t2 = fmul double %t1, 0.1
         store double %t2, double* %t0
         %s1 = shl i64 %indvar, 24
         %indvar.i24 = ashr i64 %s1, 24
         %t3 = getelementptr double* %d, i64 %indvar.i24
         %t4 = load double* %t3
-        %t5 = mul double %t4, 2.3
+        %t5 = fmul double %t4, 2.3
         store double %t5, double* %t3
         %t6 = getelementptr double* %d, i64 %indvar
         %t7 = load double* %t6
-        %t8 = mul double %t7, 4.5
+        %t8 = fmul double %t7, 4.5
         store double %t8, double* %t6
         %indvar.next = sub i64 %indvar, 1
         %exitcond = icmp eq i64 %indvar.next, 10
@@ -247,16 +247,16 @@
 	%indvar.i8 = and i64 %indvar, 255
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%indvar.i24 = and i64 %indvar, 16777215
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = sub i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 18446744073709551615
@@ -275,16 +275,16 @@
         %indvar.i8 = and i64 %indvar, 255
         %t0 = getelementptr double* %d, i64 %indvar.i8
         %t1 = load double* %t0
-        %t2 = mul double %t1, 0.1
+        %t2 = fmul double %t1, 0.1
         store double %t2, double* %t0
         %indvar.i24 = and i64 %indvar, 16777215
         %t3 = getelementptr double* %d, i64 %indvar.i24
         %t4 = load double* %t3
-        %t5 = mul double %t4, 2.3
+        %t5 = fmul double %t4, 2.3
         store double %t5, double* %t3
         %t6 = getelementptr double* %d, i64 %indvar
         %t7 = load double* %t6
-        %t8 = mul double %t7, 4.5
+        %t8 = fmul double %t7, 4.5
         store double %t8, double* %t6
         %indvar.next = add i64 %indvar, 3
         %exitcond = icmp eq i64 %indvar.next, 10
@@ -303,16 +303,16 @@
         %indvar.i8 = and i64 %indvar, 255
         %t0 = getelementptr double* %d, i64 %indvar.i8
         %t1 = load double* %t0
-        %t2 = mul double %t1, 0.1
+        %t2 = fmul double %t1, 0.1
         store double %t2, double* %t0
         %indvar.i24 = and i64 %indvar, 16777215
         %t3 = getelementptr double* %d, i64 %indvar.i24
         %t4 = load double* %t3
-        %t5 = mul double %t4, 2.3
+        %t5 = fmul double %t4, 2.3
         store double %t5, double* %t3
         %t6 = getelementptr double* %d, i64 %indvar
         %t7 = load double* %t6
-        %t8 = mul double %t7, 4.5
+        %t8 = fmul double %t7, 4.5
         store double %t8, double* %t6
         %indvar.next = sub i64 %indvar, 3
         %exitcond = icmp eq i64 %indvar.next, 0
@@ -332,17 +332,17 @@
         %indvar.i8 = ashr i64 %s0, 8
         %t0 = getelementptr double* %d, i64 %indvar.i8
         %t1 = load double* %t0
-        %t2 = mul double %t1, 0.1
+        %t2 = fmul double %t1, 0.1
         store double %t2, double* %t0
         %s1 = shl i64 %indvar, 24
         %indvar.i24 = ashr i64 %s1, 24
         %t3 = getelementptr double* %d, i64 %indvar.i24
         %t4 = load double* %t3
-        %t5 = mul double %t4, 2.3
+        %t5 = fmul double %t4, 2.3
         store double %t5, double* %t3
         %t6 = getelementptr double* %d, i64 %indvar
         %t7 = load double* %t6
-        %t8 = mul double %t7, 4.5
+        %t8 = fmul double %t7, 4.5
         store double %t8, double* %t6
         %indvar.next = add i64 %indvar, 3
         %exitcond = icmp eq i64 %indvar.next, 10
@@ -362,17 +362,17 @@
         %indvar.i8 = ashr i64 %s0, 8
         %t0 = getelementptr double* %d, i64 %indvar.i8
         %t1 = load double* %t0
-        %t2 = mul double %t1, 0.1
+        %t2 = fmul double %t1, 0.1
         store double %t2, double* %t0
         %s1 = shl i64 %indvar, 24
         %indvar.i24 = ashr i64 %s1, 24
         %t3 = getelementptr double* %d, i64 %indvar.i24
         %t4 = load double* %t3
-        %t5 = mul double %t4, 2.3
+        %t5 = fmul double %t4, 2.3
         store double %t5, double* %t3
         %t6 = getelementptr double* %d, i64 %indvar
         %t7 = load double* %t6
-        %t8 = mul double %t7, 4.5
+        %t8 = fmul double %t7, 4.5
         store double %t8, double* %t6
         %indvar.next = sub i64 %indvar, 3
         %exitcond = icmp eq i64 %indvar.next, 0
diff --git a/test/CodeGen/X86/multiple-return-values.ll b/test/CodeGen/X86/multiple-return-values.ll
index 2e754a8..5f7a83f 100644
--- a/test/CodeGen/X86/multiple-return-values.ll
+++ b/test/CodeGen/X86/multiple-return-values.ll
@@ -2,7 +2,7 @@
 
 define {i64, float} @bar(i64 %a, float %b) {
         %y = add i64 %a, 7
-        %z = add float %b, 7.0
+        %z = fadd float %b, 7.0
 	ret i64 %y, float %z
 }
 
diff --git a/test/CodeGen/X86/neg_fp.ll b/test/CodeGen/X86/neg_fp.ll
index 55c7654..1a7ee08 100644
--- a/test/CodeGen/X86/neg_fp.ll
+++ b/test/CodeGen/X86/neg_fp.ll
@@ -6,7 +6,7 @@
 
 define float @negfp(float %a, float %b) {
 entry:
-	%sub = sub float %a, %b		; <float> [#uses=1]
-	%neg = sub float -0.000000e+00, %sub		; <float> [#uses=1]
+	%sub = fsub float %a, %b		; <float> [#uses=1]
+	%neg = fsub float -0.000000e+00, %sub		; <float> [#uses=1]
 	ret float %neg
 }
\ No newline at end of file
diff --git a/test/CodeGen/X86/negate-add-zero.ll b/test/CodeGen/X86/negate-add-zero.ll
index 59a2bd0..689639f 100644
--- a/test/CodeGen/X86/negate-add-zero.ll
+++ b/test/CodeGen/X86/negate-add-zero.ll
@@ -843,14 +843,14 @@
 	%8 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 2, i32 0, i32 0, i32 0, i32 2		; <double*> [#uses=0]
 	%9 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 2, i32 0, i32 0, i32 0, i32 3		; <double*> [#uses=0]
 	%10 = load double* null, align 8		; <double> [#uses=2]
-	%11 = sub double -0.000000e+00, %10		; <double> [#uses=1]
+	%11 = fsub double -0.000000e+00, %10		; <double> [#uses=1]
 	%12 = load double* null, align 8		; <double> [#uses=2]
 	%13 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 1, i32 0, i32 0, i32 0, i32 3		; <double*> [#uses=1]
 	%14 = load double* %13, align 8		; <double> [#uses=2]
-	%15 = sub double -0.000000e+00, %14		; <double> [#uses=1]
+	%15 = fsub double -0.000000e+00, %14		; <double> [#uses=1]
 	%16 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 1, i32 0, i32 0, i32 0, i32 2		; <double*> [#uses=1]
 	%17 = load double* %16, align 8		; <double> [#uses=2]
-	%18 = sub double -0.000000e+00, %17		; <double> [#uses=1]
+	%18 = fsub double -0.000000e+00, %17		; <double> [#uses=1]
 	%19 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 0		; <double*> [#uses=0]
 	%20 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 3		; <double*> [#uses=0]
 	%21 = getelementptr %"struct.FixedMatrix<double,2,6,0,0>"* null, i32 0, i32 0, i32 0, i32 6		; <double*> [#uses=0]
@@ -866,28 +866,28 @@
 	%31 = getelementptr %"struct.FixedMatrix<double,1,3,0,0>"* null, i32 0, i32 0, i32 0, i32 0		; <double*> [#uses=0]
 	%32 = getelementptr %"struct.FixedMatrix<double,1,3,0,0>"* null, i32 0, i32 0, i32 0, i32 1		; <double*> [#uses=1]
 	%33 = getelementptr %"struct.FixedMatrix<double,1,3,0,0>"* null, i32 0, i32 0, i32 0, i32 2		; <double*> [#uses=1]
-	%34 = mul double %17, %5		; <double> [#uses=1]
-	%35 = add double 0.000000e+00, %34		; <double> [#uses=1]
-	%36 = add double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
-	%37 = mul double %14, %3		; <double> [#uses=1]
-	%38 = add double %36, %37		; <double> [#uses=1]
-	%39 = mul double %12, %4		; <double> [#uses=1]
-	%40 = add double %38, %39		; <double> [#uses=1]
-	%41 = mul double %5, %11		; <double> [#uses=1]
-	%42 = add double %40, %41		; <double> [#uses=2]
+	%34 = fmul double %17, %5		; <double> [#uses=1]
+	%35 = fadd double 0.000000e+00, %34		; <double> [#uses=1]
+	%36 = fadd double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%37 = fmul double %14, %3		; <double> [#uses=1]
+	%38 = fadd double %36, %37		; <double> [#uses=1]
+	%39 = fmul double %12, %4		; <double> [#uses=1]
+	%40 = fadd double %38, %39		; <double> [#uses=1]
+	%41 = fmul double %5, %11		; <double> [#uses=1]
+	%42 = fadd double %40, %41		; <double> [#uses=2]
 	store double %42, double* %32, align 8
-	%43 = mul double %2, %15		; <double> [#uses=1]
-	%44 = add double %43, 0.000000e+00		; <double> [#uses=1]
-	%45 = mul double %3, %18		; <double> [#uses=1]
-	%46 = add double %44, %45		; <double> [#uses=1]
-	%47 = mul double %10, %4		; <double> [#uses=1]
-	%48 = add double %46, %47		; <double> [#uses=1]
-	%49 = mul double %12, %5		; <double> [#uses=1]
-	%50 = add double %48, %49		; <double> [#uses=2]
+	%43 = fmul double %2, %15		; <double> [#uses=1]
+	%44 = fadd double %43, 0.000000e+00		; <double> [#uses=1]
+	%45 = fmul double %3, %18		; <double> [#uses=1]
+	%46 = fadd double %44, %45		; <double> [#uses=1]
+	%47 = fmul double %10, %4		; <double> [#uses=1]
+	%48 = fadd double %46, %47		; <double> [#uses=1]
+	%49 = fmul double %12, %5		; <double> [#uses=1]
+	%50 = fadd double %48, %49		; <double> [#uses=2]
 	store double %50, double* %33, align 8
-	%51 = mul double %35, 2.000000e+00		; <double> [#uses=1]
-	%52 = mul double %42, 2.000000e+00		; <double> [#uses=1]
-	%53 = mul double %50, 2.000000e+00		; <double> [#uses=1]
+	%51 = fmul double %35, 2.000000e+00		; <double> [#uses=1]
+	%52 = fmul double %42, 2.000000e+00		; <double> [#uses=1]
+	%53 = fmul double %50, 2.000000e+00		; <double> [#uses=1]
 	%54 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 0, i32 10, i32 0, i32 0, i32 0		; <double*> [#uses=1]
 	store double %51, double* %54, align 8
 	%55 = getelementptr %struct.HNodeTranslateRotate3* %this, i32 0, i32 0, i32 10, i32 0, i32 0, i32 1		; <double*> [#uses=1]
diff --git a/test/CodeGen/X86/negative-sin.ll b/test/CodeGen/X86/negative-sin.ll
index 39c6297..8cc1bec 100644
--- a/test/CodeGen/X86/negative-sin.ll
+++ b/test/CodeGen/X86/negative-sin.ll
@@ -5,8 +5,8 @@
 
 define double @foo(double %e)
 {
-  %f = sub double 0.0, %e
+  %f = fsub double 0.0, %e
   %g = call double @sin(double %f)
-  %h = sub double 0.0, %g
+  %h = fsub double 0.0, %g
   ret double %h
 }
diff --git a/test/CodeGen/X86/peep-test-0.ll b/test/CodeGen/X86/peep-test-0.ll
index a95b564..8dcd23a 100644
--- a/test/CodeGen/X86/peep-test-0.ll
+++ b/test/CodeGen/X86/peep-test-0.ll
@@ -11,7 +11,7 @@
 	%i.03 = add i64 %indvar, %n
 	%0 = getelementptr double* %d, i64 %i.03
 	%1 = load double* %0, align 8
-	%2 = mul double %1, 3.000000e+00
+	%2 = fmul double %1, 3.000000e+00
 	store double %2, double* %0, align 8
 	%indvar.next = add i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 0
diff --git a/test/CodeGen/X86/peep-test-1.ll b/test/CodeGen/X86/peep-test-1.ll
index b4698e3..85e3bf2 100644
--- a/test/CodeGen/X86/peep-test-1.ll
+++ b/test/CodeGen/X86/peep-test-1.ll
@@ -11,7 +11,7 @@
 	%i.03 = sub i32 %n, %indvar
 	%1 = getelementptr double* %p, i32 %i.03
 	%2 = load double* %1, align 4
-	%3 = mul double %2, 2.930000e+00
+	%3 = fmul double %2, 2.930000e+00
 	store double %3, double* %1, align 4
 	%4 = add i32 %i.03, -1
 	%phitmp = icmp slt i32 %4, 0
diff --git a/test/CodeGen/X86/phys_subreg_coalesce.ll b/test/CodeGen/X86/phys_subreg_coalesce.ll
index 789a4ba..3bbc55d 100644
--- a/test/CodeGen/X86/phys_subreg_coalesce.ll
+++ b/test/CodeGen/X86/phys_subreg_coalesce.ll
@@ -8,16 +8,16 @@
 	%1 = sitofp i32 %0 to double		; <double> [#uses=1]
 	%2 = trunc i64 %p2.0 to i32		; <i32> [#uses=1]
 	%3 = sitofp i32 %2 to double		; <double> [#uses=1]
-	%4 = add double %1, %3		; <double> [#uses=1]
-	%5 = mul double %4, 5.000000e-01		; <double> [#uses=1]
+	%4 = fadd double %1, %3		; <double> [#uses=1]
+	%5 = fmul double %4, 5.000000e-01		; <double> [#uses=1]
 	%6 = lshr i64 %p1.0, 32		; <i64> [#uses=1]
 	%7 = trunc i64 %6 to i32		; <i32> [#uses=1]
 	%8 = sitofp i32 %7 to double		; <double> [#uses=1]
 	%9 = lshr i64 %p2.0, 32		; <i64> [#uses=1]
 	%10 = trunc i64 %9 to i32		; <i32> [#uses=1]
 	%11 = sitofp i32 %10 to double		; <double> [#uses=1]
-	%12 = add double %8, %11		; <double> [#uses=1]
-	%13 = mul double %12, 5.000000e-01		; <double> [#uses=1]
+	%12 = fadd double %8, %11		; <double> [#uses=1]
+	%13 = fmul double %12, 5.000000e-01		; <double> [#uses=1]
 	%mrv3 = insertvalue %struct.dpoint undef, double %5, 0		; <%struct.dpoint> [#uses=1]
 	%mrv4 = insertvalue %struct.dpoint %mrv3, double %13, 1		; <%struct.dpoint> [#uses=1]
 	ret %struct.dpoint %mrv4
diff --git a/test/CodeGen/X86/pr2656.ll b/test/CodeGen/X86/pr2656.ll
index 3f6c365..96976b8 100644
--- a/test/CodeGen/X86/pr2656.ll
+++ b/test/CodeGen/X86/pr2656.ll
@@ -12,9 +12,9 @@
 	%tmp1 = load float* %tmp		; <float> [#uses=1]
 	%tmp2 = getelementptr %struct.anon* %p, i32 0, i32 1		; <float*> [#uses=1]
 	%tmp3 = load float* %tmp2		; <float> [#uses=1]
-	%neg = sub float -0.000000e+00, %tmp1		; <float> [#uses=1]
+	%neg = fsub float -0.000000e+00, %tmp1		; <float> [#uses=1]
 	%conv = fpext float %neg to double		; <double> [#uses=1]
-	%neg4 = sub float -0.000000e+00, %tmp3		; <float> [#uses=1]
+	%neg4 = fsub float -0.000000e+00, %tmp3		; <float> [#uses=1]
 	%conv5 = fpext float %neg4 to double		; <double> [#uses=1]
 	%call = call i32 (...)* @printf( i8* getelementptr ([17 x i8]* @.str, i32 0, i32 0), double %conv, double %conv5 )		; <i32> [#uses=0]
 	ret void
diff --git a/test/CodeGen/X86/pr3154.ll b/test/CodeGen/X86/pr3154.ll
index a1ed0c2..73f5101 100644
--- a/test/CodeGen/X86/pr3154.ll
+++ b/test/CodeGen/X86/pr3154.ll
@@ -22,7 +22,7 @@
 bb19:		; preds = %bb, %entry
 	%data15.0 = phi double* [ %7, %bb ], [ %3, %entry ]		; <double*> [#uses=5]
 	%8 = sitofp i32 %len to double		; <double> [#uses=1]
-	%9 = sub double %8, 1.000000e+00		; <double> [#uses=1]
+	%9 = fsub double %8, 1.000000e+00		; <double> [#uses=1]
 	%10 = fdiv double 2.000000e+00, %9		; <double> [#uses=1]
 	store double %10, double* %c, align 8
 	%11 = ashr i32 %len, 1		; <i32> [#uses=3]
diff --git a/test/CodeGen/X86/pr3457.ll b/test/CodeGen/X86/pr3457.ll
index 36d4a5d5..d4a9810 100644
--- a/test/CodeGen/X86/pr3457.ll
+++ b/test/CodeGen/X86/pr3457.ll
@@ -6,9 +6,9 @@
 entry:
 	%0 = tail call double (...)* @test() nounwind		; <double> [#uses=2]
 	%1 = tail call double (...)* @test() nounwind		; <double> [#uses=2]
-	%2 = mul double %0, %0		; <double> [#uses=1]
-	%3 = mul double %1, %1		; <double> [#uses=1]
-	%4 = add double %2, %3		; <double> [#uses=1]
+	%2 = fmul double %0, %0		; <double> [#uses=1]
+	%3 = fmul double %1, %1		; <double> [#uses=1]
+	%4 = fadd double %2, %3		; <double> [#uses=1]
 	store double %4, double* %P, align 8
 	ret void
 }
diff --git a/test/CodeGen/X86/pre-split1.ll b/test/CodeGen/X86/pre-split1.ll
index 99a46b6..4f9a582 100644
--- a/test/CodeGen/X86/pre-split1.ll
+++ b/test/CodeGen/X86/pre-split1.ll
@@ -5,17 +5,17 @@
 define void @test(double* %P, i32 %cond) nounwind {
 entry:
 	%0 = load double* %P, align 8		; <double> [#uses=1]
-	%1 = add double %0, 4.000000e+00		; <double> [#uses=2]
+	%1 = fadd double %0, 4.000000e+00		; <double> [#uses=2]
 	%2 = icmp eq i32 %cond, 0		; <i1> [#uses=1]
 	br i1 %2, label %bb1, label %bb
 
 bb:		; preds = %entry
-	%3 = add double %1, 4.000000e+00		; <double> [#uses=1]
+	%3 = fadd double %1, 4.000000e+00		; <double> [#uses=1]
 	br label %bb1
 
 bb1:		; preds = %bb, %entry
 	%A.0 = phi double [ %3, %bb ], [ %1, %entry ]		; <double> [#uses=1]
-	%4 = mul double %A.0, 4.000000e+00		; <double> [#uses=1]
+	%4 = fmul double %A.0, 4.000000e+00		; <double> [#uses=1]
 	%5 = tail call i32 (...)* @bar() nounwind		; <i32> [#uses=0]
 	store double %4, double* %P, align 8
 	ret void
diff --git a/test/CodeGen/X86/pre-split10.ll b/test/CodeGen/X86/pre-split10.ll
index c3e18c4..60297e9 100644
--- a/test/CodeGen/X86/pre-split10.ll
+++ b/test/CodeGen/X86/pre-split10.ll
@@ -7,9 +7,9 @@
 bb14.i:		; preds = %bb14.i, %entry
 	%i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %0, %bb14.i ]		; <i32> [#uses=1]
 	%0 = add i32 %i8.0.reg2mem.0.i, 1		; <i32> [#uses=2]
-	%1 = add double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
-	%2 = add double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
-	%3 = add double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%1 = fadd double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%2 = fadd double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%3 = fadd double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
 	%exitcond75.i = icmp eq i32 %0, 32		; <i1> [#uses=1]
 	br i1 %exitcond75.i, label %bb24.i, label %bb14.i
 
@@ -37,13 +37,13 @@
 	br label %bb35.preheader.i
 
 bb35.preheader.i:		; preds = %bb7.i.i, %bb33.i
-	%9 = sub double 0.000000e+00, %4		; <double> [#uses=1]
+	%9 = fsub double 0.000000e+00, %4		; <double> [#uses=1]
 	store double %9, double* null, align 8
-	%10 = sub double 0.000000e+00, %5		; <double> [#uses=1]
+	%10 = fsub double 0.000000e+00, %5		; <double> [#uses=1]
 	store double %10, double* null, align 8
-	%11 = sub double 0.000000e+00, %6		; <double> [#uses=1]
+	%11 = fsub double 0.000000e+00, %6		; <double> [#uses=1]
 	store double %11, double* null, align 8
-	%12 = sub double 0.000000e+00, %7		; <double> [#uses=1]
+	%12 = fsub double 0.000000e+00, %7		; <double> [#uses=1]
 	store double %12, double* null, align 8
 	br i1 false, label %bb7.i.i, label %bb5.i.i
 }
diff --git a/test/CodeGen/X86/pre-split4.ll b/test/CodeGen/X86/pre-split4.ll
index 97401b3..a570f73 100644
--- a/test/CodeGen/X86/pre-split4.ll
+++ b/test/CodeGen/X86/pre-split4.ll
@@ -10,14 +10,14 @@
 	%Flint.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %5, %bb ]		; <double> [#uses=1]
 	%twoThrd.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]		; <double> [#uses=1]
 	%0 = tail call double @llvm.pow.f64(double 0x3FE5555555555555, double 0.000000e+00)		; <double> [#uses=1]
-	%1 = add double %0, %twoThrd.0.reg2mem.0		; <double> [#uses=1]
+	%1 = fadd double %0, %twoThrd.0.reg2mem.0		; <double> [#uses=1]
 	%2 = tail call double @sin(double %k.0.reg2mem.0) nounwind readonly		; <double> [#uses=1]
-	%3 = mul double 0.000000e+00, %2		; <double> [#uses=1]
+	%3 = fmul double 0.000000e+00, %2		; <double> [#uses=1]
 	%4 = fdiv double 1.000000e+00, %3		; <double> [#uses=1]
         store double %Flint.0.reg2mem.0, double* null
         store double %twoThrd.0.reg2mem.0, double* null
-	%5 = add double %4, %Flint.0.reg2mem.0		; <double> [#uses=1]
-	%6 = add double %k.0.reg2mem.0, 1.000000e+00		; <double> [#uses=1]
+	%5 = fadd double %4, %Flint.0.reg2mem.0		; <double> [#uses=1]
+	%6 = fadd double %k.0.reg2mem.0, 1.000000e+00		; <double> [#uses=1]
 	br label %bb
 }
 
diff --git a/test/CodeGen/X86/pre-split5.ll b/test/CodeGen/X86/pre-split5.ll
index d353825..b83003f 100644
--- a/test/CodeGen/X86/pre-split5.ll
+++ b/test/CodeGen/X86/pre-split5.ll
@@ -40,7 +40,7 @@
 
 bb30:		; preds = %bb36, %bb28
 	%m.1.reg2mem.0 = phi i32 [ %m.0, %bb36 ], [ 0, %bb28 ]		; <i32> [#uses=1]
-	%1 = mul double 0.000000e+00, %0		; <double> [#uses=1]
+	%1 = fmul double 0.000000e+00, %0		; <double> [#uses=1]
 	%2 = fptosi double %1 to i32		; <i32> [#uses=1]
 	br i1 false, label %bb36, label %bb35
 
diff --git a/test/CodeGen/X86/pre-split6.ll b/test/CodeGen/X86/pre-split6.ll
index 7808223..e771b80 100644
--- a/test/CodeGen/X86/pre-split6.ll
+++ b/test/CodeGen/X86/pre-split6.ll
@@ -20,14 +20,14 @@
 bb9.i:		; preds = %bb.nph
 	%3 = tail call double @asin(double 0.000000e+00) nounwind readonly		; <double> [#uses=0]
 	%4 = fdiv double 1.000000e+00, %1		; <double> [#uses=1]
-	%5 = mul double %4, 0.000000e+00		; <double> [#uses=1]
+	%5 = fmul double %4, 0.000000e+00		; <double> [#uses=1]
 	%6 = tail call double @asin(double %5) nounwind readonly		; <double> [#uses=0]
 	unreachable
 
 bb13.i:		; preds = %bb.nph
 	%7 = fdiv double 1.000000e+00, %1		; <double> [#uses=1]
 	%8 = tail call double @sin(double 0.000000e+00) nounwind readonly		; <double> [#uses=1]
-	%9 = mul double %7, %8		; <double> [#uses=1]
+	%9 = fmul double %7, %8		; <double> [#uses=1]
 	%10 = tail call double @asin(double %9) nounwind readonly		; <double> [#uses=0]
 	unreachable
 
diff --git a/test/CodeGen/X86/pre-split7.ll b/test/CodeGen/X86/pre-split7.ll
index 7f7b933..cd9d205 100644
--- a/test/CodeGen/X86/pre-split7.ll
+++ b/test/CodeGen/X86/pre-split7.ll
@@ -17,15 +17,15 @@
 
 bb:		; preds = %bb, %entry
 	%0 = tail call double @asin(double 0.000000e+00) nounwind readonly		; <double> [#uses=1]
-	%1 = add double 0.000000e+00, %0		; <double> [#uses=2]
+	%1 = fadd double 0.000000e+00, %0		; <double> [#uses=2]
 	%2 = tail call double @asin(double 0.000000e+00) nounwind readonly		; <double> [#uses=1]
-	%3 = sub double %1, %2		; <double> [#uses=2]
+	%3 = fsub double %1, %2		; <double> [#uses=2]
 	store double %3, double* @axis_slope_angle, align 8
 	%4 = fdiv double %1, 2.000000e+00		; <double> [#uses=1]
 	%5 = tail call double @sin(double %4) nounwind readonly		; <double> [#uses=1]
-	%6 = mul double 0.000000e+00, %5		; <double> [#uses=1]
+	%6 = fmul double 0.000000e+00, %5		; <double> [#uses=1]
 	%7 = tail call double @tan(double %3) nounwind readonly		; <double> [#uses=0]
-	%8 = add double 0.000000e+00, %6		; <double> [#uses=1]
+	%8 = fadd double 0.000000e+00, %6		; <double> [#uses=1]
 	store double %8, double* @object_distance, align 8
 	br label %bb
 
diff --git a/test/CodeGen/X86/pre-split8.ll b/test/CodeGen/X86/pre-split8.ll
index eb6d49f..2259819 100644
--- a/test/CodeGen/X86/pre-split8.ll
+++ b/test/CodeGen/X86/pre-split8.ll
@@ -19,12 +19,12 @@
 	br i1 %1, label %bb9.i, label %bb13.i
 
 bb9.i:		; preds = %bb
-	%2 = sub double %.rle4, %0		; <double> [#uses=0]
+	%2 = fsub double %.rle4, %0		; <double> [#uses=0]
 	%3 = tail call double @asin(double 0.000000e+00) nounwind readonly		; <double> [#uses=0]
-	%4 = mul double 0.000000e+00, %0		; <double> [#uses=1]
+	%4 = fmul double 0.000000e+00, %0		; <double> [#uses=1]
 	%5 = tail call double @tan(double 0.000000e+00) nounwind readonly		; <double> [#uses=0]
-	%6 = mul double %4, 0.000000e+00		; <double> [#uses=1]
-	%7 = add double %6, 0.000000e+00		; <double> [#uses=1]
+	%6 = fmul double %4, 0.000000e+00		; <double> [#uses=1]
+	%7 = fadd double %6, 0.000000e+00		; <double> [#uses=1]
 	br i1 false, label %return, label %bb
 
 bb13.i:		; preds = %bb
diff --git a/test/CodeGen/X86/pre-split9.ll b/test/CodeGen/X86/pre-split9.ll
index bfafe85..1be960f 100644
--- a/test/CodeGen/X86/pre-split9.ll
+++ b/test/CodeGen/X86/pre-split9.ll
@@ -21,13 +21,13 @@
 	br i1 %1, label %bb9.i, label %bb13.i
 
 bb9.i:		; preds = %bb
-	%2 = sub double %.rle4, %0		; <double> [#uses=0]
+	%2 = fsub double %.rle4, %0		; <double> [#uses=0]
 	%3 = tail call double @asin(double 0.000000e+00) nounwind readonly		; <double> [#uses=0]
 	%4 = tail call double @sin(double 0.000000e+00) nounwind readonly		; <double> [#uses=1]
-	%5 = mul double %4, %0		; <double> [#uses=1]
+	%5 = fmul double %4, %0		; <double> [#uses=1]
 	%6 = tail call double @tan(double 0.000000e+00) nounwind readonly		; <double> [#uses=0]
-	%7 = mul double %5, 0.000000e+00		; <double> [#uses=1]
-	%8 = add double %7, 0.000000e+00		; <double> [#uses=1]
+	%7 = fmul double %5, 0.000000e+00		; <double> [#uses=1]
+	%8 = fadd double %7, 0.000000e+00		; <double> [#uses=1]
 	br i1 false, label %return, label %bb
 
 bb13.i:		; preds = %bb
diff --git a/test/CodeGen/X86/shrink-fp-const1.ll b/test/CodeGen/X86/shrink-fp-const1.ll
index 966e69e..3406aee 100644
--- a/test/CodeGen/X86/shrink-fp-const1.ll
+++ b/test/CodeGen/X86/shrink-fp-const1.ll
@@ -2,6 +2,6 @@
 ; PR1264
 
 define double @foo(double %x) {
-        %y = mul double %x, 5.000000e-01
+        %y = fmul double %x, 5.000000e-01
         ret double %y
 }
diff --git a/test/CodeGen/X86/small-byval-memcpy.ll b/test/CodeGen/X86/small-byval-memcpy.ll
index dedd948..8b87f74 100644
--- a/test/CodeGen/X86/small-byval-memcpy.ll
+++ b/test/CodeGen/X86/small-byval-memcpy.ll
@@ -8,7 +8,7 @@
 	%iz = alloca { x86_fp80, x86_fp80 }		; <{ x86_fp80, x86_fp80 }*> [#uses=3]
 	%tmp1 = getelementptr { x86_fp80, x86_fp80 }* %z, i32 0, i32 1		; <x86_fp80*> [#uses=1]
 	%tmp2 = load x86_fp80* %tmp1, align 16		; <x86_fp80> [#uses=1]
-	%tmp3 = sub x86_fp80 0xK80000000000000000000, %tmp2		; <x86_fp80> [#uses=1]
+	%tmp3 = fsub x86_fp80 0xK80000000000000000000, %tmp2		; <x86_fp80> [#uses=1]
 	%tmp4 = getelementptr { x86_fp80, x86_fp80 }* %iz, i32 0, i32 1		; <x86_fp80*> [#uses=1]
 	%real = getelementptr { x86_fp80, x86_fp80 }* %iz, i32 0, i32 0		; <x86_fp80*> [#uses=1]
 	%tmp6 = getelementptr { x86_fp80, x86_fp80 }* %z, i32 0, i32 0		; <x86_fp80*> [#uses=1]
diff --git a/test/CodeGen/X86/soft-fp.ll b/test/CodeGen/X86/soft-fp.ll
index 7fa8fed..0c697de 100644
--- a/test/CodeGen/X86/soft-fp.ll
+++ b/test/CodeGen/X86/soft-fp.ll
@@ -22,6 +22,6 @@
 
 define float @t2(float %a, float %b) nounwind readnone {
 entry:
-	%0 = add float %a, %b		; <float> [#uses=1]
+	%0 = fadd float %a, %b		; <float> [#uses=1]
 	ret float %0
 }
diff --git a/test/CodeGen/X86/sse-align-0.ll b/test/CodeGen/X86/sse-align-0.ll
index 39debaa..5a888b2 100644
--- a/test/CodeGen/X86/sse-align-0.ll
+++ b/test/CodeGen/X86/sse-align-0.ll
@@ -2,11 +2,11 @@
 
 define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind {
   %t = load <4 x float>* %p
-  %z = mul <4 x float> %t, %x
+  %z = fmul <4 x float> %t, %x
   ret <4 x float> %z
 }
 define <2 x double> @bar(<2 x double>* %p, <2 x double> %x) nounwind {
   %t = load <2 x double>* %p
-  %z = mul <2 x double> %t, %x
+  %z = fmul <2 x double> %t, %x
   ret <2 x double> %z
 }
diff --git a/test/CodeGen/X86/sse-align-2.ll b/test/CodeGen/X86/sse-align-2.ll
index b5b261d..ba693a2 100644
--- a/test/CodeGen/X86/sse-align-2.ll
+++ b/test/CodeGen/X86/sse-align-2.ll
@@ -2,11 +2,11 @@
 
 define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind {
   %t = load <4 x float>* %p, align 4
-  %z = mul <4 x float> %t, %x
+  %z = fmul <4 x float> %t, %x
   ret <4 x float> %z
 }
 define <2 x double> @bar(<2 x double>* %p, <2 x double> %x) nounwind {
   %t = load <2 x double>* %p, align 8
-  %z = mul <2 x double> %t, %x
+  %z = fmul <2 x double> %t, %x
   ret <2 x double> %z
 }
diff --git a/test/CodeGen/X86/sse-fcopysign.ll b/test/CodeGen/X86/sse-fcopysign.ll
index cff1f7f..d8c3283 100644
--- a/test/CodeGen/X86/sse-fcopysign.ll
+++ b/test/CodeGen/X86/sse-fcopysign.ll
@@ -6,7 +6,7 @@
 }
 
 define double @tst2(double %a, float %b, float %c) {
-	%tmp1 = add float %b, %c
+	%tmp1 = fadd float %b, %c
 	%tmp2 = fpext float %tmp1 to double
 	%tmp = tail call double @copysign( double %a, double %tmp2 )
 	ret double %tmp
diff --git a/test/CodeGen/X86/sse41-extractps-bitcast-1.ll b/test/CodeGen/X86/sse41-extractps-bitcast-1.ll
index fc0df06..470d146 100644
--- a/test/CodeGen/X86/sse41-extractps-bitcast-1.ll
+++ b/test/CodeGen/X86/sse41-extractps-bitcast-1.ll
@@ -6,7 +6,7 @@
 
 define float @bar(<4 x float> %v) {
   %s = extractelement <4 x float> %v, i32 3
-  %t = add float %s, 1.0
+  %t = fadd float %s, 1.0
   ret float %t
 }
 define float @baz(<4 x float> %v) {
diff --git a/test/CodeGen/X86/stack-align.ll b/test/CodeGen/X86/stack-align.ll
index 1e6c2b2..dda6f0d 100644
--- a/test/CodeGen/X86/stack-align.ll
+++ b/test/CodeGen/X86/stack-align.ll
@@ -14,7 +14,7 @@
 	%tmp2 = tail call double @fabs( double %tmp1 )		; <double> [#uses=1]
 	%tmp3 = load double* @G, align 16		; <double> [#uses=1]
 	%tmp4 = tail call double @fabs( double %tmp3 )		; <double> [#uses=1]
-	%tmp6 = add double %tmp4, %tmp2		; <double> [#uses=1]
+	%tmp6 = fadd double %tmp4, %tmp2		; <double> [#uses=1]
 	store double %tmp6, double* %P, align 8
 	ret void
 }
diff --git a/test/CodeGen/X86/storetrunc-fp.ll b/test/CodeGen/X86/storetrunc-fp.ll
index 655cbd6..945cf48 100644
--- a/test/CodeGen/X86/storetrunc-fp.ll
+++ b/test/CodeGen/X86/storetrunc-fp.ll
@@ -1,7 +1,7 @@
 ; RUN: llvm-as < %s | llc -march=x86 | not grep flds
 
 define void @foo(x86_fp80 %a, x86_fp80 %b, float* %fp) {
-	%c = add x86_fp80 %a, %b
+	%c = fadd x86_fp80 %a, %b
 	%d = fptrunc x86_fp80 %c to float
 	store float %d, float* %fp
 	ret void
diff --git a/test/CodeGen/X86/stride-reuse.ll b/test/CodeGen/X86/stride-reuse.ll
index 97f33d8..277a443 100644
--- a/test/CodeGen/X86/stride-reuse.ll
+++ b/test/CodeGen/X86/stride-reuse.ll
@@ -14,7 +14,7 @@
 	%i.019.0 = phi i32 [ %indvar.next, %bb ], [ 0, %entry ]
 	%tmp2 = getelementptr [1000 x float]* @B, i32 0, i32 %i.019.0
 	%tmp3 = load float* %tmp2, align 4
-	%tmp4 = mul float %tmp3, 2.000000e+00
+	%tmp4 = fmul float %tmp3, 2.000000e+00
 	%tmp5 = getelementptr [1000 x float]* @A, i32 0, i32 %i.019.0
 	store float %tmp4, float* %tmp5, align 4
 	%tmp8 = shl i32 %i.019.0, 1
diff --git a/test/CodeGen/X86/twoaddr-coalesce-2.ll b/test/CodeGen/X86/twoaddr-coalesce-2.ll
index 9a011f7..3fe4cd1 100644
--- a/test/CodeGen/X86/twoaddr-coalesce-2.ll
+++ b/test/CodeGen/X86/twoaddr-coalesce-2.ll
@@ -9,7 +9,7 @@
 	%tmp.i3 = bitcast <2 x double> %B to <2 x i64>		; <<2 x i64>> [#uses=1]
 	%tmp2.i = or <2 x i64> %tmp.i3, <i64 4607632778762754458, i64 4607632778762754458>		; <<2 x i64>> [#uses=1]
 	%tmp3.i = bitcast <2 x i64> %tmp2.i to <2 x double>		; <<2 x double>> [#uses=1]
-	%tmp.i2 = add <2 x double> %tmp3.i, %A		; <<2 x double>> [#uses=1]
-	%tmp.i = add <2 x double> %tmp.i2, %C		; <<2 x double>> [#uses=1]
+	%tmp.i2 = fadd <2 x double> %tmp3.i, %A		; <<2 x double>> [#uses=1]
+	%tmp.i = fadd <2 x double> %tmp.i2, %C		; <<2 x double>> [#uses=1]
 	ret <2 x double> %tmp.i
 }
diff --git a/test/CodeGen/X86/vec_extract.ll b/test/CodeGen/X86/vec_extract.ll
index f1f009e..ee7567c 100644
--- a/test/CodeGen/X86/vec_extract.ll
+++ b/test/CodeGen/X86/vec_extract.ll
@@ -6,7 +6,7 @@
 
 define void @test1(<4 x float>* %F, float* %f) nounwind {
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
-	%tmp7 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+	%tmp7 = fadd <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
 	%tmp2 = extractelement <4 x float> %tmp7, i32 0		; <float> [#uses=1]
 	store float %tmp2, float* %f
 	ret void
@@ -14,7 +14,7 @@
 
 define float @test2(<4 x float>* %F, float* %f) nounwind {
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
-	%tmp7 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+	%tmp7 = fadd <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
 	%tmp2 = extractelement <4 x float> %tmp7, i32 2		; <float> [#uses=1]
 	ret float %tmp2
 }
@@ -29,7 +29,7 @@
 define double @test4(double %A) nounwind {
 	%tmp1 = call <2 x double> @foo( )		; <<2 x double>> [#uses=1]
 	%tmp2 = extractelement <2 x double> %tmp1, i32 1		; <double> [#uses=1]
-	%tmp3 = add double %tmp2, %A		; <double> [#uses=1]
+	%tmp3 = fadd double %tmp2, %A		; <double> [#uses=1]
 	ret double %tmp3
 }
 
diff --git a/test/CodeGen/X86/vec_fneg.ll b/test/CodeGen/X86/vec_fneg.ll
index 03765d6..a801472 100644
--- a/test/CodeGen/X86/vec_fneg.ll
+++ b/test/CodeGen/X86/vec_fneg.ll
@@ -1,11 +1,11 @@
 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
 
 define <4 x float> @t1(<4 x float> %Q) {
-        %tmp15 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %Q
+        %tmp15 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %Q
 	ret <4 x float> %tmp15
 }
 
 define <4 x float> @t2(<4 x float> %Q) {
-        %tmp15 = sub <4 x float> zeroinitializer, %Q
+        %tmp15 = fsub <4 x float> zeroinitializer, %Q
 	ret <4 x float> %tmp15
 }
diff --git a/test/CodeGen/X86/vec_ins_extract.ll b/test/CodeGen/X86/vec_ins_extract.ll
index 86f1306..7882839 100644
--- a/test/CodeGen/X86/vec_ins_extract.ll
+++ b/test/CodeGen/X86/vec_ins_extract.ll
@@ -7,9 +7,9 @@
 define void @test(<4 x float>* %F, float %f) {
 entry:
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
-	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+	%tmp3 = fadd <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
 	%tmp10 = insertelement <4 x float> %tmp3, float %f, i32 0		; <<4 x float>> [#uses=2]
-	%tmp6 = add <4 x float> %tmp10, %tmp10		; <<4 x float>> [#uses=1]
+	%tmp6 = fadd <4 x float> %tmp10, %tmp10		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp6, <4 x float>* %F
 	ret void
 }
@@ -18,12 +18,12 @@
 entry:
 	%G = alloca <4 x float>, align 16		; <<4 x float>*> [#uses=3]
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
-	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+	%tmp3 = fadd <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp3, <4 x float>* %G
 	%tmp.upgrd.1 = getelementptr <4 x float>* %G, i32 0, i32 2		; <float*> [#uses=1]
 	store float %f, float* %tmp.upgrd.1
 	%tmp4 = load <4 x float>* %G		; <<4 x float>> [#uses=2]
-	%tmp6 = add <4 x float> %tmp4, %tmp4		; <<4 x float>> [#uses=1]
+	%tmp6 = fadd <4 x float> %tmp4, %tmp4		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp6, <4 x float>* %F
 	ret void
 }
@@ -32,7 +32,7 @@
 entry:
 	%G = alloca <4 x float>, align 16		; <<4 x float>*> [#uses=2]
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
-	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+	%tmp3 = fadd <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp3, <4 x float>* %G
 	%tmp.upgrd.2 = getelementptr <4 x float>* %G, i32 0, i32 2		; <float*> [#uses=1]
 	%tmp.upgrd.3 = load float* %tmp.upgrd.2		; <float> [#uses=1]
@@ -45,7 +45,7 @@
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
 	%tmp5.lhs = extractelement <4 x float> %tmp, i32 0		; <float> [#uses=1]
 	%tmp5.rhs = extractelement <4 x float> %tmp, i32 0		; <float> [#uses=1]
-	%tmp5 = add float %tmp5.lhs, %tmp5.rhs		; <float> [#uses=1]
+	%tmp5 = fadd float %tmp5.lhs, %tmp5.rhs		; <float> [#uses=1]
 	store float %tmp5, float* %f
 	ret void
 }
diff --git a/test/CodeGen/X86/vec_insert.ll b/test/CodeGen/X86/vec_insert.ll
index e032c5b..3a9464c 100644
--- a/test/CodeGen/X86/vec_insert.ll
+++ b/test/CodeGen/X86/vec_insert.ll
@@ -5,7 +5,7 @@
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=1]
 	%f = sitofp i32 %I to float		; <float> [#uses=1]
 	%tmp1 = insertelement <4 x float> %tmp, float %f, i32 0		; <<4 x float>> [#uses=2]
-	%tmp18 = add <4 x float> %tmp1, %tmp1		; <<4 x float>> [#uses=1]
+	%tmp18 = fadd <4 x float> %tmp1, %tmp1		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp18, <4 x float>* %F
 	ret void
 }
diff --git a/test/CodeGen/X86/vec_logical.ll b/test/CodeGen/X86/vec_logical.ll
index 6e03afb..f895762 100644
--- a/test/CodeGen/X86/vec_logical.ll
+++ b/test/CodeGen/X86/vec_logical.ll
@@ -4,7 +4,7 @@
 ; RUN: grep movaps %t | count 2
 
 define void @t(<4 x float> %A) {
-	%tmp1277 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %A
+	%tmp1277 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %A
 	store <4 x float> %tmp1277, <4 x float>* null
 	ret void
 }
diff --git a/test/CodeGen/X86/vec_select.ll b/test/CodeGen/X86/vec_select.ll
index ede7ab2..ecb825b 100644
--- a/test/CodeGen/X86/vec_select.ll
+++ b/test/CodeGen/X86/vec_select.ll
@@ -3,7 +3,7 @@
 define void @test(i32 %C, <4 x float>* %A, <4 x float>* %B) {
         %tmp = load <4 x float>* %A             ; <<4 x float>> [#uses=1]
         %tmp3 = load <4 x float>* %B            ; <<4 x float>> [#uses=2]
-        %tmp9 = mul <4 x float> %tmp3, %tmp3            ; <<4 x float>> [#uses=1]
+        %tmp9 = fmul <4 x float> %tmp3, %tmp3            ; <<4 x float>> [#uses=1]
         %tmp.upgrd.1 = icmp eq i32 %C, 0                ; <i1> [#uses=1]
         %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp               ; <<4 x float>> [#uses=1]
         store <4 x float> %iftmp.38.0, <4 x float>* %A
diff --git a/test/CodeGen/X86/vec_shuffle-27.ll b/test/CodeGen/X86/vec_shuffle-27.ll
index 6baf47a..231ac0c 100644
--- a/test/CodeGen/X86/vec_shuffle-27.ll
+++ b/test/CodeGen/X86/vec_shuffle-27.ll
@@ -10,8 +10,8 @@
 define <8 x float> @my2filter4_1d(<4 x float> %a, <8 x float> %T0, <8 x float> %T1) nounwind readnone {
 entry:
 	%tmp7 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3 >		; <<8 x float>> [#uses=1]
-	%sub = sub <8 x float> %T1, %T0		; <<8 x float>> [#uses=1]
-	%mul = mul <8 x float> %sub, %tmp7		; <<8 x float>> [#uses=1]
-	%add = add <8 x float> %mul, %T0		; <<8 x float>> [#uses=1]
+	%sub = fsub <8 x float> %T1, %T0		; <<8 x float>> [#uses=1]
+	%mul = fmul <8 x float> %sub, %tmp7		; <<8 x float>> [#uses=1]
+	%add = fadd <8 x float> %mul, %T0		; <<8 x float>> [#uses=1]
 	ret <8 x float> %add
 }
diff --git a/test/CodeGen/X86/vec_shuffle-3.ll b/test/CodeGen/X86/vec_shuffle-3.ll
index 6de1038..018b4cf 100644
--- a/test/CodeGen/X86/vec_shuffle-3.ll
+++ b/test/CodeGen/X86/vec_shuffle-3.ll
@@ -5,8 +5,8 @@
 define <4 x float> @test1(<4 x float>* %x, <4 x float>* %y) {
         %tmp = load <4 x float>* %y             ; <<4 x float>> [#uses=2]
         %tmp5 = load <4 x float>* %x            ; <<4 x float>> [#uses=2]
-        %tmp9 = add <4 x float> %tmp5, %tmp             ; <<4 x float>> [#uses=1]
-        %tmp21 = sub <4 x float> %tmp5, %tmp            ; <<4 x float>> [#uses=1]
+        %tmp9 = fadd <4 x float> %tmp5, %tmp             ; <<4 x float>> [#uses=1]
+        %tmp21 = fsub <4 x float> %tmp5, %tmp            ; <<4 x float>> [#uses=1]
         %tmp27 = shufflevector <4 x float> %tmp9, <4 x float> %tmp21, <4 x i32> < i32 0, i32 1, i32 4, i32 5 >                ; <<4 x float>> [#uses=1]
         ret <4 x float> %tmp27
 }
diff --git a/test/CodeGen/X86/vec_shuffle-5.ll b/test/CodeGen/X86/vec_shuffle-5.ll
index 1acd73f..e356f24 100644
--- a/test/CodeGen/X86/vec_shuffle-5.ll
+++ b/test/CodeGen/X86/vec_shuffle-5.ll
@@ -6,7 +6,7 @@
         %tmp1 = load <4 x float>* null          ; <<4 x float>> [#uses=2]
         %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 0, i32 1, i32 6, i32 7 >             ; <<4 x float>> [#uses=1]
         %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 6, i32 7 >                ; <<4 x float>> [#uses=1]
-        %tmp4 = add <4 x float> %tmp2, %tmp3            ; <<4 x float>> [#uses=1]
+        %tmp4 = fadd <4 x float> %tmp2, %tmp3            ; <<4 x float>> [#uses=1]
         store <4 x float> %tmp4, <4 x float>* null
         ret void
 }
diff --git a/test/CodeGen/X86/vec_splat.ll b/test/CodeGen/X86/vec_splat.ll
index 64222e4..89914fd 100644
--- a/test/CodeGen/X86/vec_splat.ll
+++ b/test/CodeGen/X86/vec_splat.ll
@@ -7,7 +7,7 @@
 	%tmp4 = insertelement <4 x float> %tmp2, float %X, i32 2		; <<4 x float>> [#uses=1]
 	%tmp6 = insertelement <4 x float> %tmp4, float %X, i32 3		; <<4 x float>> [#uses=1]
 	%tmp8 = load <4 x float>* %Q		; <<4 x float>> [#uses=1]
-	%tmp10 = mul <4 x float> %tmp8, %tmp6		; <<4 x float>> [#uses=1]
+	%tmp10 = fmul <4 x float> %tmp8, %tmp6		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp10, <4 x float>* %P
 	ret void
 }
@@ -16,7 +16,7 @@
 	%tmp = insertelement <2 x double> zeroinitializer, double %X, i32 0		; <<2 x double>> [#uses=1]
 	%tmp2 = insertelement <2 x double> %tmp, double %X, i32 1		; <<2 x double>> [#uses=1]
 	%tmp4 = load <2 x double>* %Q		; <<2 x double>> [#uses=1]
-	%tmp6 = mul <2 x double> %tmp4, %tmp2		; <<2 x double>> [#uses=1]
+	%tmp6 = fmul <2 x double> %tmp4, %tmp2		; <<2 x double>> [#uses=1]
 	store <2 x double> %tmp6, <2 x double>* %P
 	ret void
 }
diff --git a/test/CodeGen/X86/vec_ss_load_fold.ll b/test/CodeGen/X86/vec_ss_load_fold.ll
index 0f15f92..69900a6 100644
--- a/test/CodeGen/X86/vec_ss_load_fold.ll
+++ b/test/CodeGen/X86/vec_ss_load_fold.ll
@@ -20,8 +20,8 @@
 }
 
 define i16 @test2(float %f) nounwind {
-	%tmp28 = sub float %f, 1.000000e+00		; <float> [#uses=1]
-	%tmp37 = mul float %tmp28, 5.000000e-01		; <float> [#uses=1]
+	%tmp28 = fsub float %f, 1.000000e+00		; <float> [#uses=1]
+	%tmp37 = fmul float %tmp28, 5.000000e-01		; <float> [#uses=1]
 	%tmp375 = insertelement <4 x float> undef, float %tmp37, i32 0		; <<4 x float>> [#uses=1]
 	%tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > )		; <<4 x float>> [#uses=1]
 	%tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> < float 0.000000e+00, float undef, float undef, float undef > )		; <<4 x float>> [#uses=1]
diff --git a/test/CodeGen/X86/vec_zero.ll b/test/CodeGen/X86/vec_zero.ll
index 17b378f..0a7a543 100644
--- a/test/CodeGen/X86/vec_zero.ll
+++ b/test/CodeGen/X86/vec_zero.ll
@@ -2,7 +2,7 @@
 
 define void @foo(<4 x float>* %P) {
         %T = load <4 x float>* %P               ; <<4 x float>> [#uses=1]
-        %S = add <4 x float> zeroinitializer, %T                ; <<4 x float>> [#uses=1]
+        %S = fadd <4 x float> zeroinitializer, %T                ; <<4 x float>> [#uses=1]
         store <4 x float> %S, <4 x float>* %P
         ret void
 }
diff --git a/test/CodeGen/X86/vector.ll b/test/CodeGen/X86/vector.ll
index e7f3b92..8e1de2f 100644
--- a/test/CodeGen/X86/vector.ll
+++ b/test/CodeGen/X86/vector.ll
@@ -15,7 +15,7 @@
 define void @test_f1(%f1* %P, %f1* %Q, %f1* %S) {
         %p = load %f1* %P               ; <%f1> [#uses=1]
         %q = load %f1* %Q               ; <%f1> [#uses=1]
-        %R = add %f1 %p, %q             ; <%f1> [#uses=1]
+        %R = fadd %f1 %p, %q             ; <%f1> [#uses=1]
         store %f1 %R, %f1* %S
         ret void
 }
@@ -23,7 +23,7 @@
 define void @test_f2(%f2* %P, %f2* %Q, %f2* %S) {
         %p = load %f2* %P               ; <%f2> [#uses=1]
         %q = load %f2* %Q               ; <%f2> [#uses=1]
-        %R = add %f2 %p, %q             ; <%f2> [#uses=1]
+        %R = fadd %f2 %p, %q             ; <%f2> [#uses=1]
         store %f2 %R, %f2* %S
         ret void
 }
@@ -31,7 +31,7 @@
 define void @test_f4(%f4* %P, %f4* %Q, %f4* %S) {
         %p = load %f4* %P               ; <%f4> [#uses=1]
         %q = load %f4* %Q               ; <%f4> [#uses=1]
-        %R = add %f4 %p, %q             ; <%f4> [#uses=1]
+        %R = fadd %f4 %p, %q             ; <%f4> [#uses=1]
         store %f4 %R, %f4* %S
         ret void
 }
@@ -39,7 +39,7 @@
 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
         %p = load %f8* %P               ; <%f8> [#uses=1]
         %q = load %f8* %Q               ; <%f8> [#uses=1]
-        %R = add %f8 %p, %q             ; <%f8> [#uses=1]
+        %R = fadd %f8 %p, %q             ; <%f8> [#uses=1]
         store %f8 %R, %f8* %S
         ret void
 }
@@ -47,7 +47,7 @@
 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
         %p = load %f8* %P               ; <%f8> [#uses=1]
         %q = load %f8* %Q               ; <%f8> [#uses=1]
-        %R = mul %f8 %p, %q             ; <%f8> [#uses=1]
+        %R = fmul %f8 %p, %q             ; <%f8> [#uses=1]
         store %f8 %R, %f8* %S
         ret void
 }
@@ -64,21 +64,21 @@
 
 define void @test_cst(%f4* %P, %f4* %S) {
         %p = load %f4* %P               ; <%f4> [#uses=1]
-        %R = add %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float 2.000000e+00, float 4.500000e+00 >             ; <%f4> [#uses=1]
+        %R = fadd %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float 2.000000e+00, float 4.500000e+00 >             ; <%f4> [#uses=1]
         store %f4 %R, %f4* %S
         ret void
 }
 
 define void @test_zero(%f4* %P, %f4* %S) {
         %p = load %f4* %P               ; <%f4> [#uses=1]
-        %R = add %f4 %p, zeroinitializer                ; <%f4> [#uses=1]
+        %R = fadd %f4 %p, zeroinitializer                ; <%f4> [#uses=1]
         store %f4 %R, %f4* %S
         ret void
 }
 
 define void @test_undef(%f4* %P, %f4* %S) {
         %p = load %f4* %P               ; <%f4> [#uses=1]
-        %R = add %f4 %p, undef          ; <%f4> [#uses=1]
+        %R = fadd %f4 %p, undef          ; <%f4> [#uses=1]
         store %f4 %R, %f4* %S
         ret void
 }
@@ -115,7 +115,7 @@
 
 define void @test_cast_1(%f4* %b, %i4* %a) {
         %tmp = load %f4* %b             ; <%f4> [#uses=1]
-        %tmp2 = add %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >              ; <%f4> [#uses=1]
+        %tmp2 = fadd %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >              ; <%f4> [#uses=1]
         %tmp3 = bitcast %f4 %tmp2 to %i4                ; <%i4> [#uses=1]
         %tmp4 = add %i4 %tmp3, < i32 1, i32 2, i32 3, i32 4 >           ; <%i4> [#uses=1]
         store %i4 %tmp4, %i4* %a
@@ -138,7 +138,7 @@
         %tmp4 = insertelement %f4 %tmp2, float %X, i32 2                ; <%f4> [#uses=1]
         %tmp6 = insertelement %f4 %tmp4, float %X, i32 3                ; <%f4> [#uses=1]
         %q = load %f4* %Q               ; <%f4> [#uses=1]
-        %R = add %f4 %q, %tmp6          ; <%f4> [#uses=1]
+        %R = fadd %f4 %q, %tmp6          ; <%f4> [#uses=1]
         store %f4 %R, %f4* %P
         ret void
 }
diff --git a/test/CodeGen/X86/widen_arith-6.ll b/test/CodeGen/X86/widen_arith-6.ll
index 59548c3..7b0bb33 100644
--- a/test/CodeGen/X86/widen_arith-6.ll
+++ b/test/CodeGen/X86/widen_arith-6.ll
@@ -34,8 +34,8 @@
 	%arrayidx6 = getelementptr <3 x float>* %tmp5, i32 %tmp4		; <<3 x float>*> [#uses=1]
 	%tmp7 = load <3 x float>* %arrayidx6		; <<3 x float>> [#uses=1]
 	%tmp8 = load <3 x float>* %v		; <<3 x float>> [#uses=1]
-	%mul = mul <3 x float> %tmp7, %tmp8		; <<3 x float>> [#uses=1]
-	%add = add <3 x float> %mul, < float 0x409EE02900000000, float 0x409EE02900000000, float 0x409EE02900000000 >		; <<3 x float>> [#uses=1]
+	%mul = fmul <3 x float> %tmp7, %tmp8		; <<3 x float>> [#uses=1]
+	%add = fadd <3 x float> %mul, < float 0x409EE02900000000, float 0x409EE02900000000, float 0x409EE02900000000 >		; <<3 x float>> [#uses=1]
 	store <3 x float> %add, <3 x float>* %arrayidx
 	br label %forinc
 
diff --git a/test/CodeGen/X86/widen_shuffle-1.ll b/test/CodeGen/X86/widen_shuffle-1.ll
index d3bbd5f..a676f33 100644
--- a/test/CodeGen/X86/widen_shuffle-1.ll
+++ b/test/CodeGen/X86/widen_shuffle-1.ll
@@ -5,7 +5,7 @@
 define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
 entry:
 	%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 1, i32 2>
-	%val = add <3 x float> %x, %src2;
+	%val = fadd <3 x float> %x, %src2;
 	store <3 x float> %val, <3 x float>* %dst.addr
 	ret void
 }
diff --git a/test/CodeGen/X86/widen_shuffle-2.ll b/test/CodeGen/X86/widen_shuffle-2.ll
index d25e02e..c2dfa3d 100644
--- a/test/CodeGen/X86/widen_shuffle-2.ll
+++ b/test/CodeGen/X86/widen_shuffle-2.ll
@@ -5,7 +5,7 @@
 define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
 entry:
 	%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 4, i32 2>
-	%val = add <3 x float> %x, %src2;
+	%val = fadd <3 x float> %x, %src2;
 	store <3 x float> %val, <3 x float>* %dst.addr
 	ret void
 }
diff --git a/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll b/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
index 735e988..b9333c9 100644
--- a/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
+++ b/test/CodeGen/XCore/2009-01-14-Remat-Crash.ll
@@ -8,11 +8,11 @@
 	ret double 0.000000e+00
 
 bb129:		; preds = %entry
-	%tmp134 = sub double %b, %a		; <double> [#uses=1]
-	%tmp136 = sub double %tmp134, %c		; <double> [#uses=1]
-	%tmp138 = add double %tmp136, %d		; <double> [#uses=1]
-	%tmp140 = sub double %tmp138, %e		; <double> [#uses=1]
-	%tmp142 = add double %tmp140, %f		; <double> [#uses=1]
-	%tmp.0 = mul double %tmp142, 0.000000e+00		; <double> [#uses=1]
+	%tmp134 = fsub double %b, %a		; <double> [#uses=1]
+	%tmp136 = fsub double %tmp134, %c		; <double> [#uses=1]
+	%tmp138 = fadd double %tmp136, %d		; <double> [#uses=1]
+	%tmp140 = fsub double %tmp138, %e		; <double> [#uses=1]
+	%tmp142 = fadd double %tmp140, %f		; <double> [#uses=1]
+	%tmp.0 = fmul double %tmp142, 0.000000e+00		; <double> [#uses=1]
 	ret double %tmp.0
 }
diff --git a/test/CodeGen/XCore/fneg.ll b/test/CodeGen/XCore/fneg.ll
index e4426fd..3fb7b01 100644
--- a/test/CodeGen/XCore/fneg.ll
+++ b/test/CodeGen/XCore/fneg.ll
@@ -2,7 +2,7 @@
 ; RUN: grep "xor" %t1.s | count 1
 define i1 @test(double %F) nounwind {
 entry:
-	%0 = sub double -0.000000e+00, %F
+	%0 = fsub double -0.000000e+00, %F
 	%1 = fcmp olt double 0.000000e+00, %0
 	ret i1 %1
 }
diff --git a/test/ExecutionEngine/2003-01-10-FUCOM.ll b/test/ExecutionEngine/2003-01-10-FUCOM.ll
index 628be16..30f9330 100644
--- a/test/ExecutionEngine/2003-01-10-FUCOM.ll
+++ b/test/ExecutionEngine/2003-01-10-FUCOM.ll
@@ -2,10 +2,10 @@
 ; RUN: lli %t.bc > /dev/null
 
 define i32 @main() {
-	%X = add double 0.000000e+00, 1.000000e+00		; <double> [#uses=1]
-	%Y = sub double 0.000000e+00, 1.000000e+00		; <double> [#uses=2]
+	%X = fadd double 0.000000e+00, 1.000000e+00		; <double> [#uses=1]
+	%Y = fsub double 0.000000e+00, 1.000000e+00		; <double> [#uses=2]
 	%Z = fcmp oeq double %X, %Y		; <i1> [#uses=0]
-	add double %Y, 0.000000e+00		; <double>:1 [#uses=0]
+	fadd double %Y, 0.000000e+00		; <double>:1 [#uses=0]
 	ret i32 0
 }
 
diff --git a/test/ExecutionEngine/test-fp.ll b/test/ExecutionEngine/test-fp.ll
index a119b40..2e8ecd5 100644
--- a/test/ExecutionEngine/test-fp.ll
+++ b/test/ExecutionEngine/test-fp.ll
@@ -3,13 +3,13 @@
 
 define double @test(double* %DP, double %Arg) {
 	%D = load double* %DP		; <double> [#uses=1]
-	%V = add double %D, 1.000000e+00		; <double> [#uses=2]
-	%W = sub double %V, %V		; <double> [#uses=3]
-	%X = mul double %W, %W		; <double> [#uses=2]
+	%V = fadd double %D, 1.000000e+00		; <double> [#uses=2]
+	%W = fsub double %V, %V		; <double> [#uses=3]
+	%X = fmul double %W, %W		; <double> [#uses=2]
 	%Y = fdiv double %X, %X		; <double> [#uses=2]
 	%Z = frem double %Y, %Y		; <double> [#uses=3]
 	%Z1 = fdiv double %Z, %W		; <double> [#uses=0]
-	%Q = add double %Z, %Arg		; <double> [#uses=1]
+	%Q = fadd double %Z, %Arg		; <double> [#uses=1]
 	%R = bitcast double %Q to double		; <double> [#uses=1]
 	store double %R, double* %DP
 	ret double %Z
diff --git a/test/ExecutionEngine/test-setcond-fp.ll b/test/ExecutionEngine/test-setcond-fp.ll
index 235c402..b917693 100644
--- a/test/ExecutionEngine/test-setcond-fp.ll
+++ b/test/ExecutionEngine/test-setcond-fp.ll
@@ -3,10 +3,10 @@
 
 
 define i32 @main() {
-	%double1 = add double 0.000000e+00, 0.000000e+00		; <double> [#uses=6]
-	%double2 = add double 0.000000e+00, 0.000000e+00		; <double> [#uses=6]
-	%float1 = add float 0.000000e+00, 0.000000e+00		; <float> [#uses=6]
-	%float2 = add float 0.000000e+00, 0.000000e+00		; <float> [#uses=6]
+	%double1 = fadd double 0.000000e+00, 0.000000e+00		; <double> [#uses=6]
+	%double2 = fadd double 0.000000e+00, 0.000000e+00		; <double> [#uses=6]
+	%float1 = fadd float 0.000000e+00, 0.000000e+00		; <float> [#uses=6]
+	%float2 = fadd float 0.000000e+00, 0.000000e+00		; <float> [#uses=6]
 	%test49 = fcmp oeq float %float1, %float2		; <i1> [#uses=0]
 	%test50 = fcmp oge float %float1, %float2		; <i1> [#uses=0]
 	%test51 = fcmp ogt float %float1, %float2		; <i1> [#uses=0]
diff --git a/test/Feature/ppcld.ll b/test/Feature/ppcld.ll
index f21eb43..393a491 100644
--- a/test/Feature/ppcld.ll
+++ b/test/Feature/ppcld.ll
@@ -15,7 +15,7 @@
 	%tmp = load float* @f		; <float> [#uses=1]
 	%tmp1 = fpext float %tmp to double		; <double> [#uses=1]
 	%tmp2 = load double* @d		; <double> [#uses=1]
-	%tmp3 = mul double %tmp1, %tmp2		; <double> [#uses=1]
+	%tmp3 = fmul double %tmp1, %tmp2		; <double> [#uses=1]
 	%tmp4 = fpext double %tmp3 to ppc_fp128		; <ppc_fp128> [#uses=1]
 	store ppc_fp128 %tmp4, ppc_fp128* @ld
 	br label %return
diff --git a/test/Feature/sparcld.ll b/test/Feature/sparcld.ll
index 2e99bda..095f6f6 100644
--- a/test/Feature/sparcld.ll
+++ b/test/Feature/sparcld.ll
@@ -13,7 +13,7 @@
 	%tmp = load float* @f		; <float> [#uses=1]
 	%tmp1 = fpext float %tmp to double		; <double> [#uses=1]
 	%tmp2 = load double* @d		; <double> [#uses=1]
-	%tmp3 = mul double %tmp1, %tmp2		; <double> [#uses=1]
+	%tmp3 = fmul double %tmp1, %tmp2		; <double> [#uses=1]
 	%tmp4 = fpext double %tmp3 to fp128		; <fp128> [#uses=1]
 	store fp128 %tmp4, fp128* @ld
 	br label %return
diff --git a/test/Feature/x86ld.ll b/test/Feature/x86ld.ll
index 6904003..32005ae 100644
--- a/test/Feature/x86ld.ll
+++ b/test/Feature/x86ld.ll
@@ -15,7 +15,7 @@
 	%tmp = load float* @f		; <float> [#uses=1]
 	%tmp1 = fpext float %tmp to double		; <double> [#uses=1]
 	%tmp2 = load double* @d		; <double> [#uses=1]
-	%tmp3 = mul double %tmp1, %tmp2		; <double> [#uses=1]
+	%tmp3 = fmul double %tmp1, %tmp2		; <double> [#uses=1]
 	%tmp4 = fpext double %tmp3 to x86_fp80		; <x86_fp80> [#uses=1]
 	store x86_fp80 %tmp4, x86_fp80* @ld
 	br label %return
diff --git a/test/Other/2004-08-16-PackedSelect.ll b/test/Other/2004-08-16-PackedSelect.ll
index 6438316..c1d6214 100644
--- a/test/Other/2004-08-16-PackedSelect.ll
+++ b/test/Other/2004-08-16-PackedSelect.ll
@@ -5,7 +5,7 @@
 
 define void @main() {
         %t0 = load <4 x float>* @foo            ; <<4 x float>> [#uses=3]
-        %t1 = add <4 x float> %t0, %t0          ; <<4 x float>> [#uses=1]
+        %t1 = fadd <4 x float> %t0, %t0          ; <<4 x float>> [#uses=1]
         %t2 = select i1 true, <4 x float> %t0, <4 x float> %t1          ; <<4 x float>> [#uses=1]
         store <4 x float> %t2, <4 x float>* @bar
         ret void
diff --git a/test/Other/2004-08-16-PackedSimple.ll b/test/Other/2004-08-16-PackedSimple.ll
index 5bb8b79..81cecd4 100644
--- a/test/Other/2004-08-16-PackedSimple.ll
+++ b/test/Other/2004-08-16-PackedSimple.ll
@@ -5,7 +5,7 @@
 
 define void @main() {
         %t0 = load <4 x float>* @foo            ; <<4 x float>> [#uses=3]
-        %t2 = add <4 x float> %t0, %t0          ; <<4 x float>> [#uses=1]
+        %t2 = fadd <4 x float> %t0, %t0          ; <<4 x float>> [#uses=1]
         %t3 = select i1 false, <4 x float> %t0, <4 x float> %t2         ; <<4 x float>> [#uses=1]
         store <4 x float> %t3, <4 x float>* @bar
         ret void
diff --git a/test/Other/2004-08-20-PackedControlFlow.ll b/test/Other/2004-08-20-PackedControlFlow.ll
index 49aa606..3943570 100644
--- a/test/Other/2004-08-20-PackedControlFlow.ll
+++ b/test/Other/2004-08-20-PackedControlFlow.ll
@@ -12,7 +12,7 @@
         ret void
 
 B:              ; preds = %A
-        %t2 = add %v4f %t0, %t0         ; <%v4f> [#uses=1]
+        %t2 = fadd %v4f %t0, %t0         ; <%v4f> [#uses=1]
         br label %C
 
 A:              ; preds = %0
diff --git a/test/Transforms/ConstProp/calls.ll b/test/Transforms/ConstProp/calls.ll
index 126db4c..c573e56 100644
--- a/test/Transforms/ConstProp/calls.ll
+++ b/test/Transforms/ConstProp/calls.ll
@@ -13,11 +13,11 @@
 define double @T() {
         %A = call double @cos( double 0.000000e+00 )            ; <double> [#uses=1]
         %B = call double @sin( double 0.000000e+00 )            ; <double> [#uses=1]
-        %a = add double %A, %B          ; <double> [#uses=1]
+        %a = fadd double %A, %B          ; <double> [#uses=1]
         %C = call double @tan( double 0.000000e+00 )            ; <double> [#uses=1]
-        %b = add double %a, %C          ; <double> [#uses=1]
+        %b = fadd double %a, %C          ; <double> [#uses=1]
         %D = call double @sqrt( double 4.000000e+00 )           ; <double> [#uses=1]
-        %c = add double %b, %D          ; <double> [#uses=1]
+        %c = fadd double %b, %D          ; <double> [#uses=1]
         ret double %c
 }
 
diff --git a/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll b/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll
index 50dcf32..3b3f8ad 100644
--- a/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll
+++ b/test/Transforms/DeadStoreElimination/2006-06-27-AST-Remove.ll
@@ -601,7 +601,7 @@
 	%tmp21362 = icmp eq i32 0, 0		; <i1> [#uses=2]
 	%tmp216 = sitofp i32 %pn_restart.0.ph to float		; <float> [#uses=1]
 	%tmp216.upgrd.177 = fpext float %tmp216 to double		; <double> [#uses=1]
-	%tmp217 = add double %tmp216.upgrd.177, 1.000000e+00		; <double> [#uses=1]
+	%tmp217 = fadd double %tmp216.upgrd.177, 1.000000e+00		; <double> [#uses=1]
 	%tmp835 = icmp sgt i32 %pn_restart.0.ph, 9		; <i1> [#uses=0]
 	store i32 0, i32* @nodes
 	store i32 0, i32* @qnodes
diff --git a/test/Transforms/GVNPRE/2007-06-18-ConstantInPhi.ll b/test/Transforms/GVNPRE/2007-06-18-ConstantInPhi.ll
index b4cb517..180105a 100644
--- a/test/Transforms/GVNPRE/2007-06-18-ConstantInPhi.ll
+++ b/test/Transforms/GVNPRE/2007-06-18-ConstantInPhi.ll
@@ -10,8 +10,8 @@
 bb34:		; preds = %bb34, %bb.nph
 	%p.1 = phi float [ 0x3FE6A09E60000000, %bb.nph ], [ %tmp48, %bb34 ]		; <float> [#uses=1]
 	%tmp44 = load float* null		; <float> [#uses=1]
-	%tmp46 = sub float %tmp44, 0.000000e+00		; <float> [#uses=1]
-	%tmp48 = mul float %tmp46, %p.1		; <float> [#uses=1]
+	%tmp46 = fsub float %tmp44, 0.000000e+00		; <float> [#uses=1]
+	%tmp48 = fmul float %tmp46, %p.1		; <float> [#uses=1]
 	br i1 false, label %bb57, label %bb34
 
 bb57:		; preds = %bb34
diff --git a/test/Transforms/GlobalOpt/2008-01-29-VolatileGlobal.ll b/test/Transforms/GlobalOpt/2008-01-29-VolatileGlobal.ll
index 0a8dd49..779e7fb 100644
--- a/test/Transforms/GlobalOpt/2008-01-29-VolatileGlobal.ll
+++ b/test/Transforms/GlobalOpt/2008-01-29-VolatileGlobal.ll
@@ -4,6 +4,6 @@
 define double @foo() nounwind  {
 entry:
 	%tmp1 = volatile load double* @t0.1441, align 8		; <double> [#uses=2]
-	%tmp4 = mul double %tmp1, %tmp1		; <double> [#uses=1]
+	%tmp4 = fmul double %tmp1, %tmp1		; <double> [#uses=1]
 	ret double %tmp4
 }
diff --git a/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll b/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll
index 3464be9..8a0b5b3 100644
--- a/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll
+++ b/test/Transforms/GlobalOpt/2008-04-26-SROA-Global-Align.ll
@@ -26,7 +26,7 @@
   %V1 = load double* getelementptr (%T* @G, i32 0, i32 0), align 16
   %V2 = load double* getelementptr (%T* @G, i32 0, i32 1), align 8
   %V3 = load double* getelementptr (%T* @G, i32 0, i32 2), align 16
-  %R = add double %V1, %V2
-  %R2 = add double %R, %V3
+  %R = fadd double %V1, %V2
+  %R2 = fadd double %R, %V3
   ret double %R2
 }
diff --git a/test/Transforms/GlobalOpt/constantexpr-dangle.ll b/test/Transforms/GlobalOpt/constantexpr-dangle.ll
index 6e33ae0..6fa139b 100644
--- a/test/Transforms/GlobalOpt/constantexpr-dangle.ll
+++ b/test/Transforms/GlobalOpt/constantexpr-dangle.ll
@@ -7,7 +7,7 @@
 
 define float @bar() {
         %tmp1 = call float (...)* bitcast (float ()* @foo to float (...)*)( )
-        %tmp2 = mul float %tmp1, 1.000000e+01           ; <float> [#uses=1]
+        %tmp2 = fmul float %tmp1, 1.000000e+01           ; <float> [#uses=1]
         ret float %tmp2
 }
 
diff --git a/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll b/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll
index 903e81d..b2f8258 100644
--- a/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll
+++ b/test/Transforms/IndVarSimplify/2006-12-10-BitCast.ll
@@ -18,7 +18,7 @@
 cond_next182.i:		; preds = %cond_next182.i, %cond_true52
 	%decay.i.0 = phi i32 [ %tmp195.i.upgrd.1, %cond_next182.i ], [ %tmp152.i, %cond_true52 ]		; <i32> [#uses=1]
 	%tmp194.i53 = bitcast i32 %decay.i.0 to float		; <float> [#uses=1]
-	%tmp195.i = sub float %tmp194.i53, 8.000000e+00		; <float> [#uses=1]
+	%tmp195.i = fsub float %tmp194.i53, 8.000000e+00		; <float> [#uses=1]
 	%tmp195.i.upgrd.1 = bitcast float %tmp195.i to i32		; <i32> [#uses=1]
 	br i1 false, label %cond_next182.i, label %bb418.i.preheader
 
diff --git a/test/Transforms/IndVarSimplify/2008-11-03-Floating.ll b/test/Transforms/IndVarSimplify/2008-11-03-Floating.ll
index 6fc065f..be8b36f 100644
--- a/test/Transforms/IndVarSimplify/2008-11-03-Floating.ll
+++ b/test/Transforms/IndVarSimplify/2008-11-03-Floating.ll
@@ -6,7 +6,7 @@
 bb:		; preds = %bb, %entry
 	%x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]		; <double> [#uses=2]
 	%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind		; <i32> [#uses=0]
-	%1 = add double %x.0.reg2mem.0, 1.000000e+00		; <double> [#uses=2]
+	%1 = fadd double %x.0.reg2mem.0, 1.000000e+00		; <double> [#uses=2]
 	%2 = fcmp olt double %1, 1.000000e+04		; <i1> [#uses=1]
 	br i1 %2, label %bb, label %return
 
@@ -23,7 +23,7 @@
 bb:		; preds = %bb, %entry
 	%x.0.reg2mem.0 = phi double [ -10.000000e+00, %entry ], [ %1, %bb ]		; <double> [#uses=2]
 	%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind		; <i32> [#uses=0]
-	%1 = add double %x.0.reg2mem.0, 2.000000e+00		; <double> [#uses=2]
+	%1 = fadd double %x.0.reg2mem.0, 2.000000e+00		; <double> [#uses=2]
 	%2 = fcmp olt double %1, -1.000000e+00		; <i1> [#uses=1]
 	br i1 %2, label %bb, label %return
 
@@ -39,7 +39,7 @@
 bb:		; preds = %bb, %entry
 	%x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]		; <double> [#uses=2]
 	%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind		; <i32> [#uses=0]
-	%1 = add double %x.0.reg2mem.0, 1.000000e+00		; <double> [#uses=2]
+	%1 = fadd double %x.0.reg2mem.0, 1.000000e+00		; <double> [#uses=2]
 	%2 = fcmp olt double %1, -1.000000e+00		; <i1> [#uses=1]
 	br i1 %2, label %bb, label %return
 
@@ -54,7 +54,7 @@
 bb:		; preds = %bb, %entry
 	%x.0.reg2mem.0 = phi double [ 40.000000e+00, %entry ], [ %1, %bb ]		; <double> [#uses=2]
 	%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind		; <i32> [#uses=0]
-	%1 = add double %x.0.reg2mem.0, -1.000000e+00		; <double> [#uses=2]
+	%1 = fadd double %x.0.reg2mem.0, -1.000000e+00		; <double> [#uses=2]
 	%2 = fcmp olt double %1, 1.000000e+00		; <i1> [#uses=1]
 	br i1 %2, label %bb, label %return
 
diff --git a/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll b/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll
index faf1da3..c947d3b 100644
--- a/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll
+++ b/test/Transforms/IndVarSimplify/2008-11-17-Floating.ll
@@ -9,7 +9,7 @@
 bb:		; preds = %bb, %entry
 	%x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]		; <double> [#uses=2]
 	%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind		; <i32> [#uses=0]
-	%1 = add double %x.0.reg2mem.0, 1.0e+0		; <double> [#uses=2]
+	%1 = fadd double %x.0.reg2mem.0, 1.0e+0		; <double> [#uses=2]
 	%2 = fcmp olt double %1, 2147483646.0e+0		; <i1> [#uses=1]
 	br i1 %2, label %bb, label %return
 
@@ -24,7 +24,7 @@
 bb:		; preds = %bb, %entry
 	%x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]		; <double> [#uses=2]
 	%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind		; <i32> [#uses=0]
-	%1 = add double %x.0.reg2mem.0, 1.0e+0		; <double> [#uses=2]
+	%1 = fadd double %x.0.reg2mem.0, 1.0e+0		; <double> [#uses=2]
 	%2 = fcmp olt double %1, 2147483647.0e+0		; <i1> [#uses=1]
 	br i1 %2, label %bb, label %return
 
diff --git a/test/Transforms/IndVarSimplify/2008-11-25-APFloatAssert.ll b/test/Transforms/IndVarSimplify/2008-11-25-APFloatAssert.ll
index 9fd0eb9..e611b1f 100644
--- a/test/Transforms/IndVarSimplify/2008-11-25-APFloatAssert.ll
+++ b/test/Transforms/IndVarSimplify/2008-11-25-APFloatAssert.ll
@@ -6,6 +6,6 @@
 
 bb23.i91:		; preds = %bb23.i91, %entry
 	%result.0.i89 = phi ppc_fp128 [ 0xM00000000000000000000000000000000, %entry ], [ %0, %bb23.i91 ]		; <ppc_fp128> [#uses=2]
-	%0 = mul ppc_fp128 %result.0.i89, %result.0.i89		; <ppc_fp128> [#uses=1]
+	%0 = fmul ppc_fp128 %result.0.i89, %result.0.i89		; <ppc_fp128> [#uses=1]
 	br label %bb23.i91
 }
diff --git a/test/Transforms/IndVarSimplify/2009-04-27-Floating.ll b/test/Transforms/IndVarSimplify/2009-04-27-Floating.ll
index 700f294..e70d577 100644
--- a/test/Transforms/IndVarSimplify/2009-04-27-Floating.ll
+++ b/test/Transforms/IndVarSimplify/2009-04-27-Floating.ll
@@ -9,7 +9,7 @@
 loop_body:              
         %i = phi float [ %nexti, %loop_body ], [ 0.0, %entry ]          
         tail call void @foo()
-        %nexti = add float %i, 1.0              
+        %nexti = fadd float %i, 1.0
         %less = fcmp olt float %nexti, 2.0              
         br i1 %less, label %loop_body, label %done
 
diff --git a/test/Transforms/IndVarSimplify/iv-zext.ll b/test/Transforms/IndVarSimplify/iv-zext.ll
index 76d48de..d7eb7bd 100644
--- a/test/Transforms/IndVarSimplify/iv-zext.ll
+++ b/test/Transforms/IndVarSimplify/iv-zext.ll
@@ -13,16 +13,16 @@
 	%indvar.i8 = and i64 %indvar, 255
 	%t0 = getelementptr double* %d, i64 %indvar.i8
 	%t1 = load double* %t0
-	%t2 = mul double %t1, 0.1
+	%t2 = fmul double %t1, 0.1
 	store double %t2, double* %t0
 	%indvar.i24 = and i64 %indvar, 16777215
 	%t3 = getelementptr double* %d, i64 %indvar.i24
 	%t4 = load double* %t3
-	%t5 = mul double %t4, 2.3
+	%t5 = fmul double %t4, 2.3
 	store double %t5, double* %t3
 	%t6 = getelementptr double* %d, i64 %indvar
 	%t7 = load double* %t6
-	%t8 = mul double %t7, 4.5
+	%t8 = fmul double %t7, 4.5
 	store double %t8, double* %t6
 	%indvar.next = add i64 %indvar, 1
 	%exitcond = icmp eq i64 %indvar.next, 10
diff --git a/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll b/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll
index 5ad0af4..c7cf0dd 100644
--- a/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll
+++ b/test/Transforms/InstCombine/2006-10-26-VectorReassoc.ll
@@ -2,8 +2,8 @@
 ; RUN:   grep mul | count 2
 
 define <4 x float> @test(<4 x float> %V) {
-        %Y = mul <4 x float> %V, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >                ; <<4 x float>> [#uses=1]
-        %Z = mul <4 x float> %Y, < float 1.000000e+00, float 2.000000e+05, float -3.000000e+00, float 4.000000e+00 >               ; <<4 x float>> [#uses=1]
+        %Y = fmul <4 x float> %V, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >                ; <<4 x float>> [#uses=1]
+        %Z = fmul <4 x float> %Y, < float 1.000000e+00, float 2.000000e+05, float -3.000000e+00, float 4.000000e+00 >               ; <<4 x float>> [#uses=1]
         ret <4 x float> %Z
 }
 
diff --git a/test/Transforms/InstCombine/2006-12-01-BadFPVectorXform.ll b/test/Transforms/InstCombine/2006-12-01-BadFPVectorXform.ll
index 60ee503..eaf10a3 100644
--- a/test/Transforms/InstCombine/2006-12-01-BadFPVectorXform.ll
+++ b/test/Transforms/InstCombine/2006-12-01-BadFPVectorXform.ll
@@ -3,7 +3,7 @@
 
 define <4 x float> @test(<4 x float> %tmp26, <4 x float> %tmp53) {
         ; (X+Y)-Y != X for fp vectors.
-        %tmp64 = add <4 x float> %tmp26, %tmp53         ; <<4 x float>> [#uses=1]
-        %tmp75 = sub <4 x float> %tmp64, %tmp53         ; <<4 x float>> [#uses=1]
+        %tmp64 = fadd <4 x float> %tmp26, %tmp53         ; <<4 x float>> [#uses=1]
+        %tmp75 = fsub <4 x float> %tmp64, %tmp53         ; <<4 x float>> [#uses=1]
         ret <4 x float> %tmp75
 }
diff --git a/test/Transforms/InstCombine/2008-07-16-fsub.ll b/test/Transforms/InstCombine/2008-07-16-fsub.ll
index 1d0554d..ca4174d 100644
--- a/test/Transforms/InstCombine/2008-07-16-fsub.ll
+++ b/test/Transforms/InstCombine/2008-07-16-fsub.ll
@@ -3,6 +3,6 @@
 
 define double @test(double %X) nounwind {
 	; fsub of self can't be optimized away.
-	%Y = sub double %X, %X
+	%Y = fsub double %X, %X
 	ret double %Y
 }
diff --git a/test/Transforms/InstCombine/add-sitofp.ll b/test/Transforms/InstCombine/add-sitofp.ll
index 35c6567..298b9a1 100644
--- a/test/Transforms/InstCombine/add-sitofp.ll
+++ b/test/Transforms/InstCombine/add-sitofp.ll
@@ -4,6 +4,6 @@
   %m = lshr i32 %a, 24
   %n = and i32 %m, %b
   %o = sitofp i32 %n to double
-  %p = add double %o, 1.0
+  %p = fadd double %o, 1.0
   ret double %p
 }
diff --git a/test/Transforms/InstCombine/dce-iterate.ll b/test/Transforms/InstCombine/dce-iterate.ll
index e222970..faefa8a 100644
--- a/test/Transforms/InstCombine/dce-iterate.ll
+++ b/test/Transforms/InstCombine/dce-iterate.ll
@@ -18,7 +18,7 @@
         %c = lshr i960 %sz101112.ins, 320               ; <i960> [#uses=1]
         %d = trunc i960 %c to i64               ; <i64> [#uses=1]
         %e = bitcast i64 %d to double           ; <double> [#uses=1]
-        %f = add double %b, %e
+        %f = fadd double %b, %e
 
         ret double %e
 }
diff --git a/test/Transforms/InstCombine/fpextend.ll b/test/Transforms/InstCombine/fpextend.ll
index 5971080..c212128 100644
--- a/test/Transforms/InstCombine/fpextend.ll
+++ b/test/Transforms/InstCombine/fpextend.ll
@@ -6,7 +6,7 @@
 entry:
 	%tmp = load float* @X, align 4		; <float> [#uses=1]
 	%tmp1 = fpext float %tmp to double		; <double> [#uses=1]
-	%tmp3 = add double %tmp1, 0.000000e+00		; <double> [#uses=1]
+	%tmp3 = fadd double %tmp1, 0.000000e+00		; <double> [#uses=1]
 	%tmp34 = fptrunc double %tmp3 to float		; <float> [#uses=1]
 	store float %tmp34, float* @X, align 4
 	ret void
@@ -28,7 +28,7 @@
 entry:
 	%tmp = load float* @X, align 4		; <float> [#uses=1]
 	%tmp1 = fpext float %tmp to double		; <double> [#uses=1]
-	%tmp2 = sub double -0.000000e+00, %tmp1		; <double> [#uses=1]
+	%tmp2 = fsub double -0.000000e+00, %tmp1		; <double> [#uses=1]
 	%tmp34 = fptrunc double %tmp2 to float		; <float> [#uses=1]
 	store float %tmp34, float* @X, align 4
 	ret void
diff --git a/test/Transforms/InstCombine/mul.ll b/test/Transforms/InstCombine/mul.ll
index 0455a3f..9b5f7a5 100644
--- a/test/Transforms/InstCombine/mul.ll
+++ b/test/Transforms/InstCombine/mul.ll
@@ -20,7 +20,7 @@
 
 define double @test4(double %A) {
         ; This is safe for FP
-        %B = mul double 1.000000e+00, %A                ; <double> [#uses=1]
+        %B = fmul double 1.000000e+00, %A                ; <double> [#uses=1]
         ret double %B
 }
 
@@ -79,7 +79,7 @@
 ; PR2642
 define internal void @test13(<4 x float>*) {
 	load <4 x float>* %0, align 1
-	mul <4 x float> %2, < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >
+	fmul <4 x float> %2, < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >
 	store <4 x float> %3, <4 x float>* %0, align 1
 	ret void
 }
diff --git a/test/Transforms/InstCombine/multi-use-or.ll b/test/Transforms/InstCombine/multi-use-or.ll
index 85a8b34..4804967 100644
--- a/test/Transforms/InstCombine/multi-use-or.ll
+++ b/test/Transforms/InstCombine/multi-use-or.ll
@@ -17,7 +17,7 @@
         %c = lshr i192 %sy222324.ins, 128               ; <i192> [#uses=1]
         %d = trunc i192 %c to i64               ; <i64> [#uses=1]
         %e = bitcast i64 %d to double           ; <double> [#uses=1]
-        %f = add double %b, %e
+        %f = fadd double %b, %e
 
 ;        ret double %e
         ret double %f
diff --git a/test/Transforms/InstCombine/shufflemask-undef.ll b/test/Transforms/InstCombine/shufflemask-undef.ll
index 2438417..a9e8d34 100644
--- a/test/Transforms/InstCombine/shufflemask-undef.ll
+++ b/test/Transforms/InstCombine/shufflemask-undef.ll
@@ -75,16 +75,16 @@
 	shufflevector <4 x float> %2, <4 x float> undef, <4 x i32> < i32 0, i32 4, i32 1, i32 5 >		; <<4 x float>>:3 [#uses=1]
 	shufflevector <4 x float> undef, <4 x float> undef, <4 x i32> < i32 0, i32 4, i32 1, i32 5 >		; <<4 x float>>:4 [#uses=1]
 	shufflevector <4 x float> %4, <4 x float> %3, <4 x i32> < i32 6, i32 7, i32 2, i32 3 >		; <<4 x float>>:5 [#uses=1]
-	mul <4 x float> %5, zeroinitializer		; <<4 x float>>:6 [#uses=2]
-	mul <4 x float> %6, %6		; <<4 x float>>:7 [#uses=1]
-	add <4 x float> zeroinitializer, %7		; <<4 x float>>:8 [#uses=1]
+	fmul <4 x float> %5, zeroinitializer		; <<4 x float>>:6 [#uses=2]
+	fmul <4 x float> %6, %6		; <<4 x float>>:7 [#uses=1]
+	fadd <4 x float> zeroinitializer, %7		; <<4 x float>>:8 [#uses=1]
 	call <4 x float> @llvm.x86.sse.max.ps( <4 x float> zeroinitializer, <4 x float> %8 ) nounwind readnone		; <<4 x float>>:9 [#uses=1]
 	%phitmp40 = bitcast <4 x float> %9 to <4 x i32>		; <<4 x i32>> [#uses=1]
 	%tmp4109.i = and <4 x i32> %phitmp40, < i32 8388607, i32 8388607, i32 8388607, i32 8388607 >		; <<4 x i32>> [#uses=1]
 	%tmp4116.i = or <4 x i32> %tmp4109.i, < i32 1065353216, i32 1065353216, i32 1065353216, i32 1065353216 >		; <<4 x i32>> [#uses=1]
 	%tmp4117.i = bitcast <4 x i32> %tmp4116.i to <4 x float>		; <<4 x float>> [#uses=1]
-	add <4 x float> %tmp4117.i, zeroinitializer		; <<4 x float>>:10 [#uses=1]
-	mul <4 x float> %10, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 >		; <<4 x float>>:11 [#uses=1]
+	fadd <4 x float> %tmp4117.i, zeroinitializer		; <<4 x float>>:10 [#uses=1]
+	fmul <4 x float> %10, < float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01 >		; <<4 x float>>:11 [#uses=1]
 	call <4 x float> @llvm.x86.sse.max.ps( <4 x float> %11, <4 x float> zeroinitializer ) nounwind readnone		; <<4 x float>>:12 [#uses=1]
 	call <4 x float> @llvm.x86.sse.min.ps( <4 x float> %12, <4 x float> zeroinitializer ) nounwind readnone		; <<4 x float>>:13 [#uses=1]
 	%tmp4170.i = call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %13, <4 x float> zeroinitializer, i8 2 ) nounwind		; <<4 x float>> [#uses=1]
diff --git a/test/Transforms/InstCombine/signed-comparison.ll b/test/Transforms/InstCombine/signed-comparison.ll
index fdf150f..86e07ec7 100644
--- a/test/Transforms/InstCombine/signed-comparison.ll
+++ b/test/Transforms/InstCombine/signed-comparison.ll
@@ -14,7 +14,7 @@
 	%t0 = and i64 %indvar, 65535
 	%t1 = getelementptr double* %p, i64 %t0
 	%t2 = load double* %t1, align 8
-	%t3 = mul double %t2, 2.2
+	%t3 = fmul double %t2, 2.2
 	store double %t3, double* %t1, align 8
 	%i.04 = trunc i64 %indvar to i16
 	%t4 = add i16 %i.04, 1
diff --git a/test/Transforms/InstCombine/sitofp.ll b/test/Transforms/InstCombine/sitofp.ll
index c26c351..2bf7385 100644
--- a/test/Transforms/InstCombine/sitofp.ll
+++ b/test/Transforms/InstCombine/sitofp.ll
@@ -36,7 +36,7 @@
 	%C = and i32 %A, 32		; <i32> [#uses=1]
 	%D = sitofp i32 %B to double		; <double> [#uses=1]
 	%E = sitofp i32 %C to double		; <double> [#uses=1]
-	%F = add double %D, %E		; <double> [#uses=1]
+	%F = fadd double %D, %E		; <double> [#uses=1]
 	%G = fptosi double %F to i32		; <i32> [#uses=1]
 	ret i32 %G
 }
diff --git a/test/Transforms/InstCombine/vec_demanded_elts.ll b/test/Transforms/InstCombine/vec_demanded_elts.ll
index 03e070f..95df8c6 100644
--- a/test/Transforms/InstCombine/vec_demanded_elts.ll
+++ b/test/Transforms/InstCombine/vec_demanded_elts.ll
@@ -1,7 +1,7 @@
 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
-; RUN:   grep {sub float}
+; RUN:   grep {fadd float}
 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
-; RUN:   grep {mul float}
+; RUN:   grep {fmul float}
 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
 ; RUN:   not grep {insertelement.*0.00}
 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
@@ -26,7 +26,7 @@
 }
 
 define i32 @test2(float %f) {
-        %tmp5 = mul float %f, %f
+        %tmp5 = fmul float %f, %f
         %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0             
         %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1    
         %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2  
diff --git a/test/Transforms/InstCombine/vec_narrow.ll b/test/Transforms/InstCombine/vec_narrow.ll
index 9063148..e444c2a 100644
--- a/test/Transforms/InstCombine/vec_narrow.ll
+++ b/test/Transforms/InstCombine/vec_narrow.ll
@@ -5,7 +5,7 @@
 
 define float @test(%V %A, %V %B, float %f) {
         %C = insertelement %V %A, float %f, i32 0               ; <%V> [#uses=1]
-        %D = add %V %C, %B              ; <%V> [#uses=1]
+        %D = fadd %V %C, %B              ; <%V> [#uses=1]
         %E = extractelement %V %D, i32 0                ; <float> [#uses=1]
         ret float %E
 }
diff --git a/test/Transforms/InstCombine/zero-point-zero-add.ll b/test/Transforms/InstCombine/zero-point-zero-add.ll
index bae60d9..adb28e4 100644
--- a/test/Transforms/InstCombine/zero-point-zero-add.ll
+++ b/test/Transforms/InstCombine/zero-point-zero-add.ll
@@ -3,13 +3,13 @@
 declare double @abs(double)
 
 define double @test(double %X) {
-  %Y = add double %X, 0.0          ;; Should be a single add x, 0.0
-  %Z = add double %Y, 0.0
+  %Y = fadd double %X, 0.0          ;; Should be a single add x, 0.0
+  %Z = fadd double %Y, 0.0
   ret double %Z
 }
 
 define double @test1(double %X) {
   %Y = call double @abs(double %X)
-  %Z = add double %Y, 0.0
+  %Z = fadd double %Y, 0.0
   ret double %Z
 }
diff --git a/test/Transforms/LCSSA/2007-07-12-LICM-2.ll b/test/Transforms/LCSSA/2007-07-12-LICM-2.ll
index 58bb19d..e8dc391 100644
--- a/test/Transforms/LCSSA/2007-07-12-LICM-2.ll
+++ b/test/Transforms/LCSSA/2007-07-12-LICM-2.ll
@@ -5,10 +5,10 @@
 
 bb7:		; preds = %bb7, %entry
 	%tmp39 = load <4 x float>* null		; <<4 x float>> [#uses=1]
-	%tmp40 = add <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 >		; <<4 x float>> [#uses=1]
-	%tmp43 = add <4 x float> %tmp40, < float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 2.000000e+00 >		; <<4 x float>> [#uses=1]
-	%tmp46 = add <4 x float> %tmp43, < float 3.000000e+00, float 0.000000e+00, float 2.000000e+00, float 4.000000e+00 >		; <<4 x float>> [#uses=1]
-	%tmp49 = add <4 x float> %tmp46, < float 0.000000e+00, float 4.000000e+00, float 6.000000e+00, float 1.000000e+00 >		; <<4 x float>> [#uses=1]
+	%tmp40 = fadd <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 >		; <<4 x float>> [#uses=1]
+	%tmp43 = fadd <4 x float> %tmp40, < float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 2.000000e+00 >		; <<4 x float>> [#uses=1]
+	%tmp46 = fadd <4 x float> %tmp43, < float 3.000000e+00, float 0.000000e+00, float 2.000000e+00, float 4.000000e+00 >		; <<4 x float>> [#uses=1]
+	%tmp49 = fadd <4 x float> %tmp46, < float 0.000000e+00, float 4.000000e+00, float 6.000000e+00, float 1.000000e+00 >		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp49, <4 x float>* null
 	br i1 false, label %bb7, label %bb56
 
diff --git a/test/Transforms/LCSSA/2007-07-12-LICM-3.ll b/test/Transforms/LCSSA/2007-07-12-LICM-3.ll
index 79370ee..72cebed 100644
--- a/test/Transforms/LCSSA/2007-07-12-LICM-3.ll
+++ b/test/Transforms/LCSSA/2007-07-12-LICM-3.ll
@@ -9,10 +9,10 @@
 
 bb7:            ; preds = %bb7, %bb
         %tmp39 = load <4 x float>* null         ; <<4 x float>> [#uses=1]
-        %tmp40 = add <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 >             ; <<4 x float>> [#uses=1]
-        %tmp43 = add <4 x float> %tmp40, < float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 2.000000e+00 >             ; <<4 x float>> [#uses=1]
-        %tmp46 = add <4 x float> %tmp43, < float 3.000000e+00, float 0.000000e+00, float 2.000000e+00, float 4.000000e+00 >             ; <<4 x float>> [#uses=1]
-        %tmp49 = add <4 x float> %tmp46, < float 0.000000e+00, float 4.000000e+00, float 6.000000e+00, float 1.000000e+00 >             ; <<4 x float>> [#uses=1]
+        %tmp40 = fadd <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 >             ; <<4 x float>> [#uses=1]
+        %tmp43 = fadd <4 x float> %tmp40, < float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 2.000000e+00 >             ; <<4 x float>> [#uses=1]
+        %tmp46 = fadd <4 x float> %tmp43, < float 3.000000e+00, float 0.000000e+00, float 2.000000e+00, float 4.000000e+00 >             ; <<4 x float>> [#uses=1]
+        %tmp49 = fadd <4 x float> %tmp46, < float 0.000000e+00, float 4.000000e+00, float 6.000000e+00, float 1.000000e+00 >             ; <<4 x float>> [#uses=1]
         store <4 x float> %tmp49, <4 x float>* null
         br i1 false, label %bb7, label %bb56
 
diff --git a/test/Transforms/LCSSA/2007-07-12-LICM.ll b/test/Transforms/LCSSA/2007-07-12-LICM.ll
index 1c9830e..0c433c3 100644
--- a/test/Transforms/LCSSA/2007-07-12-LICM.ll
+++ b/test/Transforms/LCSSA/2007-07-12-LICM.ll
@@ -5,7 +5,7 @@
 
 bb7:		; preds = %bb7, %entry
 	%tmp39 = load <4 x float>* null		; <<4 x float>> [#uses=1]
-	%tmp40 = add <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 >		; <<4 x float>> [#uses=0]
+	%tmp40 = fadd <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 >		; <<4 x float>> [#uses=0]
 	store <4 x float> zeroinitializer, <4 x float>* null
 	br i1 false, label %bb7, label %bb56
 
diff --git a/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll b/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll
index ec29847..928fd95 100644
--- a/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll
+++ b/test/Transforms/LoopIndexSplit/2007-09-24-UpdateIterationSpace.ll
@@ -8,7 +8,7 @@
 
 bb.preheader:		; preds = %entry
 	%tmp3031 = fpext float %contribution to double		; <double> [#uses=1]
-	%tmp32 = mul double %tmp3031, 5.000000e-01		; <double> [#uses=1]
+	%tmp32 = fmul double %tmp3031, 5.000000e-01		; <double> [#uses=1]
 	%tmp3839 = fpext float %sigmal to double		; <double> [#uses=1]
 	br label %bb
 
@@ -22,19 +22,19 @@
 cond_true9:		; preds = %bb
 	%tmp12 = getelementptr float* %x, i32 %i.01.0		; <float*> [#uses=1]
 	%tmp13 = load float* %tmp12, align 4		; <float> [#uses=1]
-	%tmp15 = sub float %xcen, %tmp13		; <float> [#uses=1]
+	%tmp15 = fsub float %xcen, %tmp13		; <float> [#uses=1]
 	%tmp16 = tail call float @fabsf( float %tmp15 )		; <float> [#uses=1]
 	%tmp18 = fdiv float %tmp16, %sigmal		; <float> [#uses=1]
 	%tmp21 = load float** %y, align 4		; <float*> [#uses=2]
 	%tmp27 = getelementptr float* %tmp21, i32 %i.01.0		; <float*> [#uses=1]
 	%tmp28 = load float* %tmp27, align 4		; <float> [#uses=1]
 	%tmp2829 = fpext float %tmp28 to double		; <double> [#uses=1]
-	%tmp34 = sub float -0.000000e+00, %tmp18		; <float> [#uses=1]
+	%tmp34 = fsub float -0.000000e+00, %tmp18		; <float> [#uses=1]
 	%tmp3435 = fpext float %tmp34 to double		; <double> [#uses=1]
 	%tmp36 = tail call double @exp( double %tmp3435 )		; <double> [#uses=1]
-	%tmp37 = mul double %tmp32, %tmp36		; <double> [#uses=1]
+	%tmp37 = fmul double %tmp32, %tmp36		; <double> [#uses=1]
 	%tmp40 = fdiv double %tmp37, %tmp3839		; <double> [#uses=1]
-	%tmp41 = add double %tmp2829, %tmp40		; <double> [#uses=1]
+	%tmp41 = fadd double %tmp2829, %tmp40		; <double> [#uses=1]
 	%tmp4142 = fptrunc double %tmp41 to float		; <float> [#uses=1]
 	%tmp44 = getelementptr float* %tmp21, i32 %i.01.0		; <float*> [#uses=1]
 	store float %tmp4142, float* %tmp44, align 4
diff --git a/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll b/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll
index 7d93785..6619c7d 100644
--- a/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll
+++ b/test/Transforms/LoopIndexSplit/2007-09-25-UpdateIterationSpace-2.ll
@@ -9,7 +9,7 @@
 
 bb.preheader:		; preds = %entry
 	%tmp3031 = fpext float %contribution to double		; <double> [#uses=1]
-	%tmp32 = mul double %tmp3031, 5.000000e-01		; <double> [#uses=1]
+	%tmp32 = fmul double %tmp3031, 5.000000e-01		; <double> [#uses=1]
 	%tmp3839 = fpext float %sigmal to double		; <double> [#uses=1]
 	br label %bb
 
@@ -24,19 +24,19 @@
 cond_true9:		; preds = %bb
 	%tmp12 = getelementptr float* %x, i32 %i.01.0		; <float*> [#uses=1]
 	%tmp13 = load float* %tmp12, align 4		; <float> [#uses=1]
-	%tmp15 = sub float %xcen, %tmp13		; <float> [#uses=1]
+	%tmp15 = fsub float %xcen, %tmp13		; <float> [#uses=1]
 	%tmp16 = tail call float @fabsf(float %tmp15)		; <float> [#uses=1]
 	%tmp18 = fdiv float %tmp16, %sigmal		; <float> [#uses=1]
 	%tmp21 = load float** %y, align 4		; <float*> [#uses=2]
 	%tmp27 = getelementptr float* %tmp21, i32 %k.06.0		; <float*> [#uses=1]
 	%tmp28 = load float* %tmp27, align 4		; <float> [#uses=1]
 	%tmp2829 = fpext float %tmp28 to double		; <double> [#uses=1]
-	%tmp34 = sub float -0.000000e+00, %tmp18		; <float> [#uses=1]
+	%tmp34 = fsub float -0.000000e+00, %tmp18		; <float> [#uses=1]
 	%tmp3435 = fpext float %tmp34 to double		; <double> [#uses=1]
 	%tmp36 = tail call double @exp(double %tmp3435)		; <double> [#uses=1]
-	%tmp37 = mul double %tmp32, %tmp36		; <double> [#uses=1]
+	%tmp37 = fmul double %tmp32, %tmp36		; <double> [#uses=1]
 	%tmp40 = fdiv double %tmp37, %tmp3839		; <double> [#uses=1]
-	%tmp41 = add double %tmp2829, %tmp40		; <double> [#uses=1]
+	%tmp41 = fadd double %tmp2829, %tmp40		; <double> [#uses=1]
 	%tmp4142 = fptrunc double %tmp41 to float		; <float> [#uses=1]
 	%tmp44 = getelementptr float* %tmp21, i32 %k.06.0		; <float*> [#uses=1]
 	store float %tmp4142, float* %tmp44, align 4
diff --git a/test/Transforms/Mem2Reg/PromoteMemToRegister.ll b/test/Transforms/Mem2Reg/PromoteMemToRegister.ll
index fdc33fb..63b8c78 100644
--- a/test/Transforms/Mem2Reg/PromoteMemToRegister.ll
+++ b/test/Transforms/Mem2Reg/PromoteMemToRegister.ll
@@ -12,7 +12,7 @@
 	%t3 = load i32* %I		; <i32> [#uses=1]
 	%t4 = sitofp i32 %t3 to double		; <double> [#uses=1]
 	%t5 = load double* %J		; <double> [#uses=1]
-	%t6 = mul double %t4, %t5		; <double> [#uses=1]
+	%t6 = fmul double %t4, %t5		; <double> [#uses=1]
 	ret double %t6
 }
 
diff --git a/test/Transforms/MemCpyOpt/memcpy.ll b/test/Transforms/MemCpyOpt/memcpy.ll
index c5cdc29..94daee0 100644
--- a/test/Transforms/MemCpyOpt/memcpy.ll
+++ b/test/Transforms/MemCpyOpt/memcpy.ll
@@ -7,7 +7,7 @@
 entry:
 	%tmp2 = alloca { x86_fp80, x86_fp80 }		; <{ x86_fp80, x86_fp80 }*> [#uses=1]
 	%memtmp = alloca { x86_fp80, x86_fp80 }, align 16		; <{ x86_fp80, x86_fp80 }*> [#uses=2]
-	%tmp5 = sub x86_fp80 0xK80000000000000000000, %z.1		; <x86_fp80> [#uses=1]
+	%tmp5 = fsub x86_fp80 0xK80000000000000000000, %z.1		; <x86_fp80> [#uses=1]
 	call void @ccoshl( { x86_fp80, x86_fp80 }* sret  %memtmp, x86_fp80 %tmp5, x86_fp80 %z.0 ) nounwind 
 	%tmp219 = bitcast { x86_fp80, x86_fp80 }* %tmp2 to i8*		; <i8*> [#uses=2]
 	%memtmp20 = bitcast { x86_fp80, x86_fp80 }* %memtmp to i8*		; <i8*> [#uses=1]
diff --git a/test/Transforms/MemCpyOpt/sret.ll b/test/Transforms/MemCpyOpt/sret.ll
index 1ac11aa..ad9fb1b 100644
--- a/test/Transforms/MemCpyOpt/sret.ll
+++ b/test/Transforms/MemCpyOpt/sret.ll
@@ -9,7 +9,7 @@
 	%memtmp = alloca { x86_fp80, x86_fp80 }, align 16		; <{ x86_fp80, x86_fp80 }*> [#uses=2]
 	%tmp1 = getelementptr { x86_fp80, x86_fp80 }* %z, i32 0, i32 1		; <x86_fp80*> [#uses=1]
 	%tmp2 = load x86_fp80* %tmp1, align 16		; <x86_fp80> [#uses=1]
-	%tmp3 = sub x86_fp80 0xK80000000000000000000, %tmp2		; <x86_fp80> [#uses=1]
+	%tmp3 = fsub x86_fp80 0xK80000000000000000000, %tmp2		; <x86_fp80> [#uses=1]
 	%tmp4 = getelementptr { x86_fp80, x86_fp80 }* %iz, i32 0, i32 1		; <x86_fp80*> [#uses=1]
 	%real = getelementptr { x86_fp80, x86_fp80 }* %iz, i32 0, i32 0		; <x86_fp80*> [#uses=1]
 	%tmp7 = getelementptr { x86_fp80, x86_fp80 }* %z, i32 0, i32 0		; <x86_fp80*> [#uses=1]
diff --git a/test/Transforms/PruneEH/2008-09-05-CGUpdate.ll b/test/Transforms/PruneEH/2008-09-05-CGUpdate.ll
index c3600ab..74434f4 100644
--- a/test/Transforms/PruneEH/2008-09-05-CGUpdate.ll
+++ b/test/Transforms/PruneEH/2008-09-05-CGUpdate.ll
@@ -477,12 +477,12 @@
 	unreachable
 
 bb4:		; preds = %invcont
-	%3 = mul x86_fp80 %0, 0xK40008000000000000000		; <x86_fp80> [#uses=1]
+	%3 = fmul x86_fp80 %0, 0xK40008000000000000000		; <x86_fp80> [#uses=1]
 	%4 = fcmp ult x86_fp80 %3, 0xKC0068000000000000000		; <i1> [#uses=1]
 	br i1 %4, label %bb8, label %bb6
 
 bb6:		; preds = %bb4
-	%5 = mul x86_fp80 %0, 0xK40008000000000000000		; <x86_fp80> [#uses=1]
+	%5 = fmul x86_fp80 %0, 0xK40008000000000000000		; <x86_fp80> [#uses=1]
 	%6 = fcmp ugt x86_fp80 %5, 0xK4005FE00000000000000		; <i1> [#uses=1]
 	br i1 %6, label %bb8, label %bb10
 
@@ -494,16 +494,16 @@
 	unreachable
 
 bb10:		; preds = %bb6
-	%7 = mul x86_fp80 %0, 0xK40008000000000000000		; <x86_fp80> [#uses=3]
+	%7 = fmul x86_fp80 %0, 0xK40008000000000000000		; <x86_fp80> [#uses=3]
 	%8 = fcmp ult x86_fp80 %7, 0xK00000000000000000000		; <i1> [#uses=1]
 	br i1 %8, label %bb13, label %bb12
 
 bb12:		; preds = %bb10
-	%9 = add x86_fp80 %7, 0xK3FFDFFFFFFFFFFFFFFFF		; <x86_fp80> [#uses=1]
+	%9 = fadd x86_fp80 %7, 0xK3FFDFFFFFFFFFFFFFFFF		; <x86_fp80> [#uses=1]
 	br label %bb14
 
 bb13:		; preds = %bb10
-	%10 = sub x86_fp80 %7, 0xK3FFDFFFFFFFFFFFFFFFF		; <x86_fp80> [#uses=1]
+	%10 = fsub x86_fp80 %7, 0xK3FFDFFFFFFFFFFFFFFFF		; <x86_fp80> [#uses=1]
 	br label %bb14
 
 bb14:		; preds = %bb13, %bb12
diff --git a/test/Transforms/Reassociate/2006-04-27-ReassociateVector.ll b/test/Transforms/Reassociate/2006-04-27-ReassociateVector.ll
index 05d6103..3662e09 100644
--- a/test/Transforms/Reassociate/2006-04-27-ReassociateVector.ll
+++ b/test/Transforms/Reassociate/2006-04-27-ReassociateVector.ll
@@ -1,8 +1,8 @@
 ; RUN: llvm-as < %s | opt -reassociate -disable-output
 
 define void @foo() {
-	%tmp162 = sub <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>> [#uses=1]
-	%tmp164 = mul <4 x float> zeroinitializer, %tmp162		; <<4 x float>> [#uses=0]
+	%tmp162 = fsub <4 x float> zeroinitializer, zeroinitializer		; <<4 x float>> [#uses=1]
+	%tmp164 = fmul <4 x float> zeroinitializer, %tmp162		; <<4 x float>> [#uses=0]
 	ret void
 }
 
diff --git a/test/Transforms/SCCP/2006-12-04-PackedType.ll b/test/Transforms/SCCP/2006-12-04-PackedType.ll
index b7a7880..0e268c2 100644
--- a/test/Transforms/SCCP/2006-12-04-PackedType.ll
+++ b/test/Transforms/SCCP/2006-12-04-PackedType.ll
@@ -112,7 +112,7 @@
 	%tmp.upgrd.1 = getelementptr %struct.GLDContextRec* %ctx, i32 0, i32 31, i32 14		; <i32*> [#uses=1]
 	%tmp95 = load i32* %tmp.upgrd.1		; <i32> [#uses=1]
 	%tmp95.upgrd.2 = sitofp i32 %tmp95 to float		; <float> [#uses=1]
-	%tmp108 = mul float undef, %tmp95.upgrd.2		; <float> [#uses=1]
+	%tmp108 = fmul float undef, %tmp95.upgrd.2		; <float> [#uses=1]
 	br label %cond_next116
 cond_next116:		; preds = %cond_true93, %entry
 	%point_size.2 = phi float [ %tmp108, %cond_true93 ], [ undef, %entry ]		; <float> [#uses=2]
@@ -130,7 +130,7 @@
 cond_true467:		; preds = %cond_true462
 	ret void
 cond_next484:		; preds = %cond_next116
-	%tmp486 = mul float %point_size.2, 5.000000e-01		; <float> [#uses=1]
+	%tmp486 = fmul float %point_size.2, 5.000000e-01		; <float> [#uses=1]
 	br label %cond_next487
 cond_next487:		; preds = %cond_next484, %cond_true462, %cond_true458
 	%radius.0 = phi float [ %tmp486, %cond_next484 ], [ 5.000000e-01, %cond_true458 ], [ 5.000000e-01, %cond_true462 ]		; <float> [#uses=2]
diff --git a/test/Transforms/SCCP/apint-ipsccp4.ll b/test/Transforms/SCCP/apint-ipsccp4.ll
index de355d1..a0656b7 100644
--- a/test/Transforms/SCCP/apint-ipsccp4.ll
+++ b/test/Transforms/SCCP/apint-ipsccp4.ll
@@ -35,10 +35,10 @@
   %B = fcmp oge float %A, 1.0
   br i1 %B, label %T, label %F
 T:
-  %C = add float %A, 1.0
+  %C = fadd float %A, 1.0
   br label %exit
 F:
-  %D = add float %A, 2.0
+  %D = fadd float %A, 2.0
   br label %exit
 exit:
   %E = phi float [%C, %T], [%D, %F]
diff --git a/test/Transforms/ScalarRepl/2009-03-17-CleanUp.ll b/test/Transforms/ScalarRepl/2009-03-17-CleanUp.ll
index 13055ea..facb7c1 100644
--- a/test/Transforms/ScalarRepl/2009-03-17-CleanUp.ll
+++ b/test/Transforms/ScalarRepl/2009-03-17-CleanUp.ll
@@ -1766,7 +1766,7 @@
 	call void @llvm.dbg.stoppoint(i32 75, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
 	%22 = load i32* @_ZZL13random_doublevE4seed, align 4		; <i32> [#uses=2]
 	%23 = sitofp i32 %22 to double		; <double> [#uses=1]
-	%24 = mul double %23, 0x3E340000002813D9		; <double> [#uses=1]
+	%24 = fmul double %23, 0x3E340000002813D9		; <double> [#uses=1]
 	call void @llvm.dbg.stoppoint(i32 76, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
 	%25 = xor i32 %22, 123459876		; <i32> [#uses=1]
 	store i32 %25, i32* @_ZZL13random_doublevE4seed, align 4
@@ -1803,7 +1803,7 @@
 	call void @llvm.dbg.stoppoint(i32 75, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
 	%38 = load i32* @_ZZL13random_doublevE4seed, align 4		; <i32> [#uses=2]
 	%39 = sitofp i32 %38 to double		; <double> [#uses=1]
-	%40 = mul double %39, 0x3E340000002813D9		; <double> [#uses=1]
+	%40 = fmul double %39, 0x3E340000002813D9		; <double> [#uses=1]
 	call void @llvm.dbg.stoppoint(i32 76, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*))
 	%41 = xor i32 %38, 123459876		; <i32> [#uses=1]
 	store i32 %41, i32* @_ZZL13random_doublevE4seed, align 4
@@ -2110,16 +2110,16 @@
 	%real7 = load double* %real6, align 8		; <double> [#uses=4]
 	%imag8 = getelementptr %1* %memtmp1, i32 0, i32 1		; <double*> [#uses=1]
 	%imag9 = load double* %imag8, align 8		; <double> [#uses=4]
-	%21 = mul double %real3, %real7		; <double> [#uses=1]
-	%22 = mul double %imag5, %imag9		; <double> [#uses=1]
-	%23 = add double %21, %22		; <double> [#uses=1]
-	%24 = mul double %real7, %real7		; <double> [#uses=1]
-	%25 = mul double %imag9, %imag9		; <double> [#uses=1]
-	%26 = add double %24, %25		; <double> [#uses=2]
+	%21 = fmul double %real3, %real7		; <double> [#uses=1]
+	%22 = fmul double %imag5, %imag9		; <double> [#uses=1]
+	%23 = fadd double %21, %22		; <double> [#uses=1]
+	%24 = fmul double %real7, %real7		; <double> [#uses=1]
+	%25 = fmul double %imag9, %imag9		; <double> [#uses=1]
+	%26 = fadd double %24, %25		; <double> [#uses=2]
 	%27 = fdiv double %23, %26		; <double> [#uses=1]
-	%28 = mul double %imag5, %real7		; <double> [#uses=1]
-	%29 = mul double %real3, %imag9		; <double> [#uses=1]
-	%30 = sub double %28, %29		; <double> [#uses=1]
+	%28 = fmul double %imag5, %real7		; <double> [#uses=1]
+	%29 = fmul double %real3, %imag9		; <double> [#uses=1]
+	%30 = fsub double %28, %29		; <double> [#uses=1]
 	%31 = fdiv double %30, %26		; <double> [#uses=1]
 	%real10 = getelementptr %1* %0, i32 0, i32 0		; <double*> [#uses=1]
 	store double %27, double* %real10, align 8
@@ -2227,12 +2227,12 @@
 	%real9 = load double* %real8, align 8		; <double> [#uses=2]
 	%imag10 = getelementptr %1* %memtmp3, i32 0, i32 1		; <double*> [#uses=1]
 	%imag11 = load double* %imag10, align 8		; <double> [#uses=2]
-	%27 = mul double %real5, %real9		; <double> [#uses=1]
-	%28 = mul double %imag7, %imag11		; <double> [#uses=1]
-	%29 = sub double %27, %28		; <double> [#uses=1]
-	%30 = mul double %real5, %imag11		; <double> [#uses=1]
-	%31 = mul double %real9, %imag7		; <double> [#uses=1]
-	%32 = add double %30, %31		; <double> [#uses=1]
+	%27 = fmul double %real5, %real9		; <double> [#uses=1]
+	%28 = fmul double %imag7, %imag11		; <double> [#uses=1]
+	%29 = fsub double %27, %28		; <double> [#uses=1]
+	%30 = fmul double %real5, %imag11		; <double> [#uses=1]
+	%31 = fmul double %real9, %imag7		; <double> [#uses=1]
+	%32 = fadd double %30, %31		; <double> [#uses=1]
 	%real12 = getelementptr %1* %0, i32 0, i32 0		; <double*> [#uses=1]
 	store double %29, double* %real12, align 8
 	%imag13 = getelementptr %1* %0, i32 0, i32 1		; <double*> [#uses=1]
@@ -2384,10 +2384,10 @@
 	call void @llvm.dbg.stoppoint(i32 444, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
 	%0 = call double* @_ZNKSt7complexIdE4imagEv(%"struct.std::complex<double>"* %__x) nounwind		; <double*> [#uses=1]
 	%1 = load double* %0, align 8		; <double> [#uses=1]
-	%2 = sub double -0.000000e+00, %1		; <double> [#uses=1]
+	%2 = fsub double -0.000000e+00, %1		; <double> [#uses=1]
 	%3 = call double* @_ZNKSt7complexIdE4realEv(%"struct.std::complex<double>"* %__x) nounwind		; <double*> [#uses=1]
 	%4 = load double* %3, align 8		; <double> [#uses=1]
-	%5 = sub double -0.000000e+00, %4		; <double> [#uses=1]
+	%5 = fsub double -0.000000e+00, %4		; <double> [#uses=1]
 	call void @_ZNSt7complexIdEC1Edd(%"struct.std::complex<double>"* %agg.result, double %5, double %2) nounwind
 	call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram576 to %0*))
 	ret void
@@ -2497,16 +2497,16 @@
 	%real9 = load double* %real8, align 8		; <double> [#uses=4]
 	%imag10 = getelementptr %1* %memtmp3, i32 0, i32 1		; <double*> [#uses=1]
 	%imag11 = load double* %imag10, align 8		; <double> [#uses=4]
-	%27 = mul double %real5, %real9		; <double> [#uses=1]
-	%28 = mul double %imag7, %imag11		; <double> [#uses=1]
-	%29 = add double %27, %28		; <double> [#uses=1]
-	%30 = mul double %real9, %real9		; <double> [#uses=1]
-	%31 = mul double %imag11, %imag11		; <double> [#uses=1]
-	%32 = add double %30, %31		; <double> [#uses=2]
+	%27 = fmul double %real5, %real9		; <double> [#uses=1]
+	%28 = fmul double %imag7, %imag11		; <double> [#uses=1]
+	%29 = fadd double %27, %28		; <double> [#uses=1]
+	%30 = fmul double %real9, %real9		; <double> [#uses=1]
+	%31 = fmul double %imag11, %imag11		; <double> [#uses=1]
+	%32 = fadd double %30, %31		; <double> [#uses=2]
 	%33 = fdiv double %29, %32		; <double> [#uses=1]
-	%34 = mul double %imag7, %real9		; <double> [#uses=1]
-	%35 = mul double %real5, %imag11		; <double> [#uses=1]
-	%36 = sub double %34, %35		; <double> [#uses=1]
+	%34 = fmul double %imag7, %real9		; <double> [#uses=1]
+	%35 = fmul double %real5, %imag11		; <double> [#uses=1]
+	%36 = fsub double %34, %35		; <double> [#uses=1]
 	%37 = fdiv double %36, %32		; <double> [#uses=1]
 	%real12 = getelementptr %1* %0, i32 0, i32 0		; <double*> [#uses=1]
 	store double %33, double* %real12, align 8
@@ -2554,7 +2554,7 @@
 	%1 = load double* %0, align 4		; <double> [#uses=1]
 	%2 = call double* @_ZNKSt7complexIdE4realEv(%"struct.std::complex<double>"* %__z) nounwind		; <double*> [#uses=1]
 	%3 = load double* %2, align 8		; <double> [#uses=1]
-	%4 = add double %1, %3		; <double> [#uses=1]
+	%4 = fadd double %1, %3		; <double> [#uses=1]
 	%5 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0		; <double*> [#uses=1]
 	store double %4, double* %5, align 4
 	call void @llvm.dbg.stoppoint(i32 1271, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
@@ -2562,7 +2562,7 @@
 	%7 = load double* %6, align 4		; <double> [#uses=1]
 	%8 = call double* @_ZNKSt7complexIdE4imagEv(%"struct.std::complex<double>"* %__z) nounwind		; <double*> [#uses=1]
 	%9 = load double* %8, align 8		; <double> [#uses=1]
-	%10 = add double %7, %9		; <double> [#uses=1]
+	%10 = fadd double %7, %9		; <double> [#uses=1]
 	%11 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1		; <double*> [#uses=1]
 	store double %10, double* %11, align 4
 	call void @llvm.dbg.stoppoint(i32 1272, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
@@ -2599,7 +2599,7 @@
 	%1 = load double* %0, align 4		; <double> [#uses=1]
 	%2 = call double* @_ZNKSt7complexIdE4realEv(%"struct.std::complex<double>"* %__z) nounwind		; <double*> [#uses=1]
 	%3 = load double* %2, align 8		; <double> [#uses=1]
-	%4 = sub double %1, %3		; <double> [#uses=1]
+	%4 = fsub double %1, %3		; <double> [#uses=1]
 	%5 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 0		; <double*> [#uses=1]
 	store double %4, double* %5, align 4
 	call void @llvm.dbg.stoppoint(i32 1280, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
@@ -2607,7 +2607,7 @@
 	%7 = load double* %6, align 4		; <double> [#uses=1]
 	%8 = call double* @_ZNKSt7complexIdE4imagEv(%"struct.std::complex<double>"* %__z) nounwind		; <double*> [#uses=1]
 	%9 = load double* %8, align 8		; <double> [#uses=1]
-	%10 = sub double %7, %9		; <double> [#uses=1]
+	%10 = fsub double %7, %9		; <double> [#uses=1]
 	%11 = getelementptr %"struct.std::complex<double>"* %this, i32 0, i32 0, i32 1		; <double*> [#uses=1]
 	store double %10, double* %11, align 4
 	call void @llvm.dbg.stoppoint(i32 1281, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit5 to %0*))
diff --git a/test/Transforms/ScalarRepl/copy-aggregate.ll b/test/Transforms/ScalarRepl/copy-aggregate.ll
index 4ab17ae..a1ad3f9 100644
--- a/test/Transforms/ScalarRepl/copy-aggregate.ll
+++ b/test/Transforms/ScalarRepl/copy-aggregate.ll
@@ -25,7 +25,7 @@
 	%B = getelementptr {[4 x float]}* %X, i32 0, i32 0, i32 3
 	%a = load float* %A
 	%b = load float* %B
-	%c = add float %a, %b
+	%c = fadd float %a, %b
 	ret float %c
 }
 
diff --git a/test/Transforms/ScalarRepl/memcpy-from-global.ll b/test/Transforms/ScalarRepl/memcpy-from-global.ll
index ee77e1f..e62ccc2 100644
--- a/test/Transforms/ScalarRepl/memcpy-from-global.ll
+++ b/test/Transforms/ScalarRepl/memcpy-from-global.ll
@@ -10,23 +10,23 @@
 	%tmp5 = and i32 %tmp3, 124		; <i32> [#uses=4]
 	%tmp753 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp5		; <float*> [#uses=1]
 	%tmp9 = load float* %tmp753		; <float> [#uses=1]
-	%tmp11 = mul float %tmp9, %x		; <float> [#uses=1]
-	%tmp13 = add float %tmp11, 0.000000e+00		; <float> [#uses=1]
+	%tmp11 = fmul float %tmp9, %x		; <float> [#uses=1]
+	%tmp13 = fadd float %tmp11, 0.000000e+00		; <float> [#uses=1]
 	%tmp17.sum52 = or i32 %tmp5, 1		; <i32> [#uses=1]
 	%tmp1851 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp17.sum52		; <float*> [#uses=1]
 	%tmp19 = load float* %tmp1851		; <float> [#uses=1]
-	%tmp21 = mul float %tmp19, %y		; <float> [#uses=1]
-	%tmp23 = add float %tmp21, %tmp13		; <float> [#uses=1]
+	%tmp21 = fmul float %tmp19, %y		; <float> [#uses=1]
+	%tmp23 = fadd float %tmp21, %tmp13		; <float> [#uses=1]
 	%tmp27.sum50 = or i32 %tmp5, 2		; <i32> [#uses=1]
 	%tmp2849 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp27.sum50		; <float*> [#uses=1]
 	%tmp29 = load float* %tmp2849		; <float> [#uses=1]
-	%tmp31 = mul float %tmp29, %z		; <float> [#uses=1]
-	%tmp33 = add float %tmp31, %tmp23		; <float> [#uses=1]
+	%tmp31 = fmul float %tmp29, %z		; <float> [#uses=1]
+	%tmp33 = fadd float %tmp31, %tmp23		; <float> [#uses=1]
 	%tmp37.sum48 = or i32 %tmp5, 3		; <i32> [#uses=1]
 	%tmp3847 = getelementptr [128 x float]* %lookupTable, i32 0, i32 %tmp37.sum48		; <float*> [#uses=1]
 	%tmp39 = load float* %tmp3847		; <float> [#uses=1]
-	%tmp41 = mul float %tmp39, %w		; <float> [#uses=1]
-	%tmp43 = add float %tmp41, %tmp33		; <float> [#uses=1]
+	%tmp41 = fmul float %tmp39, %w		; <float> [#uses=1]
+	%tmp43 = fadd float %tmp41, %tmp33		; <float> [#uses=1]
 	ret float %tmp43
 }
 
diff --git a/test/Transforms/ScalarRepl/vector_promote.ll b/test/Transforms/ScalarRepl/vector_promote.ll
index a0d3317..4b6555b 100644
--- a/test/Transforms/ScalarRepl/vector_promote.ll
+++ b/test/Transforms/ScalarRepl/vector_promote.ll
@@ -5,12 +5,12 @@
 entry:
 	%G = alloca <4 x float>, align 16		; <<4 x float>*> [#uses=3]
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
-	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+	%tmp3 = fadd <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp3, <4 x float>* %G
 	%G.upgrd.1 = getelementptr <4 x float>* %G, i32 0, i32 0		; <float*> [#uses=1]
 	store float %f, float* %G.upgrd.1
 	%tmp4 = load <4 x float>* %G		; <<4 x float>> [#uses=2]
-	%tmp6 = add <4 x float> %tmp4, %tmp4		; <<4 x float>> [#uses=1]
+	%tmp6 = fadd <4 x float> %tmp4, %tmp4		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp6, <4 x float>* %F
 	ret void
 }
@@ -19,12 +19,12 @@
 entry:
 	%G = alloca <4 x float>, align 16		; <<4 x float>*> [#uses=3]
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
-	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+	%tmp3 = fadd <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp3, <4 x float>* %G
 	%tmp.upgrd.2 = getelementptr <4 x float>* %G, i32 0, i32 2		; <float*> [#uses=1]
 	store float %f, float* %tmp.upgrd.2
 	%tmp4 = load <4 x float>* %G		; <<4 x float>> [#uses=2]
-	%tmp6 = add <4 x float> %tmp4, %tmp4		; <<4 x float>> [#uses=1]
+	%tmp6 = fadd <4 x float> %tmp4, %tmp4		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp6, <4 x float>* %F
 	ret void
 }
@@ -33,7 +33,7 @@
 entry:
 	%G = alloca <4 x float>, align 16		; <<4 x float>*> [#uses=2]
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
-	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+	%tmp3 = fadd <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp3, <4 x float>* %G
 	%tmp.upgrd.3 = getelementptr <4 x float>* %G, i32 0, i32 2		; <float*> [#uses=1]
 	%tmp.upgrd.4 = load float* %tmp.upgrd.3		; <float> [#uses=1]
@@ -45,7 +45,7 @@
 entry:
 	%G = alloca <4 x float>, align 16		; <<4 x float>*> [#uses=2]
 	%tmp = load <4 x float>* %F		; <<4 x float>> [#uses=2]
-	%tmp3 = add <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
+	%tmp3 = fadd <4 x float> %tmp, %tmp		; <<4 x float>> [#uses=1]
 	store <4 x float> %tmp3, <4 x float>* %G
 	%G.upgrd.5 = getelementptr <4 x float>* %G, i32 0, i32 0		; <float*> [#uses=1]
 	%tmp.upgrd.6 = load float* %G.upgrd.5		; <float> [#uses=1]
diff --git a/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll b/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll
index f22ca6c..6bfef02 100644
--- a/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll
+++ b/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll
@@ -142,11 +142,11 @@
 	store double %tmp64, double* %tmp62
 	%tmp65 = call double* @_ZN6QSizeF6rwidthEv( %struct.QPointF* %scaledPageSize )		; <double*> [#uses=2]
 	%tmp67 = load double* %tmp65		; <double> [#uses=1]
-	%tmp69 = mul double %tmp67, %tmp48		; <double> [#uses=1]
+	%tmp69 = fmul double %tmp67, %tmp48		; <double> [#uses=1]
 	store double %tmp69, double* %tmp65
 	%tmp71 = call double* @_ZN6QSizeF7rheightEv( %struct.QPointF* %scaledPageSize )		; <double*> [#uses=2]
 	%tmp73 = load double* %tmp71		; <double> [#uses=1]
-	%tmp75 = mul double %tmp73, %tmp54		; <double> [#uses=1]
+	%tmp75 = fmul double %tmp73, %tmp54		; <double> [#uses=1]
 	store double %tmp75, double* %tmp71
 	%tmp78 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0		; <%struct.QPaintDevice*> [#uses=1]
 	%tmp80 = invoke i32 @_ZNK12QPaintDevice6heightEv( %struct.QPaintDevice* %tmp78 )
@@ -188,7 +188,7 @@
 			to label %invcont106 unwind label %cleanup329		; <i32> [#uses=1]
 invcont106:		; preds = %invcont104
 	%tmp108 = sitofp i32 %tmp107 to double		; <double> [#uses=1]
-	%tmp109 = mul double %tmp108, 0x3FE93264C993264C		; <double> [#uses=1]
+	%tmp109 = fmul double %tmp108, 0x3FE93264C993264C		; <double> [#uses=1]
 	%tmp109.upgrd.17 = fptosi double %tmp109 to i32		; <i32> [#uses=3]
 	%tmp.upgrd.18 = call %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv( %struct.QAbstractTextDocumentLayout* %tmp95 )		; <%struct.QTextBlockGroup*> [#uses=1]
 	invoke void @_ZNK10QTextFrame11frameFormatEv( %struct.QTextBlockFormat* sret  %fmt, %struct.QTextBlockGroup* %tmp.upgrd.18 )
@@ -235,7 +235,7 @@
 	store double %tmp137, double* %tmp135
 	%tmp138 = call double @_ZNK6QRectF6heightEv( %struct.QRectF* %body )		; <double> [#uses=1]
 	%tmp139 = sitofp i32 %tmp109.upgrd.17 to double		; <double> [#uses=1]
-	%tmp140 = sub double %tmp138, %tmp139		; <double> [#uses=1]
+	%tmp140 = fsub double %tmp138, %tmp139		; <double> [#uses=1]
 	%tmp142 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
 			to label %invcont141 unwind label %cleanup192		; <%struct.QPaintDevice*> [#uses=1]
 invcont141:		; preds = %invcont124
@@ -249,7 +249,7 @@
 			to label %invcont148 unwind label %cleanup168		; <i32> [#uses=1]
 invcont148:		; preds = %invcont146
 	%tmp149.upgrd.21 = sitofp i32 %tmp149 to double		; <double> [#uses=1]
-	%tmp150 = add double %tmp140, %tmp149.upgrd.21		; <double> [#uses=1]
+	%tmp150 = fadd double %tmp140, %tmp149.upgrd.21		; <double> [#uses=1]
 	%tmp152 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p )
 			to label %invcont151 unwind label %cleanup168		; <%struct.QPaintDevice*> [#uses=1]
 invcont151:		; preds = %invcont148
@@ -259,10 +259,10 @@
 	%tmp155 = mul i32 %tmp154, 5		; <i32> [#uses=1]
 	%tmp156 = sdiv i32 %tmp155, 72		; <i32> [#uses=1]
 	%tmp156.upgrd.22 = sitofp i32 %tmp156 to double		; <double> [#uses=1]
-	%tmp157 = add double %tmp150, %tmp156.upgrd.22		; <double> [#uses=1]
+	%tmp157 = fadd double %tmp150, %tmp156.upgrd.22		; <double> [#uses=1]
 	%tmp158 = call double @_ZNK6QRectF5widthEv( %struct.QRectF* %body )		; <double> [#uses=1]
 	%tmp159 = sitofp i32 %tmp109.upgrd.17 to double		; <double> [#uses=1]
-	%tmp160 = sub double %tmp158, %tmp159		; <double> [#uses=1]
+	%tmp160 = fsub double %tmp158, %tmp159		; <double> [#uses=1]
 	call void @_ZN7QPointFC1Edd( %struct.QPointF* %tmp2, double %tmp160, double %tmp157 )
 	%tmp161 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 0		; <double*> [#uses=1]
 	%tmp162 = getelementptr %struct.QPointF* %tmp2, i32 0, i32 0		; <double*> [#uses=1]
diff --git a/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll b/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll
index 43ff690..4c9c9e8 100644
--- a/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll
+++ b/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll
@@ -15,7 +15,7 @@
 	br i1 %toBool, label %cond_true, label %cond_next
 
 cond_true:		; preds = %entry
-	%tmp7 = add double %tmp, %Z		; <double> [#uses=1]
+	%tmp7 = fadd double %tmp, %Z		; <double> [#uses=1]
 	br label %cond_next
 
 cond_next:		; preds = %cond_true, %entry
diff --git a/test/Transforms/SimplifyCFG/2008-04-27-MultipleReturnCrash.ll b/test/Transforms/SimplifyCFG/2008-04-27-MultipleReturnCrash.ll
index a370b95..be3410c 100644
--- a/test/Transforms/SimplifyCFG/2008-04-27-MultipleReturnCrash.ll
+++ b/test/Transforms/SimplifyCFG/2008-04-27-MultipleReturnCrash.ll
@@ -21,7 +21,7 @@
 
 
 bb174:		; preds = %bb144, %bb114
-	%tmp191 = mul x86_fp80 0xK00000000000000000000, 0xK3FFE8000000000000000		; <x86_fp80> [#uses=1]
+	%tmp191 = fmul x86_fp80 0xK00000000000000000000, 0xK3FFE8000000000000000		; <x86_fp80> [#uses=1]
 	br label %bb196
 
 bb196:		; preds = %bb174, %bb56, %bb40
diff --git a/test/Transforms/SimplifyCFG/2009-05-12-externweak.ll b/test/Transforms/SimplifyCFG/2009-05-12-externweak.ll
index 5969f27..dc0cbbe 100644
--- a/test/Transforms/SimplifyCFG/2009-05-12-externweak.ll
+++ b/test/Transforms/SimplifyCFG/2009-05-12-externweak.ll
@@ -29,7 +29,7 @@
 	store i32 %storemerge, i32* @j
 	%1 = sitofp i32 %storemerge to double		; <double> [#uses=1]
 	%2 = call double @sin(double %1) nounwind readonly		; <double> [#uses=1]
-	%3 = add double %2, %d.0		; <double> [#uses=1]
+	%3 = fadd double %2, %d.0		; <double> [#uses=1]
 	%4 = add i32 %l.0, 1		; <i32> [#uses=1]
 	br label %bb4
 
diff --git a/test/Transforms/SimplifyLibCalls/half-powr.ll b/test/Transforms/SimplifyLibCalls/half-powr.ll
index f4e898c..890e788 100644
--- a/test/Transforms/SimplifyLibCalls/half-powr.ll
+++ b/test/Transforms/SimplifyLibCalls/half-powr.ll
@@ -11,7 +11,7 @@
 
 bb1:		; preds = %bb, %entry
 	%f_addr.0 = phi float [ %1, %bb ], [ %f, %entry ]		; <float> [#uses=1]
-	%2 = mul float %f_addr.0, %g		; <float> [#uses=1]
+	%2 = fmul float %f_addr.0, %g		; <float> [#uses=1]
 	ret float %2
 }
 
diff --git a/utils/llvm.grm b/utils/llvm.grm
index 05083bf..2ca849d 100644
--- a/utils/llvm.grm
+++ b/utils/llvm.grm
@@ -53,7 +53,8 @@
 The rest of this file is derived directly from llvmAsmParser.y.
 *)
 
-ArithmeticOps ::= add | sub | mul | udiv | sdiv | fdiv | urem | srem | frem ;
+ArithmeticOps ::= add | fadd | sub | fsub | mul | fmul |
+                  udiv | sdiv | fdiv | urem | srem | frem ;
 LogicalOps    ::= shl | lshr | ashr | and | or | xor;
 CastOps       ::= trunc | zext | sext | fptrunc | fpext | bitcast |
                   uitofp | sitofp | fptoui | fptosi | inttoptr | ptrtoint ;
diff --git a/utils/vim/llvm.vim b/utils/vim/llvm.vim
index 201d8dd..b4104f9 100644
--- a/utils/vim/llvm.vim
+++ b/utils/vim/llvm.vim
@@ -22,7 +22,8 @@
 " Instructions.
 " The true and false tokens can be used for comparison opcodes, but it's
 " much more common for these tokens to be used for boolean constants.
-syn keyword llvmStatement add sub mul sdiv udiv fdiv srem urem frem
+syn keyword llvmStatement add fadd sub fsub mul fmul
+syn keyword llvmStatement sdiv udiv fdiv srem urem frem
 syn keyword llvmStatement and or xor
 syn keyword llvmStatement icmp fcmp
 syn keyword llvmStatement eq ne ugt uge ult ule sgt sge slt sle