commit 7dfe23f07fa1482f30c658938ea87936c76bbc93
author Andrew Lenharth <alenhar2@cs.uiuc.edu> Sat Mar 01 21:52:34 2008 +0000
committer Andrew Lenharth <alenhar2@cs.uiuc.edu> Sat Mar 01 21:52:34 2008 +0000
tree d6215ef751ec116a283291bb2d307f80bd3b3f15
parent 2c3eced4d5e96fe170c2bdb8b5090966ed15b484

all but CAS working on x86

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47798 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index bd9e230..c28c2f9 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -1165,23 +1165,24 @@
     assert(((Node->getNumOperands() == 4 && Node->getOpcode() == ISD::ATOMIC_LCS) ||
             (Node->getNumOperands() == 3 && Node->getOpcode() == ISD::ATOMIC_LAS) ||
             (Node->getNumOperands() == 3 && Node->getOpcode() == ISD::ATOMIC_SWAP)) &&
-           "Invalid MemBarrier node!");
+           "Invalid Atomic node!");
     int num = Node->getOpcode() == ISD::ATOMIC_LCS ? 4 : 3;
-    MVT::ValueType VT = Node->getValueType(0);
-    switch (TLI.getOperationAction(ISD::ATOMIC_LCS, VT)) {
+    SDOperand Ops[4];
+    for (int x = 0; x < num; ++x)
+      Ops[x] = LegalizeOp(Node->getOperand(x));
+    Result = DAG.UpdateNodeOperands(Result, &Ops[0], num);
+    
+    switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
     default: assert(0 && "This action is not supported yet!");
-    case TargetLowering::Legal: {
-      SDOperand Ops[4];
-      for (int x = 0; x < num; ++x)
-        Ops[x] = LegalizeOp(Node->getOperand(x));
-      Result = DAG.UpdateNodeOperands(Result, &Ops[0], num);
-      AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0));
-      AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
-      return Result.getValue(Op.ResNo);
+    case TargetLowering::Custom:
+      Result = TLI.LowerOperation(Result, DAG);
+      break;
+    case TargetLowering::Legal:
       break;
     }
-    }
-    break;
+    AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0));
+    AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
+    return Result.getValue(Op.ResNo);
   }
 
   case ISD::Constant: {