All sorts of stuff.
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy. They should be custom lowered though.
Lots more stuff compiles now (go go single source!). Of course, none of it
probably works, but that is what the nightly tester can find out :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24533 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index 021c92d..92ba16e 100644
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -72,6 +72,7 @@
setOperationAction(ISD::FREM, MVT::f64, Expand);
setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand);
+ setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);
if (!TM.getSubtarget<AlphaSubtarget>().hasCT()) {
setOperationAction(ISD::CTPOP , MVT::i64 , Expand);
@@ -101,10 +102,12 @@
// We don't have line number support yet.
setOperationAction(ISD::LOCATION, MVT::Other, Expand);
- computeRegisterProperties();
-
addLegalFPImmediate(+0.0); //F31
addLegalFPImmediate(-0.0); //-F31
+
+ computeRegisterProperties();
+
+ useITOF = TM.getSubtarget<AlphaSubtarget>().hasF2I();
}
@@ -385,3 +388,31 @@
}
+/// LowerOperation - Provide custom lowering hooks for some operations.
+///
+SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
+ switch (Op.getOpcode()) {
+ default: assert(0 && "Wasn't expecting to be able to lower this!");
+ case ISD::SINT_TO_FP: {
+ assert(MVT::i64 == Op.getOperand(0).getValueType() &&
+ "Unhandled SINT_TO_FP type in custom expander!");
+ SDOperand LD;
+ bool isDouble = MVT::f64 == Op.getValueType();
+ if (useITOF) {
+ LD = DAG.getNode(AlphaISD::ITOFT_, MVT::f64, Op.getOperand(0));
+ } else {
+ int FrameIdx =
+ DAG.getMachineFunction().getFrameInfo()->CreateStackObject(8, 8);
+ SDOperand FI = DAG.getFrameIndex(FrameIdx, MVT::i64);
+ SDOperand ST = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
+ Op.getOperand(0), FI, DAG.getSrcValue(0));
+ LD = DAG.getLoad(MVT::f64, ST, FI, DAG.getSrcValue(0));
+ }
+ SDOperand FP = DAG.getNode(isDouble?AlphaISD::CVTQT_:AlphaISD::CVTQS_,
+ isDouble?MVT::f64:MVT::f32, LD);
+ return FP;
+ }
+ }
+ return SDOperand();
+}
+