| commit | 8020a5233cbdc20f5262467831256b97803f8e57 | [log] [tgz] |
|---|---|---|
| author | Chris Lattner <sabre@nondot.org> | Wed Jan 11 19:52:27 2006 +0000 |
| committer | Chris Lattner <sabre@nondot.org> | Wed Jan 11 19:52:27 2006 +0000 |
| tree | bb2b3da1803e60383d978e9fbac6bd6fbe7962f0 | |
| parent | 413b979fe4b3482f347fc7b613d7dcda81e34874 [diff] [blame] |
Always select target registers to themselves git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25218 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp index 75780c4..228f6bf 100644 --- a/utils/TableGen/DAGISelEmitter.cpp +++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -2547,6 +2547,7 @@ << " default: break;\n" << " case ISD::EntryToken: // These leaves remain the same.\n" << " case ISD::BasicBlock:\n" + << " case ISD::Register:\n" << " return N;\n" << " case ISD::AssertSext:\n" << " case ISD::AssertZext: {\n"