Don't require pseudo-instructions to carry encoding information.
For now this is distinct from isCodeGenOnly, as code-gen-only
instructions can (and often do) still have encoding information
associated with them. Once we've migrated all of them over to true
pseudo-instructions that are lowered to real instructions prior to
the printer/emitter, we can remove isCodeGenOnly and just use isPseudo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134539 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/FixedLenDecoderEmitter.cpp b/utils/TableGen/FixedLenDecoderEmitter.cpp
index ba6cd86..c9dcb01 100644
--- a/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -1225,14 +1225,14 @@
//
// This also removes pseudo instructions from considerations of disassembly,
// which is a better design and less fragile than the name matchings.
- BitsInit &Bits = getBitsField(Def, "Inst");
- if (Bits.allInComplete()) return false;
-
// Ignore "asm parser only" instructions.
if (Def.getValueAsBit("isAsmParserOnly") ||
Def.getValueAsBit("isCodeGenOnly"))
return false;
+ BitsInit &Bits = getBitsField(Def, "Inst");
+ if (Bits.allInComplete()) return false;
+
std::vector<OperandInfo> InsnOperands;
// If the instruction has specified a custom decoding hook, use that instead
@@ -1354,7 +1354,8 @@
void FixedLenDecoderEmitter::populateInstructions() {
for (unsigned i = 0, e = NumberedInstructions.size(); i < e; ++i) {
Record *R = NumberedInstructions[i]->TheDef;
- if (R->getValueAsString("Namespace") == "TargetOpcode")
+ if (R->getValueAsString("Namespace") == "TargetOpcode" ||
+ R->getValueAsBit("isPseudo"))
continue;
if (populateInstruction(*NumberedInstructions[i], i))