Re-enable extension optimization pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93313 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 4ab6a94..733995f 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -325,6 +325,7 @@
/* allowDoubleDefs= */ true);
if (OptLevel != CodeGenOpt::None) {
+ PM.add(createOptimizeExtsPass());
if (!DisableMachineLICM)
PM.add(createMachineLICMPass());
if (!DisableMachineSink)
diff --git a/test/CodeGen/X86/sext-subreg.ll b/test/CodeGen/X86/sext-subreg.ll
index 06964ce..b2b9f81 100644
--- a/test/CodeGen/X86/sext-subreg.ll
+++ b/test/CodeGen/X86/sext-subreg.ll
@@ -1,6 +1,5 @@
; RUN: llc < %s -march=x86-64 | FileCheck %s
; rdar://7529457
-; XFAIL: *
define i64 @t(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
; CHECK: t:
diff --git a/test/CodeGen/X86/stack-color-with-reg.ll b/test/CodeGen/X86/stack-color-with-reg.ll
index d762392..be9f3af 100644
--- a/test/CodeGen/X86/stack-color-with-reg.ll
+++ b/test/CodeGen/X86/stack-color-with-reg.ll
@@ -1,5 +1,5 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t
-; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 6
+; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 9
type { [62 x %struct.Bitvec*] } ; type %0
type { i8* } ; type %1