Jimptables working again on alpha.
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30873 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 0a0079e..3ea20ea 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -82,8 +82,8 @@
Constant, ConstantFP,
GlobalAddress, FrameIndex, JumpTable, ConstantPool, ExternalSymbol,
- // The relocation value to add to the value loaded from a jump table
- JumpTableRelocBase,
+ // The address of the GOT
+ GLOBAL_OFFSET_TABLE,
// TargetConstant* - Like Constant*, but the DAG does not do any folding or
// simplification of the constant.
diff --git a/lib/CodeGen/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter.cpp
index 33b6b97..9f5447f 100644
--- a/lib/CodeGen/AsmPrinter.cpp
+++ b/lib/CodeGen/AsmPrinter.cpp
@@ -204,7 +204,7 @@
TargetLowering *LoweringInfo = TM.getTargetLowering();
if (LoweringInfo && LoweringInfo->usesGlobalOffsetTable()) {
SwitchToDataSection(TAI->getJumpTableDataSection(), 0);
- if (TD->getPointerSize() == 8)
+ if (TD->getPointerSize() == 8 && !JTEntryDirective)
JTEntryDirective = TAI->getData64bitsDirective();
} else {
// In PIC mode, we need to emit the jump table to the same section as the
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index d6b07a0..b7262d6 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -534,6 +534,7 @@
case ISD::SRCVALUE:
case ISD::STRING:
case ISD::CONDCODE:
+ case ISD::GLOBAL_OFFSET_TABLE:
// Primitives must all be legal.
assert(TLI.isOperationLegal(Node->getValueType(0), Node->getValueType(0)) &&
"This must be legal!");
@@ -558,17 +559,6 @@
#endif
assert(0 && "Do not know how to legalize this operator!");
abort();
- case ISD::JumpTableRelocBase:
- switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
- case TargetLowering::Custom:
- Tmp1 = TLI.LowerOperation(Op, DAG);
- if (Tmp1.Val) Result = Tmp1;
- break;
- default:
- Result = LegalizeOp(Node->getOperand(0));
- break;
- }
- break;
case ISD::GlobalAddress:
case ISD::ExternalSymbol:
case ISD::ConstantPool:
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 895ae47..f2e1423 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2454,7 +2454,7 @@
case ISD::GlobalAddress: return "GlobalAddress";
case ISD::FrameIndex: return "FrameIndex";
case ISD::JumpTable: return "JumpTable";
- case ISD::JumpTableRelocBase: return "JumpTableRelocBase";
+ case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
case ISD::ConstantPool: return "ConstantPool";
case ISD::ExternalSymbol: return "ExternalSymbol";
case ISD::INTRINSIC_WO_CHAIN: {
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index cbe5510..ee4a0ea 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -864,7 +864,11 @@
// For Pic, the sequence is:
// BRIND(load(Jumptable + index) + RelocBase)
// RelocBase is the JumpTable on PPC and X86, GOT on Alpha
- SDOperand Reloc = DAG.getNode(ISD::JumpTableRelocBase, PTy, TAB);
+ SDOperand Reloc;
+ if (TLI.usesGlobalOffsetTable())
+ Reloc = DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, PTy);
+ else
+ Reloc = TAB;
ADD = DAG.getNode(ISD::ADD, PTy,
((PTy != MVT::i32) ? DAG.getNode(ISD::SIGN_EXTEND, PTy, LD) : LD), Reloc);
DAG.setRoot(DAG.getNode(ISD::BRIND, MVT::Other, LD.getValue(1), ADD));
diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index da9be76..ed66592 100644
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -99,7 +99,8 @@
public:
AlphaDAGToDAGISel(TargetMachine &TM)
- : SelectionDAGISel(AlphaLowering), AlphaLowering(TM)
+ : SelectionDAGISel(AlphaLowering),
+ AlphaLowering(*(AlphaTargetLowering*)(TM.getTargetLowering()))
{}
/// getI64Imm - Return a target constant with the specified value, of type
@@ -201,7 +202,7 @@
CurDAG->getTargetFrameIndex(FI, MVT::i32),
getI64Imm(0));
}
- case AlphaISD::GlobalBaseReg: {
+ case ISD::GLOBAL_OFFSET_TABLE: {
SDOperand Result = getGlobalBaseReg();
ReplaceUses(Op, Result);
return NULL;
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index dfa1e2f..5583890 100644
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -132,7 +132,6 @@
setOperationAction(ISD::JumpTable, MVT::i64, Custom);
setOperationAction(ISD::JumpTable, MVT::i32, Custom);
- setOperationAction(ISD::JumpTableRelocBase, MVT::i64, Custom);
setStackPointerRegisterToSaveRestore(Alpha::R30);
@@ -160,7 +159,6 @@
case AlphaISD::GPRelHi: return "Alpha::GPRelHi";
case AlphaISD::GPRelLo: return "Alpha::GPRelLo";
case AlphaISD::RelLit: return "Alpha::RelLit";
- case AlphaISD::GlobalBaseReg: return "Alpha::GlobalBaseReg";
case AlphaISD::GlobalRetAddr: return "Alpha::GlobalRetAddr";
case AlphaISD::CALL: return "Alpha::CALL";
case AlphaISD::DivCall: return "Alpha::DivCall";
@@ -177,7 +175,7 @@
const TargetMachine &TM = DAG.getTarget();
SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, JTI,
- DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64));
+ DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, MVT::i64));
SDOperand Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, JTI, Hi);
return Lo;
}
@@ -414,8 +412,6 @@
GP, RA);
case ISD::RET: return LowerRET(Op,DAG, getVRegRA());
case ISD::JumpTable: return LowerJumpTable(Op, DAG);
- case ISD::JumpTableRelocBase:
- return DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64);
case ISD::SINT_TO_FP: {
assert(MVT::i64 == Op.getOperand(0).getValueType() &&
@@ -462,7 +458,7 @@
SDOperand CPI = DAG.getTargetConstantPool(C, MVT::i64, CP->getAlignment());
SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, CPI,
- DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64));
+ DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, MVT::i64));
SDOperand Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, CPI, Hi);
return Lo;
}
@@ -474,16 +470,18 @@
// if (!GV->hasWeakLinkage() && !GV->isExternal() && !GV->hasLinkOnceLinkage()) {
if (GV->hasInternalLinkage()) {
SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, GA,
- DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64));
+ DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, MVT::i64));
SDOperand Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, GA, Hi);
return Lo;
} else
- return DAG.getNode(AlphaISD::RelLit, MVT::i64, GA, DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64));
+ return DAG.getNode(AlphaISD::RelLit, MVT::i64, GA,
+ DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, MVT::i64));
}
case ISD::ExternalSymbol: {
return DAG.getNode(AlphaISD::RelLit, MVT::i64,
- DAG.getTargetExternalSymbol(cast<ExternalSymbolSDNode>(Op)->getSymbol(), MVT::i64),
- DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64));
+ DAG.getTargetExternalSymbol(cast<ExternalSymbolSDNode>(Op)
+ ->getSymbol(), MVT::i64),
+ DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, MVT::i64));
}
case ISD::UREM:
diff --git a/lib/Target/Alpha/AlphaISelLowering.h b/lib/Target/Alpha/AlphaISelLowering.h
index a08bb1e..3c7ffa1 100644
--- a/lib/Target/Alpha/AlphaISelLowering.h
+++ b/lib/Target/Alpha/AlphaISelLowering.h
@@ -36,9 +36,6 @@
/// RetLit - Literal Relocation of a Global
RelLit,
- /// GlobalBaseReg - used to restore the GOT ptr
- GlobalBaseReg,
-
/// GlobalRetAddr - used to restore the return address
GlobalRetAddr,
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp
index a1aab94..2ad0d67 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -58,7 +58,8 @@
: DataLayout("e"),
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
JITInfo(*this),
- Subtarget(M, FS) {
+ Subtarget(M, FS),
+ TLInfo(*this) {
setRelocationModel(Reloc::PIC_);
}
diff --git a/lib/Target/Alpha/AlphaTargetMachine.h b/lib/Target/Alpha/AlphaTargetMachine.h
index c00e71c..434a306 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.h
+++ b/lib/Target/Alpha/AlphaTargetMachine.h
@@ -19,6 +19,7 @@
#include "llvm/Target/TargetFrameInfo.h"
#include "AlphaInstrInfo.h"
#include "AlphaJITInfo.h"
+#include "AlphaISelLowering.h"
#include "AlphaSubtarget.h"
namespace llvm {
@@ -31,6 +32,7 @@
TargetFrameInfo FrameInfo;
AlphaJITInfo JITInfo;
AlphaSubtarget Subtarget;
+ AlphaTargetLowering TLInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
@@ -44,6 +46,9 @@
virtual const MRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}
+ virtual TargetLowering* getTargetLowering() const {
+ return const_cast<AlphaTargetLowering*>(&TLInfo);
+ }
virtual const TargetData *getTargetData() const { return &DataLayout; }
virtual TargetJITInfo* getJITInfo() {
return &JITInfo;
diff --git a/test/CodeGen/Alpha/jmp_table.ll b/test/CodeGen/Alpha/jmp_table.ll
index ad51016..00ae601 100644
--- a/test/CodeGen/Alpha/jmp_table.ll
+++ b/test/CodeGen/Alpha/jmp_table.ll
@@ -4,8 +4,6 @@
; RUN: llvm-as < %s | llc -march=alpha | grep 'ldl' &&
; RUN: llvm-as < %s | llc -march=alpha | grep 'rodata'
-; XFAIL: *
-
target endian = little
target pointersize = 64
target triple = "alphaev67-unknown-linux-gnu"