commit 834b739586f1e3420170fd1a0df03089f3313db5
author Jakob Stoklund Olesen <stoklund@2pi.dk> Mon May 24 14:48:17 2010 +0000
committer Jakob Stoklund Olesen <stoklund@2pi.dk> Mon May 24 14:48:17 2010 +0000
tree 94d49f6d65c221d972c1ed881ab77a2b2dd9e238
parent 947e122241d6ad326ff841ca2179da43d01331cd

Rename X86 subregister indices to something shorter.
Use the tablegen-produced enums.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104493 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86FastISel.cpp

diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index 53c4361..1bc5eb7 100644
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -1029,7 +1029,7 @@
   // we're doing here.
   if (CReg != X86::CL)
     BuildMI(MBB, DL, TII.get(TargetOpcode::EXTRACT_SUBREG), X86::CL)
-      .addReg(CReg).addImm(X86::SUBREG_8BIT);
+      .addReg(CReg).addImm(X86::sub_8bit);
 
   unsigned ResultReg = createResultReg(RC);
   BuildMI(MBB, DL, TII.get(OpReg), ResultReg).addReg(Op0Reg);
@@ -1137,7 +1137,7 @@
   // Then issue an extract_subreg.
   unsigned ResultReg = FastEmitInst_extractsubreg(MVT::i8,
                                                   CopyReg, /*Kill=*/true,
-                                                  X86::SUBREG_8BIT);
+                                                  X86::sub_8bit);
   if (!ResultReg)
     return false;