commit 834f1ce0312e3d00d836f9560cb63182c2c4570f
author Chris Lattner <sabre@nondot.org> Sun Jan 06 23:38:27 2008 +0000
committer Chris Lattner <sabre@nondot.org> Sun Jan 06 23:38:27 2008 +0000
tree fa9d9d5b1ad73454fca5dd87fe5dd8b848b8bdc7
parent 9e7aba2739fb3edb3ddcf04c5d36c7c1cccb0581

rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/CodeGenInstruction.cpp

diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp
index 07d38ad..4d86937 100644
--- a/utils/TableGen/CodeGenInstruction.cpp
+++ b/utils/TableGen/CodeGenInstruction.cpp
@@ -84,7 +84,7 @@
   isIndirectBranch = R->getValueAsBit("isIndirectBranch");
   isBarrier    = R->getValueAsBit("isBarrier");
   isCall       = R->getValueAsBit("isCall");
-  isLoad       = R->getValueAsBit("isLoad");
+  isSimpleLoad = R->getValueAsBit("isSimpleLoad");
   mayStore     = R->getValueAsBit("mayStore");
   isImplicitDef= R->getValueAsBit("isImplicitDef");
   bool isTwoAddress = R->getValueAsBit("isTwoAddress");