commit 834f1ce0312e3d00d836f9560cb63182c2c4570f
author Chris Lattner <sabre@nondot.org> Sun Jan 06 23:38:27 2008 +0000
committer Chris Lattner <sabre@nondot.org> Sun Jan 06 23:38:27 2008 +0000
tree fa9d9d5b1ad73454fca5dd87fe5dd8b848b8bdc7
parent 9e7aba2739fb3edb3ddcf04c5d36c7c1cccb0581

rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/InstrInfoEmitter.cpp

diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 2283274..93642f9 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -210,7 +210,7 @@
   }
 
   // These two override everything.
-  isLoad              = Inst.isLoad;
+  isLoad              = Inst.isSimpleLoad;
   NeverHasSideEffects = Inst.neverHasSideEffects;
 
 #if 0
@@ -308,7 +308,7 @@
   if (Inst.isBarrier)    OS << "|M_BARRIER_FLAG";
   if (Inst.hasDelaySlot) OS << "|M_DELAY_SLOT_FLAG";
   if (Inst.isCall)       OS << "|M_CALL_FLAG";
-  if (isLoad)            OS << "|M_LOAD_FLAG";
+  if (isLoad)            OS << "|M_SIMPLE_LOAD_FLAG";
   if (mayStore)          OS << "|M_MAY_STORE_FLAG";
   if (Inst.isImplicitDef)OS << "|M_IMPLICIT_DEF_FLAG";
   if (Inst.isPredicable) OS << "|M_PREDICABLE";