commit 859a18b5833f3566799313ecba8db4916500485b
author Alkis Evlogimenos <alkis@evlogimenos.com> Sun Feb 15 21:37:17 2004 +0000
committer Alkis Evlogimenos <alkis@evlogimenos.com> Sun Feb 15 21:37:17 2004 +0000
tree c55bb63da95ee65735adb5281b2ed94487cb6417
parent 843b160a2040b3ec4d3452678450afa11704c473

Make dense maps keyed on physical registers smallerusing
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.

Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11477 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/PeepholeOptimizer.cpp

diff --git a/lib/Target/X86/PeepholeOptimizer.cpp b/lib/Target/X86/PeepholeOptimizer.cpp
index 0c159e1..42c985d 100644
--- a/lib/Target/X86/PeepholeOptimizer.cpp
+++ b/lib/Target/X86/PeepholeOptimizer.cpp
@@ -164,7 +164,7 @@
     // getDefinition - Return the machine instruction that defines the specified
     // SSA virtual register.
     MachineInstr *getDefinition(unsigned Reg) {
-      assert(Reg >= MRegisterInfo::FirstVirtualRegister &&
+      assert(MRegisterInfo::isVirtualRegister(Reg) &&
              "use-def chains only exist for SSA registers!");
       assert(Reg - MRegisterInfo::FirstVirtualRegister < DefiningInst.size() &&
              "Unknown register number!");

lib/Target/X86/Printer.cpp

diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp
index f591612..31ac00f 100644
--- a/lib/Target/X86/Printer.cpp
+++ b/lib/Target/X86/Printer.cpp
@@ -399,7 +399,7 @@
     }
     // FALLTHROUGH
   case MachineOperand::MO_MachineRegister:
-    if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
+    if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
       // Bug Workaround: See note in Printer::doInitialization about %.
       O << "%" << RI.get(MO.getReg()).Name;
     else

lib/Target/X86/X86AsmPrinter.cpp

diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index f591612..31ac00f 100644
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -399,7 +399,7 @@
     }
     // FALLTHROUGH
   case MachineOperand::MO_MachineRegister:
-    if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
+    if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
       // Bug Workaround: See note in Printer::doInitialization about %.
       O << "%" << RI.get(MO.getReg()).Name;
     else

lib/Target/X86/X86CodeEmitter.cpp

diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 4a66230..a28d0ee 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -329,7 +329,7 @@
   case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7:
     return RegNo-X86::ST0;
   default:
-    assert(RegNo >= MRegisterInfo::FirstVirtualRegister &&
+    assert(MRegisterInfo::isVirtualRegister(RegNo) &&
            "Unknown physical register!");
     assert(0 && "Register allocator hasn't allocated reg correctly yet!");
     return 0;

lib/Target/X86/X86PeepholeOpt.cpp

diff --git a/lib/Target/X86/X86PeepholeOpt.cpp b/lib/Target/X86/X86PeepholeOpt.cpp
index 0c159e1..42c985d 100644
--- a/lib/Target/X86/X86PeepholeOpt.cpp
+++ b/lib/Target/X86/X86PeepholeOpt.cpp
@@ -164,7 +164,7 @@
     // getDefinition - Return the machine instruction that defines the specified
     // SSA virtual register.
     MachineInstr *getDefinition(unsigned Reg) {
-      assert(Reg >= MRegisterInfo::FirstVirtualRegister &&
+      assert(MRegisterInfo::isVirtualRegister(Reg) &&
              "use-def chains only exist for SSA registers!");
       assert(Reg - MRegisterInfo::FirstVirtualRegister < DefiningInst.size() &&
              "Unknown register number!");