Expand ret into "CopyToReg;BRIND"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28559 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 4ccfa33..c508754 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -30,10 +30,6 @@
def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeq, [SDNPHasChain]>;
def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeq, [SDNPHasChain]>;
-def SDT_ARMRetFlag : SDTypeProfile<0, 0, []>;
-def retflag : SDNode<"ARMISD::RET_FLAG", SDT_ARMRetFlag,
- [SDNPHasChain, SDNPOptInFlag]>;
-
def ADJCALLSTACKUP : InstARM<(ops i32imm:$amt),
"!ADJCALLSTACKUP $amt",
[(callseq_end imm:$amt)]>;
@@ -42,11 +38,7 @@
"!ADJCALLSTACKDOWN $amt",
[(callseq_start imm:$amt)]>;
-//bx supports other registers as operands. So this looks like a
-//hack. Maybe a ret should be expanded to a "branch lr" and bx
-//declared as a regular instruction
-
-def BX: InstARM<(ops), "bx lr", [(retflag)]>;
+def bxr: InstARM<(ops IntRegs:$dst), "bx $dst", [(brind IntRegs:$dst)]>;
def ldr : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
"ldr $dst, [$addr]",