Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot. Remove
overlap-earlyclobber throughout. Remove
earlyclobber bits and their handling from
live internals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 7d44d4e..4db02f4 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -109,7 +109,6 @@
// register's use/def lists.
if (isRegister()) {
assert(!isEarlyClobber());
- assert(!isEarlyClobber() && !overlapsEarlyClobber());
setReg(Reg);
} else {
// Otherwise, change this to a register and set the reg#.
@@ -129,7 +128,6 @@
IsKill = isKill;
IsDead = isDead;
IsEarlyClobber = false;
- OverlapsEarlyClobber = false;
SubReg = 0;
}
@@ -185,14 +183,9 @@
OS << "%mreg" << getReg();
}
- if (isDef() || isKill() || isDead() || isImplicit() || isEarlyClobber() ||
- overlapsEarlyClobber()) {
+ if (isDef() || isKill() || isDead() || isImplicit() || isEarlyClobber()) {
OS << "<";
bool NeedComma = false;
- if (overlapsEarlyClobber()) {
- NeedComma = true;
- OS << "overlapsearly";
- }
if (isImplicit()) {
if (NeedComma) OS << ",";
OS << (isDef() ? "imp-def" : "imp-use");