Remove some dead cases.
Emit the indcall sequence as:
mtctr inreg
mr R12, inreg
btctr
If inreg and R12 aren't coallesced, this reduces the odds of having the mtctr
and btctr in the same dispatch group. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23023 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index 2f79380..4e753d1 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -980,8 +980,8 @@
true);
} else {
Tmp1 = SelectExpr(N.getOperand(1));
+ BuildMI(BB, PPC::MTCTR, 1).addReg(Tmp1);
BuildMI(BB, PPC::OR, 2, PPC::R12).addReg(Tmp1).addReg(Tmp1);
- BuildMI(BB, PPC::MTCTR, 1).addReg(PPC::R12);
CallMI = BuildMI(PPC::CALLindirect, 3).addImm(20).addImm(0)
.addReg(PPC::R12);
}
@@ -995,9 +995,6 @@
for(int i = 0, e = ArgVR.size(); i < e; ++i) {
switch(N.getOperand(i+2).getValueType()) {
default: Node->dump(); assert(0 && "Unknown value type for call");
- case MVT::i1:
- case MVT::i8:
- case MVT::i16:
case MVT::i32:
assert(GPR_idx < 8 && "Too many int args");
if (N.getOperand(i+2).getOpcode() != ISD::UNDEF) {
@@ -1022,9 +1019,6 @@
switch (Node->getValueType(0)) {
default: assert(0 && "Unknown value type for call result!");
case MVT::Other: return 1;
- case MVT::i1:
- case MVT::i8:
- case MVT::i16:
case MVT::i32:
if (Node->getValueType(1) == MVT::i32) {
BuildMI(BB, PPC::OR, 2, Result+1).addReg(PPC::R3).addReg(PPC::R3);